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    <title>Changes in Makefile</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>7cd3ca90d92110cb6a57fcc286c193cf7fd048d2 - reset: add Sky1 soc reset support</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#7cd3ca90d92110cb6a57fcc286c193cf7fd048d2</link>
        <description>reset: add Sky1 soc reset supportAdd support for the resets on Cix&apos;s Sky1 SoC.There are two reset controllers on Cix Sky1 Soc. One is located in S0domain, and the other is located in S5 domain.Signed-off-by: Gary Yang &lt;gary.yang@cixtech.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Mon, 02 Mar 2026 07:44:06 +0100</pubDate>
        <dc:creator>Gary Yang &lt;gary.yang@cixtech.com&gt;</dc:creator>
    </item>
<item>
        <title>2875b4b5d2657ff2fd979103d88e9afcae51481c - reset: Create subdirectory for SpacemiT drivers</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#2875b4b5d2657ff2fd979103d88e9afcae51481c</link>
        <description>reset: Create subdirectory for SpacemiT driversCreate a dedicated subdirectory for SpacemiT reset drivers to allowfor better organization as support for more SoCs is added.Move the existing K1 reset driver into this new directory and renameit to reset-spacemit-k1.c.Rename the Kconfig symbol to RESET_SPACEMIT_K1 and update its defaultfrom ARCH_SPACEMIT to SPACEMIT_K1_CCU. The reset driver depends on theclock driver to register reset devices as an auxiliary device, so thedefault should reflect this dependency.Also sort the drivers/reset/Kconfig entries alphabetically.Reviewed-by: Alex Elder &lt;elder@riscstar.com&gt;Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;Reviewed-by: Yixun Lan &lt;dlan@kernel.org&gt;Link: https://lore.kernel.org/spacemit/20260114092742-GYC7933267@gentoo.org/ [1]Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Tue, 20 Jan 2026 12:10:50 +0100</pubDate>
        <dc:creator>Guodong Xu &lt;guodong@riscstar.com&gt;</dc:creator>
    </item>
<item>
        <title>0884bd97c08cfad9c23166ddee953498cf535284 - reset: eswin: Add eic7700 reset driver</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#0884bd97c08cfad9c23166ddee953498cf535284</link>
        <description>reset: eswin: Add eic7700 reset driverAdd support for reset controller in eic7700 series chips.Provide functionality for asserting and deasserting resetson the chip.Signed-off-by: Yifeng Huang &lt;huangyifeng@eswincomputing.com&gt;Signed-off-by: Xuyang Dong &lt;dongxuyang@eswincomputing.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Tue, 30 Sep 2025 11:32:38 +0200</pubDate>
        <dc:creator>Xuyang Dong &lt;dongxuyang@eswincomputing.com&gt;</dc:creator>
    </item>
<item>
        <title>9c50f99c135384a4c1918e267c706f196820b214 - reset: aspeed: register AST2700 reset auxiliary bus device</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#9c50f99c135384a4c1918e267c706f196820b214</link>
        <description>reset: aspeed: register AST2700 reset auxiliary bus deviceThe AST2700 reset driver is registered as an auxiliary devicedue to reset and clock controller share the same register region.Signed-off-by: Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Link: https://lore.kernel.org/r/20250708052909.4145983-3-ryan_chen@aspeedtech.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Tue, 08 Jul 2025 07:29:08 +0200</pubDate>
        <dc:creator>Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;</dc:creator>
    </item>
<item>
        <title>2d945dde7fa3f17f46349360a9f97614de9f47da - Merge tag &apos;clk-for-linus&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#2d945dde7fa3f17f46349360a9f97614de9f47da</link>
        <description>Merge tag &apos;clk-for-linus&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxPull clk updates from Stephen Boyd: &quot;This is the usual collection of primarily clk driver updates.  The big part of the diff is all the new Qualcomm clk drivers added for  a few SoCs they&apos;re working on. The other two vendors with significant  work this cycle are Renesas and Amlogic. Renesas adds a bunch of clks  to existing drivers and supports some new SoCs while Amlogic is  starting a significant refactoring to simplify their code.  The core framework gained a pair of helpers to get the &apos;struct device&apos;  or &apos;struct device_node&apos; associated with a &apos;struct clk_hw&apos;. Some  associated KUnit tests were added for these simple helpers as well.  Beyond that core change there are lots of little fixes throughout the  clk drivers for the stuff we see every day, wrong clk driver data that  affects tree topology or supported frequencies, etc. They&apos;re not found  until the clks are actually used by some consumer device driver.  New Drivers:   - Global, display, gpu, video, camera, tcsr, and rpmh clock     controller for the Qualcomm Milos SoC   - Camera, display, GPU, and video clock controllers for Qualcomm     QCS615   - Video clock controller driver for Qualcomm SM6350   - Camera clock controller driver for Qualcomm SC8180X   - I3C clocks and resets on Renesas RZ/G3E   - Expanded Serial Peripheral Interface (xSPI) clocks and resets on     Renesas RZ/V2H(P) and RZ/V2N   - SPI (RSPI) clocks and resets on Renesas RZ/V2H(P)   - SDHI and I2C clocks on Renesas RZ/T2H and RZ/N2H   - Ethernet clocks and resets on Renesas RZ/G3E   - Initial support for the Renesas RZ/T2H (R9A09G077) and RZ/N2H     (R9A09G087) SoCs   - Ethernet clocks and resets on Renesas RZ/V2H and RZ/V2N   - Timer, I2C, watchdog, GPU, and USB2.0 clocks and resets on Renesas     RZ/V2N  Updates:   - Support atomic PWMs in the PWM clk driver   - clk_hw_get_dev() and clk_hw_get_of_node() helpers   - Replace round_rate() with determine_rate() in various clk drivers   - Convert clk DT bindings to DT schema format for DT validation   - Various clk driver cleanups and refactorings from static analysis     tools and possibly real humans   - A lot of little fixes here and there to things like clk tree     topology, missing frequencies, flagging clks as critical, etc&quot;* tag &apos;clk-for-linus&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (216 commits)  clk: clocking-wizard: Fix the round rate handling for versal  clk: Fix typos  clk: spacemit: ccu_pll: fix error return value in recalc_rate callback  clk: tegra: periph: Make tegra_clk_periph_ops static  clk: tegra: periph: Fix error handling and resolve unsigned compare warning  clk: imx: scu: convert from round_rate() to determine_rate()  clk: imx: pllv4: convert from round_rate() to determine_rate()  clk: imx: pllv3: convert from round_rate() to determine_rate()  clk: imx: pllv2: convert from round_rate() to determine_rate()  clk: imx: pll14xx: convert from round_rate() to determine_rate()  clk: imx: pfd: convert from round_rate() to determine_rate()  clk: imx: frac-pll: convert from round_rate() to determine_rate()  clk: imx: fracn-gppll: convert from round_rate() to determine_rate()  clk: imx: fixup-div: convert from round_rate() to determine_rate()  clk: imx: cpu: convert from round_rate() to determine_rate()  clk: imx: busy: convert from round_rate() to determine_rate()  clk: imx: composite-93: remove round_rate() in favor of determine_rate()  clk: imx: composite-8m: remove round_rate() in favor of determine_rate()  clk: qcom: Remove redundant pm_runtime_mark_last_busy() calls  clk: imx: Remove redundant pm_runtime_mark_last_busy() calls  ...

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Thu, 31 Jul 2025 22:36:27 +0200</pubDate>
        <dc:creator>Linus Torvalds &lt;torvalds@linux-foundation.org&gt;</dc:creator>
    </item>
<item>
        <title>c479d7cf06c3d65532442fa368b058e05dbba1a2 - reset: spacemit: add support for SpacemiT CCU resets</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#c479d7cf06c3d65532442fa368b058e05dbba1a2</link>
        <description>reset: spacemit: add support for SpacemiT CCU resetsImplement reset support for SpacemiT CCUs.  A SpacemiT reset controllerdevice is an auxiliary device associated with a clock controller (CCU).This patch defines the reset controllers for the MPMU, APBC, and MPMUCCUs, which already define clock controllers.  It also adds RCPU, RCPU2,and ACPB2 CCUs, which only define resets.Signed-off-by: Alex Elder &lt;elder@riscstar.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Reviewed-by: Yixun Lan &lt;dlan@gentoo.org&gt;Acked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Link: https://lore.kernel.org/r/20250702113709.291748-6-elder@riscstar.comSigned-off-by: Yixun Lan &lt;dlan@gentoo.org&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Wed, 02 Jul 2025 13:37:07 +0200</pubDate>
        <dc:creator>Alex Elder &lt;elder@riscstar.com&gt;</dc:creator>
    </item>
<item>
        <title>360a7a64775944e3a784cb2e3cffb15af5f328e5 - reset: canaan: add reset driver for Kendryte K230</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#360a7a64775944e3a784cb2e3cffb15af5f328e5</link>
        <description>reset: canaan: add reset driver for Kendryte K230Add support for the resets on Canaan Kendryte K230 SoC. The driversupport CPU0, CPU1, L2 cache flush, hardware auto clear and softwareclear resets.Tested-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Signed-off-by: Junhui Liu &lt;junhui.liu@pigmoral.tech&gt;Link: https://lore.kernel.org/r/20250613-k230-reset-v4-2-e5266d2be440@pigmoral.techSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Fri, 13 Jun 2025 10:49:24 +0200</pubDate>
        <dc:creator>Junhui Liu &lt;junhui.liu@pigmoral.tech&gt;</dc:creator>
    </item>
<item>
        <title>e3911d7f865bbc704205f45333e491e4034942c7 - reset: Add USB2PHY port reset driver for Renesas RZ/V2H(P)</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#e3911d7f865bbc704205f45333e491e4034942c7</link>
        <description>reset: Add USB2PHY port reset driver for Renesas RZ/V2H(P)Implement a USB2PHY port reset driver for the Renesas RZ/V2H(P) SoC.Enable control of USB2.0 PHY reset and power-down operations, includingassert and deassert functionalities for the PHY.Leverage device tree (OF) data to support future SoCs with similar USB2PHYhardware but varying register configurations. Define initialization valuesand control register settings to ensure flexibility for upcoming platforms.Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;Reviewed-by: Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;Link: https://lore.kernel.org/r/20250415195131.281060-3-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Tue, 15 Apr 2025 21:51:30 +0200</pubDate>
        <dc:creator>Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</dc:creator>
    </item>
<item>
        <title>4a65326311aba694faafcef9e3c0ef7ae1b722e6 - reset: thead: Add TH1520 reset controller driver</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#4a65326311aba694faafcef9e3c0ef7ae1b722e6</link>
        <description>reset: thead: Add TH1520 reset controller driverAdd reset controller driver for the T-HEAD TH1520 SoC that manageshardware reset lines for various subsystems. The driver currentlyimplements support for GPU reset control, with infrastructure in placeto extend support for NPU and Watchdog Timer resets in future updates.Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Signed-off-by: Michal Wilczynski &lt;m.wilczynski@samsung.com&gt;Link: https://lore.kernel.org/r/20250303152511.494405-3-m.wilczynski@samsung.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Mon, 03 Mar 2025 16:25:11 +0100</pubDate>
        <dc:creator>Michal Wilczynski &lt;m.wilczynski@samsung.com&gt;</dc:creator>
    </item>
<item>
        <title>6b64fde5c183b5ef5b0f0f7321408caf3b876187 - reset: imx: Add SCU reset driver for i.MX8QXP and i.MX8QM</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#6b64fde5c183b5ef5b0f0f7321408caf3b876187</link>
        <description>reset: imx: Add SCU reset driver for i.MX8QXP and i.MX8QMAdd System Controller Firmware(SCU) reset driver for i.MX8QM and i.MX8QXP.SCU Manage resets for peripherals such as MIPI CSI. Currently, support tworeset sources: IMX_SC_R_CSI_0 and IMX_SC_R_CSI_1.Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;Link: https://lore.kernel.org/r/20250210-8qxp_camera-v3-2-324f5105accc@nxp.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Mon, 10 Feb 2025 21:59:21 +0100</pubDate>
        <dc:creator>Frank Li &lt;Frank.Li@nxp.com&gt;</dc:creator>
    </item>
<item>
        <title>2c138ee3354f8088769d05701a2e16d1cb4cc22d - reset: amlogic: move drivers to a dedicated directory</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#2c138ee3354f8088769d05701a2e16d1cb4cc22d</link>
        <description>reset: amlogic: move drivers to a dedicated directoryThe meson reset driver will be split in two part, one implemeting the ops,the other providing the platform driver support. This will be done tofacilitate the addition of the auxiliary bus support.To avoid making a mess in drivers/reset/ while doing so, move the amlogicreset drivers to a dedicated directory.Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Link: https://lore.kernel.org/r/20240910-meson-rst-aux-v5-7-60be62635d3e@baylibre.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Tue, 10 Sep 2024 18:32:49 +0200</pubDate>
        <dc:creator>Jerome Brunet &lt;jbrunet@baylibre.com&gt;</dc:creator>
    </item>
<item>
        <title>487b1b32e317b85c2948eb4013f3e089a0433d49 - reset: eyeq: add platform driver</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#487b1b32e317b85c2948eb4013f3e089a0433d49</link>
        <description>reset: eyeq: add platform driverAdd Mobileye EyeQ reset controller driver, for EyeQ5, EyeQ6L and EyeQ6HSoCs. Instances belong to a shared register region called OLB and getsspawned as auxiliary device to the platform driver for clock.There is one OLB instance for EyeQ5 and EyeQ6L. There are seven OLBinstances on EyeQ6H; three have a reset controller embedded: - West and east get handled by the same compatible. - Acc (accelerator) is another one.Each instance vary in the number and types of reset domains.Instances with single domain expect a single cell, others two.Signed-off-by: Th&#233;o Lebrun &lt;theo.lebrun@bootlin.com&gt;Link: https://lore.kernel.org/r/20240730-mbly-reset-v2-2-00b870a6a2ff@bootlin.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Tue, 30 Jul 2024 18:06:23 +0200</pubDate>
        <dc:creator>Th&#233;o Lebrun &lt;theo.lebrun@bootlin.com&gt;</dc:creator>
    </item>
<item>
        <title>fd88137bfbb83bee678abef840dcafa13262f5ca - reset: tegra-bpmp: allow building under COMPILE_TEST</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#fd88137bfbb83bee678abef840dcafa13262f5ca</link>
        <description>reset: tegra-bpmp: allow building under COMPILE_TESTThe Tegra BPMP reset driver can be compiled without TEGRA_BPMP beingenabled. Allow it to be built under COMPILE_TEST.Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;Link: https://lore.kernel.org/r/20240625-reset-compile-bpmp-v1-1-647e846303d8@pengutronix.deSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Tue, 25 Jun 2024 14:51:41 +0200</pubDate>
        <dc:creator>Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>4f6a43ad2b05fd51e3294c67bb2e3da270324fbf - reset: zynqmp: allow building under COMPILE_TEST</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#4f6a43ad2b05fd51e3294c67bb2e3da270324fbf</link>
        <description>reset: zynqmp: allow building under COMPILE_TESTThe ZynqMP reset driver can be compiled without ARCH_ZYNQMP beingenabled. Allow it to be built under COMPILE_TEST.Acked-by: Michal Simek &lt;michal.simek@amd.com&gt;Link: https://lore.kernel.org/r/20240621-reset-compile-zynqmp-v1-1-ede43ab18101@pengutronix.deSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Fri, 21 Jun 2024 17:24:47 +0200</pubDate>
        <dc:creator>Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>fe125601d17cc1eacea47059a67bd5163d872ad2 - reset: imx8mp-audiomix: Add AudioMix Block Control reset driver</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#fe125601d17cc1eacea47059a67bd5163d872ad2</link>
        <description>reset: imx8mp-audiomix: Add AudioMix Block Control reset driverAdd support for the resets on i.MX8MP Audio Block Control module,which includes the EARC PHY software reset and EARC controllersoftware reset. The reset controller is created using the auxiliarydevice framework and set up in the clock driver.Signed-off-by: Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;Reviewed-by: Marco Felsch &lt;m.felsch@pengutronix.de&gt;Reviewed-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;Link: https://lore.kernel.org/r/1719200345-32006-1-git-send-email-shengjiu.wang@nxp.comSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Mon, 24 Jun 2024 05:39:05 +0200</pubDate>
        <dc:creator>Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;</dc:creator>
    </item>
<item>
        <title>1359fc272bee9e0e8b7477d15b8d08518b818f0c - reset: sti: allow building under COMPILE_TEST</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#1359fc272bee9e0e8b7477d15b8d08518b818f0c</link>
        <description>reset: sti: allow building under COMPILE_TESTThe STIH407 reset driver can be compiled without ARCH_STI beingenabled. Allow it to be built under COMPILE_TEST.Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;Link: https://lore.kernel.org/r/20240621-reset-compile-sti-v1-1-b7a66ce29911@pengutronix.deSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Fri, 21 Jun 2024 17:21:09 +0200</pubDate>
        <dc:creator>Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>cee544a40e4426040946e685988b1489f13e6600 - reset: gpio: Add GPIO-based reset controller</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#cee544a40e4426040946e685988b1489f13e6600</link>
        <description>reset: gpio: Add GPIO-based reset controllerAdd a simple driver to control GPIO-based resets using the resetcontroller API for the cases when the GPIOs are shared and reset shouldbe coordinated.  The driver is expected to be used by reset coreframework for ad-hoc reset controllers.Cc: Bartosz Golaszewski &lt;brgl@bgdev.pl&gt;Cc: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;Cc: Sean Anderson &lt;sean.anderson@seco.com&gt;Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;Link: https://lore.kernel.org/r/20240129115216.96479-4-krzysztof.kozlowski@linaro.orgSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Mon, 29 Jan 2024 12:52:13 +0100</pubDate>
        <dc:creator>Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</dc:creator>
    </item>
<item>
        <title>e4c8d01865118ab148f77bdb54ec9c0c181d90a3 - Merge tag &apos;soc-drivers-6.5&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#e4c8d01865118ab148f77bdb54ec9c0c181d90a3</link>
        <description>Merge tag &apos;soc-drivers-6.5&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socPull ARM SoC driver updates from Arnd Bergmann: &quot;Nothing surprising in the SoC specific drivers, with the usual  updates:   - Added or improved SoC driver support for Tegra234, Exynos4121,     RK3588, as well as multiple Mediatek and Qualcomm chips   - SCMI firmware gains support for multiple SMC/HVC transport and     version 3.2 of the protocol   - Cleanups amd minor changes for the reset controller, memory     controller, firmware and sram drivers   - Minor changes to amd/xilinx, samsung, tegra, nxp, ti, qualcomm,     amlogic and renesas SoC specific drivers&quot;* tag &apos;soc-drivers-6.5&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (118 commits)  dt-bindings: interrupt-controller: Convert Amlogic Meson GPIO interrupt controller binding  MAINTAINERS: add PHY-related files to Amlogic SoC file list  drivers: meson: secure-pwrc: always enable DMA domain  tee: optee: Use kmemdup() to replace kmalloc + memcpy  soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer  dt-bindings: sram: qcom,imem: document qdu1000  soc: qcom: icc-bwmon: Fix MSM8998 count unit  dt-bindings: soc: qcom,rpmh-rsc: Require power-domains  soc: qcom: socinfo: Add Soc ID for IPQ5300  dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300  soc: qcom: Fix a IS_ERR() vs NULL bug in probe  soc: qcom: socinfo: Add support for new fields in revision 19  soc: qcom: socinfo: Add support for new fields in revision 18  dt-bindings: firmware: scm: Add compatible for SDX75  soc: qcom: mdt_loader: Fix split image detection  dt-bindings: memory-controllers: drop unneeded quotes  soc: rockchip: dtpm: use C99 array init syntax  firmware: tegra: bpmp: Add support for DRAM MRQ GSCs  soc/tegra: pmc: Use devm_clk_notifier_register()  soc/tegra: pmc: Simplify debugfs initialization  ...

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Fri, 30 Jun 2023 00:22:19 +0200</pubDate>
        <dc:creator>Linus Torvalds &lt;torvalds@linux-foundation.org&gt;</dc:creator>
    </item>
<item>
        <title>e4bb55d6ccf0f774d879630e048deac6a5b8b8a8 - reset: Add Nuvoton ma35d1 reset driver support</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#e4bb55d6ccf0f774d879630e048deac6a5b8b8a8</link>
        <description>reset: Add Nuvoton ma35d1 reset driver supportThis driver supports individual IP reset for the MA35D1. The resetcontrol registers are a subset of the system control registers.Signed-off-by: Jacky Huang &lt;ychuang3@nuvoton.com&gt;Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;Reviewed-by: Ilpo J&#228;rvinen &lt;ilpo.jarvinen@linux.intel.com&gt;Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Mon, 05 Jun 2023 06:07:48 +0200</pubDate>
        <dc:creator>Jacky Huang &lt;ychuang3@nuvoton.com&gt;</dc:creator>
    </item>
<item>
        <title>ac59ed9cdb80bdb7f6584af5253790f51a9404a7 - reset: oxnas: remove obsolete reset driver</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/reset/Makefile#ac59ed9cdb80bdb7f6584af5253790f51a9404a7</link>
        <description>reset: oxnas: remove obsolete reset driverDue to lack of maintainance and stall of development for a few years now,and since no new features will ever be added upstream, remove supportfor OX810 and OX820 peripheral reset.Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;Acked-by: Daniel Golle &lt;daniel@makrotopia.org&gt;Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;Link: https://lore.kernel.org/r/20230331-topic-oxnas-upstream-remove-v1-17-5bd58fd1dd1f@linaro.orgSigned-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;

            List of files:
            /linux/drivers/reset/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 10:34:55 +0200</pubDate>
        <dc:creator>Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</dc:creator>
    </item>
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