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    <title>Changes in pinctrl-eliza.c</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>0720208b37ae4f1193dc7103ee269b180a8f8943 - pinctrl: qcom: Drop redundant intr_target_reg on modern SoCs</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/pinctrl/qcom/pinctrl-eliza.c#0720208b37ae4f1193dc7103ee269b180a8f8943</link>
        <description>pinctrl: qcom: Drop redundant intr_target_reg on modern SoCsOn all Qualcomm TLMM generations from APQ8084 onwards, the interrupttarget routing bits are located in the same register as the interruptconfiguration bits (intr_cfg_reg). Only five older SoCs &#8212; APQ8064,IPQ8064, MDM9615, MSM8660 and MSM8960 &#8212; have a genuinely separateinterrupt target routing register at a different offset (0x400 + 0x4 * id).Replace MSM_ACCESSOR(intr_target) with a custom accessor that falls backto intr_cfg_reg when intr_target_reg is zero. Apply the same fallback inthe SCM path. Drop the now-redundant .intr_target_reg initializer fromall SoC drivers where it duplicated intr_cfg_reg, keeping it only inthe five drivers where it genuinely differs.Signed-off-by: Mukesh Ojha &lt;mukesh.ojha@oss.qualcomm.com&gt;Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;

            List of files:
            /linux/drivers/pinctrl/qcom/pinctrl-eliza.c</description>
        <pubDate>Fri, 27 Mar 2026 18:12:40 +0100</pubDate>
        <dc:creator>Mukesh Ojha &lt;mukesh.ojha@oss.qualcomm.com&gt;</dc:creator>
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        <title>fe8933c5b3e2e5294f82da546792268e5687391e - pinctrl: qcom: eliza: Fix interrupt target bit</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/pinctrl/qcom/pinctrl-eliza.c#fe8933c5b3e2e5294f82da546792268e5687391e</link>
        <description>pinctrl: qcom: eliza: Fix interrupt target bitThe intr_target_bit for Eliza was incorrectly set to 5, which is thevalue used by older Qualcomm SoCs (e.g. SM8250, MSM8996, X1E80100).Newer SoCs such as SM8650, SM8750, Milos, and Kaanapali all usebit 8 for the interrupt target field in the TLMM interrupt configurationregister.Eliza belongs to the newer generation and should use bit 8 to correctlyroute interrupts to the KPSS (Applications Processor). Using the wrongbit position means the interrupt target routing is silently misconfigured,which can result in GPIO interrupts not being delivered to the expectedprocessor.Fix this by aligning Eliza with the correct value used by its peer SoCs.Fixes: 6f26989e15fb (&quot;pinctrl: qcom: Add Eliza pinctrl driver&quot;)Signed-off-by: Mukesh Ojha &lt;mukesh.ojha@oss.qualcomm.com&gt;Reviewed-by: Abel Vesa &lt;abel.vesa@oss.qualcomm.com&gt;Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;

            List of files:
            /linux/drivers/pinctrl/qcom/pinctrl-eliza.c</description>
        <pubDate>Fri, 27 Mar 2026 18:12:39 +0100</pubDate>
        <dc:creator>Mukesh Ojha &lt;mukesh.ojha@oss.qualcomm.com&gt;</dc:creator>
    </item>
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        <title>6f26989e15fbabe3cdcc9afd25fca6ef99ed4dc4 - pinctrl: qcom: Add Eliza pinctrl driver</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/pinctrl/qcom/pinctrl-eliza.c#6f26989e15fbabe3cdcc9afd25fca6ef99ed4dc4</link>
        <description>pinctrl: qcom: Add Eliza pinctrl driverAdd pinctrl driver for TLMM block found in the Eliza SoC.Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;Signed-off-by: Abel Vesa &lt;abel.vesa@oss.qualcomm.com&gt;Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;

            List of files:
            /linux/drivers/pinctrl/qcom/pinctrl-eliza.c</description>
        <pubDate>Mon, 16 Feb 2026 14:44:04 +0100</pubDate>
        <dc:creator>Abel Vesa &lt;abel.vesa@oss.qualcomm.com&gt;</dc:creator>
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