Changes in Makefile

cb7037924836a352e767f69f1aa65b82f3e815f4 - pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver

Wed, 10 Jun 2026 07:29:56 +0200

pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driverAdd support for the pin controller on the UltraRISC DP1000 SoC.The controller provides mux selection for pins in ports A, B, C, D, andLPC. Ports A-D default to GPIO and support peripheral muxing. LPC pinscan be switched to eSPI, but are not available as GPIOs. Basic pinconfiguration controls such as drive strength, pull-up, and pull-downare also supported.Signed-off-by: Jia Wang Reviewed-by: Bartosz Golaszewski Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

27aa791db7e7fe9e405a2143f2ddccdcd0d1c283 - pinctrl: Move Airoha driver to dedicated directory

Fri, 05 Jun 2026 09:12:31 +0200

pinctrl: Move Airoha driver to dedicated directoryIn preparation for additional SoC support, move the Airoha pinctrl driverfor AN7581 SoC to a dedicated directory.This is to tidy things up and keep code organized without polluting theMediatek driver directory.The driver doesn't depend on any generic or common code from the Mediatekcodebase so it can be safely moved without any modification.Signed-off-by: Christian Marangi Acked-by: Lorenzo Bianconi Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

42ec31ec8df4675af621ec686db7410153beebfd - Merge branch 'ib-mux-pinctrl' into devel

Mon, 11 May 2026 22:33:30 +0200

Merge branch 'ib-mux-pinctrl' into devel List of files: /linux/drivers/pinctrl/Makefile

34acc5a8adfb76f2de63c8b8317397fb72b0aec8 - pinctrl: add generic board-level pinctrl driver using mux framework

Tue, 05 May 2026 01:54:39 +0200

pinctrl: add generic board-level pinctrl driver using mux frameworkMany boards use on-board mux chips (often controlled by GPIOs from an I2Cexpander) to switch shared signals between peripherals.Add a generic pinctrl driver built on top of the mux framework tocentralize mux handling and avoid probe ordering issues. Keep board-levelrouting out of individual drivers and supports boot-time only muxselection.Ensure correct probe ordering, especially when the GPIO expander is probedlater.Signed-off-by: Frank Li Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

93d8c6c0e1879d098ff478511032b42a6b26aae0 - pinctrl: vt8500: Enable compile testing

Fri, 10 Apr 2026 15:04:58 +0200

pinctrl: vt8500: Enable compile testingEnable compile testing for Realtek pin controller drivers for increasedbuild and static checkers coverage. PINCTRL_WMT usesgpiochip_get_data(), thus needs GPIOLIB.Signed-off-by: Krzysztof Kozlowski Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

0e6ba181b7982bd82a92698d2c8eec621d4eef9d - pinctrl: aspeed: Enable compile testing outside of ARCH_ASPEED

Fri, 10 Apr 2026 15:04:57 +0200

pinctrl: aspeed: Enable compile testing outside of ARCH_ASPEEDSince inception in commit 4d3d0e4272d8 ("pinctrl: Add core support forAspeed SoCs"), the Aspeed pin controller drivers cannot be compiletested, unless ARCH_ASPEED is selected. . That partially defeats thepurpose of compile testing, since ARCH_ASPEED is pulled when buildingplatform kernels.Signed-off-by: Krzysztof Kozlowski Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

32ba46cede2807215d6c503f27cf554226ecaa9f - pinctrl: realtek: Enable compile testing

Fri, 10 Apr 2026 15:04:56 +0200

pinctrl: realtek: Enable compile testingEnable compile testing for Realtek pin controller drivers for increasedbuild and static checkers coverage. PINCTRL_RTD usespinconf_generic_dt_node_to_map(), thus needs OF.Signed-off-by: Krzysztof Kozlowski Reviewed-by: Yu-Chun Lin Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

38eec41ded8621c75e5772af5fccde906fcd8276 - pinctrl: tegra: Enable easier compile testing

Fri, 10 Apr 2026 12:30:06 +0200

pinctrl: tegra: Enable easier compile testingCurrently NVIDIA Tegra pin controller drivers cannot be compile tested,unless ARCH_TEGRA is selected. That partially defeats the purpose ofcompile testing, since ARCH_TEGRA is pulled when building platformkernels. Solve it and allow compile testing independently of ARCH_TEGRAchoice which requires few less usual changes:1. Descent in Makefile in to drivers/pinctrl/tegra/ unconditionally, because there is no menu option.2. Depend on COMMON_CLK for PINCTRL_TEGRA20, because it uses clk_register_mux().Signed-off-by: Krzysztof Kozlowski Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

43722575e5cdcc6c457bfe81fae9c3ad343ea031 - pinctrl: add generic functions + pins mapper

Tue, 20 Jan 2026 19:15:40 +0100

pinctrl: add generic functions + pins mapperAdd a generic function to allow creation of groups and functions atruntime based on devicetree content, before setting up mux mappings.It works similarly to pinconf_generic_dt_node_to_map(), andtherefore parses pinconf properties and maps those too, allowing itto be used as the dt_node_to_map member of the pinctrl_ops struct.Signed-off-by: Conor Dooley Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

95c1762aaf34b0d5d128f5c14a82826499c563a3 - pinctrl: move microchip riscv pinctrl drivers to a folder

Tue, 20 Jan 2026 19:15:39 +0100

pinctrl: move microchip riscv pinctrl drivers to a folderThere's three of these drivers now for the same platforms, move themtogether with other microchip drivers to follow.Signed-off-by: Conor Dooley Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

920500c5fe66168f138be7f66089e8c8547694f1 - pinctrl: cix: Add pin-controller support for sky1

Tue, 21 Oct 2025 09:04:09 +0200

pinctrl: cix: Add pin-controller support for sky1There are two pin-controllers on Cix Sky1 platform.one is used under S0 state, the other is used under S0 and S5 state.Signed-off-by: Gary Yang [Dropped pinctrl_provide_dummies()]Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

46397274da2284f46e550dc795de5ceeef8f89bf - pinctrl: add polarfire soc iomux0 pinmux driver

Thu, 23 Oct 2025 19:15:00 +0200

pinctrl: add polarfire soc iomux0 pinmux driverOn Polarfire SoC, iomux0 is responsible for routing functions to eitherMultiprocessor Subsystem (MSS) IOs or to the FPGA fabric, where theycan either interface with custom RTL or be routed to the FPGA fabric'sIOs. Add a driver for it.Signed-off-by: Conor Dooley Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

38cf9d6413142290316776c80f19eb92a4e19a9f - pinctrl: add pic64gx "gpio2" pinmux driver

Thu, 23 Oct 2025 19:14:58 +0200

pinctrl: add pic64gx "gpio2" pinmux driverThe pic64gx has a second pinmux "downstream" of the iomux0 pinmux. Thedocumentation for the SoC provides no name for this device, but it isused to swap pins between either GPIO controller #2 or select otherfunctions, hence the "gpio2" name. Add a driver for it.Signed-off-by: Conor Dooley Signed-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

5fb024931949f3475260c84a0e4b0997af9c5530 - Merge tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Wed, 01 Oct 2025 22:14:48 +0200

Merge tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlPull pin control updates from Linus Walleij: "We have GPIO awareness in the pin control core and an interesting AAEON driver. Core changes: - Allow pins to be identified/marked as GPIO mode with a special callback. The pin controller core is now "aware" if a pin is in GPIO mode if the callback is implemented in the driver, and can thus be marked as "strict", i.e. disallowing simultaneous use of a line as GPIO and another function such as I2C. This is enabled in the Qualcomm TLMM driver and also implemeted from day 1 in the new Broadcom STB driver - Rename the pin config option PIN_CONFIG_OUTPUT to PIN_CONFIG_LEVEL to better describe what the config is doing, as well as making it more intuitive what shall be returned when reading this property New drivers: - Qualcomm SDM660 LPASS LPI TLMM pin controller subdriver - Qualcomm Glymur family pin controller driver - Broadcom STB family pin controller driver - Tegra186 pin controller driver - AAEON UP pin controller support. This is some special pin controller that works as an external advanced line MUX and amplifier for signals from an Intel SoC. A cooperative effort with the GPIO maintainer was needed to reach a solution where we reuse code from the GPIO aggregator/forwarder driver - Renesas RZ/T2H and RZ/N2H pin controller support - Axis ARTPEC-8 subdriver for the Samsung pin controller driver Improvements: - Output enable (OEN) support in the Renesas RZG2L driver - Properly support bias pull up/down in the pinctrl-single driver - Move over all GPIO portions using generic MMIO GPIO to the new generic GPIO chip management which has a nice and separate API - Proper DT bindings for some older Broadcom SoCs - External GPIO (EGPIO) support in the Qualcomm SM8250 Deleted code: - Dropped the now unused Samsung S3C24xx drivers"* tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: use more common syntax for compound literals pinctrl: Simplify printks with pOF format pinctrl: qcom: Add SDM660 LPASS LPI TLMM dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl pinctrl: qcom: lpass-lpi: Add ability to use custom pin offsets pinctrl: qcom: Add glymur pinctrl driver dt-bindings: pinctrl: qcom: Add Glymur pinctrl pinctrl: qcom: sm8250: Add egpio support pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL pinctrl: keembay: fix double free in keembay_build_functions() pinctrl: spacemit: fix typo in PRI_TDI pin name pinctrl: eswin: Fix regulator error check and Kconfig dependency pinctrl: bcm: Add STB family pin controller driver dt-bindings: pinctrl: Add support for Broadcom STB pin controller pinctrl: qcom: make the pinmuxing strict pinctrl: qcom: mark the `gpio` and `egpio` pins function as non-strict functions pinctrl: qcom: add infrastructure for marking pin functions as GPIOs pinctrl: allow to mark pin functions as requestable GPIOs pinctrl: qcom: use generic pin function helpers pinctrl: make struct pinfunction a pointer in struct function_desc ... List of files: /linux/drivers/pinctrl/Makefile

b4b993c0e39436ffb3a9b21cabf62b5df085b2e1 - pinctrl: Add MAX7360 pinctrl driver

Sun, 24 Aug 2025 13:57:22 +0200

pinctrl: Add MAX7360 pinctrl driverAdd driver for Maxim Integrated MAX7360 pinctrl on the PORT pins. Pinscan be used either for GPIO, PWM or rotary encoder functionalities.Signed-off-by: Mathieu Dubois-Briand Reviewed-by: Linus Walleij Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20250824-mdb-max7360-support-v14-3-435cfda2b1ea@bootlin.comSigned-off-by: Lee Jones List of files: /linux/drivers/pinctrl/Makefile

dca2f73cf19fedd7bc38fa6a0eb50fea63cd0214 - pinctrl: Add pin controller driver for AAEON UP boards

Mon, 11 Aug 2025 15:25:53 +0200

pinctrl: Add pin controller driver for AAEON UP boardsThis enables the pin control support of the onboard FPGA on AAEON UPboards.This FPGA acts as a level shifter between the Intel SoC pins and the pinheader, and also as a mux or switch.+---------+ +--------------+ +---+ | | | | | | PWM0 | \ | | H | |----------|------ \-----|-------------| E | | I2C0_SDA | | | A |Intel SoC |----------|------\ | | D | | GPIO0 | \------|-------------| E | |----------|------ | | R | | | FPGA | | |----------+ +--------------+ +---+For most of the pins, the FPGA opens/closes a switch to enable/disablethe access to the SoC pin from a pin header.Each switch, has a direction flag that is set depending the status of theSoC pin.For some other pins, the FPGA acts as a mux, and routes one pin (or theother one) to the header.The driver also provides a GPIO chip. It requests SoC pins in GPIO mode,and drives them in tandem with FPGA pins (switch/mux direction).This commit adds support only for UP Squared board.Reviewed-by: Linus Walleij Reviewed-by: Andy Shevchenko Acked-by: Linus Walleij Signed-off-by: Thomas Richard Link: https://lore.kernel.org/20250811-aaeon-up-board-pinctrl-support-v9-10-29f0cbbdfb30@bootlin.comSigned-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

186f3edfdd41f2ae87fc40a9ccba52a3bf930994 - Merge tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Sat, 02 Aug 2025 21:07:09 +0200

Merge tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlPull pin control updates from Linus Walleij: "Nothing stands out, apart from maybe the interesting Eswin EIC7700, a RISC-V SoC I've never seen before. Core changes: - Open code PINCTRL_FUNCTION_DESC() instead of defining a complex macro only used in one place - Add pinmux_generic_add_pinfunction() helper and use this in a few drivers New drivers: - Amlogic S7, S7D and S6 pin control support - Eswin EIC7700 pin control support - Qualcomm PMIV0104, PM7550 and Milos pin control support Because of unhelpful numbering schemes, the Qualcomm driver now needs to start to rely on SoC codenames - STM32 HDP pin control support - Mediatek MT8189 pin control support Improvements: - Switch remaining pin control drivers over to the new GPIO set callback that provides a return value - Support RSVD (reserved) pins in the STM32 driver - Move many fixed assignments over to pinctrl_desc definitions - Handle multiple TLMM regions in the Qualcomm driver"* tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (105 commits) pinctrl: mediatek: Add pinctrl driver for mt8189 dt-bindings: pinctrl: mediatek: Add support for mt8189 pinctrl: aspeed-g6: Add PCIe RC PERST pin group pinctrl: ingenic: use pinmux_generic_add_pinfunction() pinctrl: keembay: use pinmux_generic_add_pinfunction() pinctrl: mediatek: moore: use pinmux_generic_add_pinfunction() pinctrl: airoha: use pinmux_generic_add_pinfunction() pinctrl: equilibrium: use pinmux_generic_add_pinfunction() pinctrl: provide pinmux_generic_add_pinfunction() pinctrl: pinmux: open-code PINCTRL_FUNCTION_DESC() pinctrl: ma35: use new GPIO line value setter callbacks MAINTAINERS: add Clément Le Goffic as STM32 HDP maintainer pinctrl: stm32: Introduce HDP driver dt-bindings: pinctrl: stm32: Introduce HDP pinctrl: qcom: Add Milos pinctrl driver dt-bindings: pinctrl: document the Milos Top Level Mode Multiplexer pinctrl: qcom: spmi: Add PM7550 dt-bindings: pinctrl: qcom,pmic-gpio: Add PM7550 support pinctrl: qcom: spmi: Add PMIV0104 dt-bindings: pinctrl: qcom,pmic-gpio: Add PMIV0104 support ... List of files: /linux/drivers/pinctrl/Makefile

5b797bcc00ef6ac2d274406db7f6959c25af15e8 - pinctrl: eswin: Add EIC7700 pinctrl driver

Thu, 12 Jun 2025 12:51:59 +0200

pinctrl: eswin: Add EIC7700 pinctrl driverAdd support for the pin controller in ESWIN's EIC7700 SoC,which supports pin multiplexing, pin configuration,and rgmii voltage control.Co-developed-by: Samuel Holland Signed-off-by: Samuel Holland Signed-off-by: Yulin Lu Link: https://lore.kernel.org/20250612105159.1241-1-luyulin@eswincomputing.comSigned-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

9b369669452f500fc7334aad62bd8c96a075245f - pinctrl: starfive: Allow compile testing on other platforms

Wed, 11 Jun 2025 08:13:33 +0200

pinctrl: starfive: Allow compile testing on other platformsAlways descent to drivers/pinctrl/starfive/ because limiting it withSOC_STARFIVE is redundant since its Makefile doesn't build anything ifno Starfive-specific pin control Kconfig options are enabled. Thisallows compile testing on other architectures with allyesconfig.Reviewed-by: Geert Uytterhoeven Signed-off-by: Krzysztof Kozlowski Reviewed-by: Emil Renner Berthing Acked-by: Hal Feng Link: https://lore.kernel.org/20250611-pinctrl-const-desc-v2-1-b11c1d650384@linaro.orgSigned-off-by: Linus Walleij List of files: /linux/drivers/pinctrl/Makefile

4732f079cd19f313516047726d934fabc58e9119 - pinctrl: rp1: Implement RaspberryPi RP1 gpio support

Thu, 29 May 2025 15:50:42 +0200

pinctrl: rp1: Implement RaspberryPi RP1 gpio supportThe RP1 is an MFD supporting a gpio controller and /pinmux/pinctrl.Add minimum support for the gpio only portion. The driver is inpinctrl folder since upcoming patches will add the pinmux/pinctrlsupport where the gpio part can be seen as an addition.Signed-off-by: Andrea della Porta Reviewed-by: Linus Walleij Reviewed-by: Stefan Wahren Link: https://lore.kernel.org/r/20250529135052.28398-5-andrea.porta@suse.comSigned-off-by: Florian Fainelli List of files: /linux/drivers/pinctrl/Makefile