Changes in Kconfig

97eee6d7769a153fab2fa07a258bec911a252984 - Merge branch 'pci/controller/dwc-ultrarisc'

Wed, 24 Jun 2026 00:32:15 +0200

Merge branch 'pci/controller/dwc-ultrarisc'- Add UltraRISC DP1000 PCIe controller DT binding and driver (Jia Wang)* pci/controller/dwc-ultrarisc: PCI: ultrarisc: Add UltraRISC DP1000 PCIe Root Complex driver dt-bindings: PCI: Add UltraRISC DP1000 PCIe controller List of files: /linux/drivers/pci/controller/dwc/Kconfig

85c1fcfa740d4c737f5575fc7251883e54227a51 - PCI: imx6: Integrate new pwrctrl API

Wed, 20 May 2026 10:48:57 +0200

PCI: imx6: Integrate new pwrctrl APIIntegrate the PCI pwrctrl framework into the pci-imx6 driver to providestandardized power management for PCI devices.Legacy regulator handling (vpcie-supply at controller level) is maintainedfor backward compatibility with existing device trees. New device treesshould specify power supplies at the Root Port level to utilize the pwrctrlframework.Signed-off-by: Sherry Sun Signed-off-by: Manivannan Sadhasivam Reviewed-by: Frank Li Link: https://patch.msgid.link/20260520084904.2424253-2-sherry.sun@oss.nxp.com List of files: /linux/drivers/pci/controller/dwc/Kconfig

5fc35740c3b32d2c820c97d041282e7bca4ad0bf - PCI: ultrarisc: Add UltraRISC DP1000 PCIe Root Complex driver

Mon, 27 Apr 2026 03:32:12 +0200

PCI: ultrarisc: Add UltraRISC DP1000 PCIe Root Complex driverAdd DP1000 SoC PCIe Root Complex driver.The controller only supports 32-bit aligned configuration space accesses.Signed-off-by: Xincheng Zhang Signed-off-by: Jia Wang [mani: changed to builtin_platform_driver() to prevent irqchip removal]Signed-off-by: Manivannan Sadhasivam [bhelgaas: squash MAINTAINERS update here]Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20260427-ultrarisc-pcie-v4-3-98935f6cdfb5@ultrarisc.com List of files: /linux/drivers/pci/controller/dwc/Kconfig

b94fd08746955623c5e7e95e3a0fcf858f125d60 - Merge branch 'pci/controller/dwc-layerscape'

Mon, 13 Apr 2026 19:50:23 +0200

Merge branch 'pci/controller/dwc-layerscape'- Allow Layerscape host controller driver to be build as a removable module (Sascha Hauer)* pci/controller/dwc-layerscape: PCI: layerscape: Allow to compile as module List of files: /linux/drivers/pci/controller/dwc/Kconfig

927e9d9d4e792159268310716a87bd56c5fcc810 - Merge branch 'pci/controller/dwc-eswin'

Mon, 13 Apr 2026 19:50:22 +0200

Merge branch 'pci/controller/dwc-eswin'- Add DT binding and driver for ESWIN PCIe Root Complex (Senchuan Zhang)* pci/controller/dwc-eswin: PCI: eswin: Add ESWIN PCIe Root Complex driver dt-bindings: PCI: eswin: Add ESWIN PCIe Root Complex# Conflicts:# drivers/pci/controller/dwc/Kconfig# drivers/pci/controller/dwc/Makefile List of files: /linux/drivers/pci/controller/dwc/Kconfig

d52e0276261c0ad359b2ef8e40fb63bd7afa65bf - Merge branch 'pci/controller/dwc-andes-qilai'

Mon, 13 Apr 2026 19:50:15 +0200

Merge branch 'pci/controller/dwc-andes-qilai'- Add Andes QiLai SoC PCIe host driver support (Randolph Lin)* pci/controller/dwc-andes-qilai: PCI: qilai: Add Andes QiLai SoC PCIe host driver support dt-bindings: PCI: Add Andes QiLai PCIe support# Conflicts:# drivers/pci/controller/dwc/Makefile List of files: /linux/drivers/pci/controller/dwc/Kconfig

764fd8338622d4e4c763bca6fa8e3ba747473eb6 - Merge branch 'pci/controller/dwc'

Mon, 13 Apr 2026 19:50:09 +0200

Merge branch 'pci/controller/dwc'- Continue with system suspend even if an Endpoint doesn't respond with PME_TO_Ack message (Manivannan Sadhasivam)- Remove the Baikal-T1 controller driver since it never quite became usable (Andy Shevchenko)- Set Endpoint MSI-X Table Size in the correct function of a multi-function device when configuring MSI-X, not in Function 0 (Aksh Garg)- Set Max Link Width and Max Link Speed for all functions of a multi-function device, not just Function 0 (Aksh Garg)- Clean up in the dw_pcie_resume_noirq() error path (Manivannan Sadhasivam)- Expose PCIe event counters in groups 5-7 in debugfs (Hans Zhang)- Fix type mismatch for kstrtou32_from_user() in debugfs write functions (Hans Zhang)* pci/controller/dwc: PCI: dwc: Fix type mismatch for kstrtou32_from_user() return value PCI: dwc: Expose PCIe event counters for groups 5 to 7 over debugfs PCI: dwc: Perform cleanup in the error path of dw_pcie_resume_noirq() PCI: dwc: ep: Mirror the max link width and speed fields to all functions PCI: dwc: ep: Fix MSI-X Table Size configuration in dw_pcie_ep_set_msix() PCI: dwc: Remove not-going-to-be-supported code for Baikal SoC PCI: dwc: Proceed with system suspend even if the endpoint doesn't respond with PME_TO_Ack message List of files: /linux/drivers/pci/controller/dwc/Kconfig

b593c26d081a4fbeabd34badb0a9e9a971a79cb4 - PCI: eswin: Add ESWIN PCIe Root Complex driver

Fri, 27 Feb 2026 12:18:08 +0100

PCI: eswin: Add ESWIN PCIe Root Complex driverAdd driver for the ESWIN PCIe Root Complex based on the DesignWare PCIecore, IP revision 5.96a. The PCIe Gen.3 Root Complex supports data rate of8 GT/s and x4 lanes, with INTx and MSI interrupt capability.Signed-off-by: Yu Ning Signed-off-by: Yanghui Ou Signed-off-by: Senchuan Zhang [mani: renamed "EIC7700" to "ESWIN", added maintainers entry, removed async probe]Signed-off-by: Manivannan Sadhasivam [bhelgaas: add driver tag in subject]Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20260227111808.1996-1-zhangsenchuan@eswincomputing.com List of files: /linux/drivers/pci/controller/dwc/Kconfig

ff124bbbca1d3a07fa1392ffdbbdeece71f68ece - PCI/pwrctrl: generic: Rename pci-pwrctrl-slot as generic

Wed, 18 Mar 2026 18:10:10 +0100

PCI/pwrctrl: generic: Rename pci-pwrctrl-slot as genericThe driver is pretty generic and would fit for either PCI Slots orendpoints connected to PCI ports, so rename the driver and module aspci-pwrctrl-generic.Suggested-by: Manivannan Sadhasivam Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Helgaas Reviewed-by: Manivannan Sadhasivam Reviewed-by: Bartosz Golaszewski Link: https://patch.msgid.link/20260220-topic-sm8650-ayaneo-pocket-s2-base-v5-3-1ad79caa1efa@linaro.org List of files: /linux/drivers/pci/controller/dwc/Kconfig

df5d8fb6fe55754bc2956e501a9e6acaca5af7d9 - PCI: qilai: Add Andes QiLai SoC PCIe host driver support

Wed, 25 Feb 2026 09:55:03 +0100

PCI: qilai: Add Andes QiLai SoC PCIe host driver supportAdd driver support for DesignWare based PCIe controller in AndesQiLai SoC. The driver only supports the Root Complex mode.Signed-off-by: Randolph Lin [mani: squashed the MAINTAINERS change]Signed-off-by: Manivannan Sadhasivam Link: https://patch.msgid.link/20260225085504.3757601-4-randolph@andestech.com List of files: /linux/drivers/pci/controller/dwc/Kconfig

5e5ea39ff55297fc9d6338f26346c2a7738a78ea - PCI: dwc: Remove not-going-to-be-supported code for Baikal SoC

Fri, 20 Feb 2026 15:21:12 +0100

PCI: dwc: Remove not-going-to-be-supported code for Baikal SoCAs noticed in the discussion [1] the Baikal SoC and platformsare not going to be finalized, hence remove stale code.Signed-off-by: Andy Shevchenko Signed-off-by: Manivannan Sadhasivam Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/lkml/22b92ddf-6321-41b5-8073-f9c7064d3432@infradead.org/ [1]Link: https://patch.msgid.link/20260220142600.2397070-1-andriy.shevchenko@linux.intel.com List of files: /linux/drivers/pci/controller/dwc/Kconfig

e36262c5e6c25e19d7d082936f63b3a8e62739f9 - PCI: layerscape: Allow to compile as module

Mon, 12 Jan 2026 20:17:11 +0100

PCI: layerscape: Allow to compile as moduleThe layerscape pcie host controller could also be compiled as module.Add the necessary infrastructure to allow building as module instead ofonly as builtin driver.Since the driver doesn't expose an irqchip controller, it is also safe tobe removed during runtime.Signed-off-by: Sascha Hauer Signed-off-by: Steffen Trumtrar [mani: added a note about driver removability]Signed-off-by: Manivannan Sadhasivam Acked-by: Roy Zang Link: https://patch.msgid.link/20260112-v6-19-topic-layerscape-pcie-v1-1-1cd863fce50e@pengutronix.de List of files: /linux/drivers/pci/controller/dwc/Kconfig

6b5e2f70a95c1f46ed444a54ad4c6ff6b9673b1d - PCI: dwc: tegra194: Broaden architecture dependency

Thu, 08 May 2025 07:19:22 +0200

PCI: dwc: tegra194: Broaden architecture dependencyReplace ARCH_TEGRA_194_SOC dependency with a more generic ARCH_TEGRA checkfor the Tegra194 PCIe controller, allowing it to be built on Tegraplatforms beyond Tegra194. Additionally, ensure compatibility by requiringARM64 or COMPILE_TEST since this driver works only for ARM64 Tegra SoCs.Signed-off-by: Vidya Sagar [mani: moved ARM64 dependency to ARCH_TEGRA]Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel Acked-by: Krzysztof Wilczyński Acked-by: Thierry Reding Acked-by: Manivannan Sadhasivam Acked-by: Jon Hunter Link: https://patch.msgid.link/20250508051922.4134041-1-vidyas@nvidia.com List of files: /linux/drivers/pci/controller/dwc/Kconfig

388f9a600f10000b15fbfa2ee748530b4876db78 - Merge branch 'pci/controller/spacemit-k1'

Wed, 03 Dec 2025 21:18:44 +0100

Merge branch 'pci/controller/spacemit-k1'- Add DT binding and driver for SpacemiT K1 (Alex Elder)* pci/controller/spacemit-k1: PCI: spacemit: Add SpacemiT PCIe host driver dt-bindings: pci: spacemit: Introduce PCIe host controller List of files: /linux/drivers/pci/controller/dwc/Kconfig

dfb77c81a68309182a458cb76c72fedfe8834482 - Merge branch 'pci/controller/s32g'

Wed, 03 Dec 2025 21:18:42 +0100

Merge branch 'pci/controller/s32g'- Add NXP S32G host controller DT binding and driver (Vincent Guittot)* pci/controller/s32g: MAINTAINERS: Add NXP S32G PCIe controller driver maintainer PCI: s32g: Add NXP S32G PCIe controller driver (RC) PCI: dwc: Add register and bitfield definitions dt-bindings: PCI: s32g: Add NXP S32G PCIe controller List of files: /linux/drivers/pci/controller/dwc/Kconfig

5cbc7d3e316e4251035e5d54c52540a8a7aa81c4 - PCI: s32g: Add NXP S32G PCIe controller driver (RC)

Fri, 21 Nov 2025 17:49:19 +0100

PCI: s32g: Add NXP S32G PCIe controller driver (RC)Add initial support of the PCIe controller for the NXP S32G SoC family.Only host mode is supported.Co-developed-by: Ionut Vicovan Signed-off-by: Ionut Vicovan Co-developed-by: Ciprian Marian Costea Signed-off-by: Ciprian Marian Costea Co-developed-by: Ghennadi Procopciuc Signed-off-by: Ghennadi Procopciuc Co-developed-by: Larisa Grigore Signed-off-by: Larisa Grigore Signed-off-by: Vincent Guittot [mani: replaced memblock_start_of_DRAM with hardcoded boundary addr]Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Helgaas Reviewed-by: Frank Li Link: https://patch.msgid.link/20251121164920.2008569-4-vincent.guittot@linaro.org List of files: /linux/drivers/pci/controller/dwc/Kconfig

ff64e078e45faee50cc6ca7900a3520e8ff1c79e - PCI: spacemit: Add SpacemiT PCIe host driver

Thu, 13 Nov 2025 22:45:37 +0100

PCI: spacemit: Add SpacemiT PCIe host driverIntroduce a driver for the PCIe host controller found in the SpacemiT K1SoC. The hardware is derived from the Synopsys DesignWare PCIe IP. Thedriver supports up to three PCIe ports operating at PCIe link speed up to5 GT/s. The first port uses a combo PHY, which may be configured for usefor USB3 instead.Signed-off-by: Alex Elder [mani: added FIXME to the comment on disabling ASPM L1]Signed-off-by: Manivannan Sadhasivam Tested-by: Jason Montleon Tested-by: Johannes Erdfelt Tested-by: Aurelien Jarno Link: https://patch.msgid.link/20251113214540.2623070-6-elder@riscstar.com List of files: /linux/drivers/pci/controller/dwc/Kconfig

bc10d0ad540df599a3ab154f0255d901d3c2b030 - PCI: keystone: Add support to build as a loadable module

Wed, 29 Oct 2025 09:04:52 +0100

PCI: keystone: Add support to build as a loadable moduleThe 'pci-keystone.c' driver is the application/glue/wrapper driver for theDesignware PCIe Controllers on TI SoCs. Now that all of the helper APIsthat the 'pci-keystone.c' driver depends upon have been exported for use,enable support to build the driver as a loadable module.When building the driver as a module, the functions marked by the '__init'keyword may be invoked after the init memory has been freed by the kernel.This results will result in an exception of the form: Unable to handle kernel paging request at virtual address ... Mem abort info: ... pc : ks_pcie_host_init+0x0/0x540 lr : dw_pcie_host_init+0x170/0x498 ... ks_pcie_host_init+0x0/0x540 (P) ks_pcie_probe+0x728/0x84c platform_probe+0x5c/0x98 really_probe+0xbc/0x29c __driver_probe_device+0x78/0x12c driver_probe_device+0xd8/0x15cTo address this, introduce a new function namely 'ks_pcie_init()' toregister the 'fault handler' while removing the '__init' keyword fromexisting functions.Note that hook_fault_code() is defined as '__init' function. Since the initfunctions should never be called during runtime (after init memory freeingstage), the driver is made as a built-in if CONFIG_ARM (wherehook_fault_code() is used) is selected.Signed-off-by: Siddharth Vadapalli [mani: added a note about hook_fault_code()]Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20251029080547.1253757-5-s-vadapalli@ti.com List of files: /linux/drivers/pci/controller/dwc/Kconfig

30eccd3b7d2f0cdd86929fc9a0f7d75493fb520e - Merge branch 'pci/controller/stm32'

Fri, 03 Oct 2025 19:13:23 +0200

Merge branch 'pci/controller/stm32'- Update pinctrl documentation of initial states and use in runtime suspend/resume (Christian Bruel)- Add pinctrl_pm_select_init_state() for use by stm32 driver, which needs it during resume (Christian Bruel)- Add devicetree bindings and drivers for the STMicroelectronics STM32MP25 in host and endpoint modes (Christian Bruel)* pci/controller/stm32: MAINTAINERS: Add entry for ST STM32MP25 PCIe drivers PCI: stm32-ep: Add PCIe Endpoint support for STM32MP25 dt-bindings: PCI: Add STM32MP25 PCIe Endpoint bindings PCI: stm32: Add PCIe host support for STM32MP25 dt-bindings: PCI: Add STM32MP25 PCIe Root Complex bindings pinctrl: Add pinctrl_pm_select_init_state helper function Documentation: pinctrl: Describe PM helper functions for standard states. List of files: /linux/drivers/pci/controller/dwc/Kconfig

151f3d29baf405bc203f0a02beb4d33604410943 - PCI: stm32-ep: Add PCIe Endpoint support for STM32MP25

Wed, 20 Aug 2025 09:54:06 +0200

PCI: stm32-ep: Add PCIe Endpoint support for STM32MP25Add driver to configure the STM32MP25 SoC PCIe controller based on theDesignWare PCIe core in endpoint mode. Controller support 2.5 and 5 GT/sdata rates and uses the common reference clock provided by the host.The PCIe core_clk receives the pipe0_clk from the ComboPHY as input,and the ComboPHY PLL must be locked for pipe0_clk to be ready.Consequently, PCIe core registers cannot be accessed until the ComboPHY isfully initialised and REFCLK is enabled and ready.Signed-off-by: Christian Bruel [mani: reworded description]Signed-off-by: Manivannan Sadhasivam [bhelgaas: squash in https://patch.msgid.link/20250902122641.269725-1-christian.bruel@foss.st.comto remove redundant link_status checks]Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20250820075411.1178729-7-christian.bruel@foss.st.com List of files: /linux/drivers/pci/controller/dwc/Kconfig