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    <title>Changes in Kconfig</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>70cb95c736807da2c4952423c9f9afe470341996 - Merge tag &apos;soc-drivers-7.2&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#70cb95c736807da2c4952423c9f9afe470341996</link>
        <description>Merge tag &apos;soc-drivers-7.2&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socPull SoC driver updates from Arnd Bergmann: &quot;There are a few added drivers, but mostly the normal maintenance to  drivers for firmware, memory controller and other soc specific  hardware:   - The NXP QuickEngine gets modern MSI support, which allows some     cleanups to the GICv3 irqchip chip driver   - A new SoC specific driver for the Renesas R-Car MFIS unit is added,     encapsulating support for the on-chip mailbox and hwspinlock     implementations that are not easily separated into individual     drivers   - The Qualcomm SoC drivers add support for additional SoC     implementations, and flexibility around power management for the     serial-engine driver as well as probing the LLCC driver using     custom hardware descriptions inside of the device itself.   - Added support for the Samsung thermal management unit   - A cleanup to the Tegra &apos;PMC&apos; driver interfaces to remove legacy     APIs and allow multiple PMC instances everywhere.   - Updates to the TI SCI and KNAS drivers to improve suspend/resume     support.   - Minor driver changes for mediatek, xilinx, allwinner, aspeed,     tegra, broadcom, amd, microchip and starfive specific drivers   - Memory controller updates for Tegra and Renesas for additional SoC     types and other improvements.   - Firmware driver updates for Arm FF-A, SMCCC and SCMI interfaces, to     update driver probing, object lifetimes and address minor bugs&quot;* tag &apos;soc-drivers-7.2&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (189 commits)  Revert &quot;firmware: zynqmp: Add dynamic CSU register discovery and sysfs interface&quot;  Revert &quot;Documentation: ABI: add sysfs interface for ZynqMP CSU registers&quot;  memory: tegra234: drop dead NULL check in tegra234_mc_icc_aggregate()  memory: tegra264: drop redundant tegra264_mc_icc_aggregate()  memory: tegra186-emc: stop borrowing MC aggregate hook for EMC  soc: aspeed: cleanup dead default for ASPEED_SOCINFO  firmware: tegra: bpmp: Add support for multi-socket platforms  firmware: tegra: bpmp: Propagate debugfs errors  soc/tegra: pmc: Add Tegra238 support  soc/tegra: pmc: Restrict power-off handler to Nexus 7  soc/tegra: pmc: Populate powergate debugfs only when needed  soc/tegra: pmc: Move legacy code behind CONFIG_ARM guard  soc/tegra: pmc: Remove unused legacy functions  soc/tegra: pmc: Create PMC context dynamically  firmware: samsung: acpm: remove compile-testing stubs  firmware: samsung: acpm: Add devm_acpm_get_by_phandle helper  firmware: samsung: acpm: Add TMU protocol support  firmware: samsung: acpm: Make acpm_ops const and access via pointer  firmware: samsung: acpm: Drop redundant _ops suffix in acpm_ops members  firmware: samsung: acpm: Annotate rx_data-&gt;cmd with __counted_by_ptr  ...

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Wed, 17 Jun 2026 20:21:40 +0200</pubDate>
        <dc:creator>Linus Torvalds &lt;torvalds@linux-foundation.org&gt;</dc:creator>
    </item>
<item>
        <title>49ff66206e5fcceb8c8743b8d08f2f3ee28e1281 - Merge tag &apos;soc_fsl-7.1-2&apos; of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux into soc/drivers</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#49ff66206e5fcceb8c8743b8d08f2f3ee28e1281</link>
        <description>Merge tag &apos;soc_fsl-7.1-2&apos; of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux into soc/driversFSL SOC Changes for 7.1Freescale QUICC Engine:- Add missing cleanup on device removal and switch to irq_domain_create_linear()in interrupt controller for IO Ports- Panic on ioremap() failure in qe_reset()Freescale Management Complex:- Move fsl-mc over to device MSI infrastructure- Wait for the MC firmware to complete its bootFreescale Hypervisor:- Fix header kernel-doc warnings* tag &apos;soc_fsl-7.1-2&apos; of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux:  bus: fsl-mc: wait for the MC firmware to complete its boot  soc: fsl: qe: panic on ioremap() failure in qe_reset()  soc: fsl: qe_ports_ic: switch to irq_domain_create_linear()  soc: fsl: qe_ports_ic: Add missing cleanup on device removal  virt: fsl_hypervisor: fix header kernel-doc warnings  platform-msi: Remove stale comment  fsl-mc: Remove legacy MSI implementation  fsl-mc: Switch over to per-device platform MSI  irqchip/gic-v3-its: Add fsl_mc device plumbing to the msi-parent handling  fsl-mc: Add minimal infrastructure to use platform MSI  fsl-mc: Remove MSI domain propagation to sub-devicesSigned-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 18 May 2026 16:59:15 +0200</pubDate>
        <dc:creator>Arnd Bergmann &lt;arnd@arndb.de&gt;</dc:creator>
    </item>
<item>
        <title>76841b0ea8be9309f6f9d2f7cf0dbac3af9ec361 - irqchip/qcom: Unify user-visible &quot;Qualcomm&quot; name</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#76841b0ea8be9309f6f9d2f7cf0dbac3af9ec361</link>
        <description>irqchip/qcom: Unify user-visible &quot;Qualcomm&quot; nameVarious names for Qualcomm as a company are used in user-visible configoptions: QCOM, Qualcomm and Qualcomm Technologies.Switch to unified &quot;Qualcomm&quot; so it will be easier for users to identify theoptions when for example running menuconfig.Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;Link: https://patch.msgid.link/20260427070121.18422-2-krzysztof.kozlowski@oss.qualcomm.com

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 27 Apr 2026 09:01:22 +0200</pubDate>
        <dc:creator>Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;</dc:creator>
    </item>
<item>
        <title>ac2005bba8d938c03c3856a96f20afaa42002635 - irqchip/starfive: Rename jh8100 to jhb100</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#ac2005bba8d938c03c3856a96f20afaa42002635</link>
        <description>irqchip/starfive: Rename jh8100 to jhb100The StarFive JH8100 SoC was discontinued before production. The newlytaped-out JHB100 SoC uses the same interrupt controller IP.  Rename thedriver file, Kconfig symbol, and internal references from &quot;jh8100&quot; to&quot;jhb100&quot; to accurately reflect the supported hardware.Signed-off-by: Changhuang Liang &lt;changhuang.liang@starfivetech.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;Link: https://patch.msgid.link/20260416064751.632138-3-changhuang.liang@starfivetech.com

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Thu, 16 Apr 2026 08:47:48 +0200</pubDate>
        <dc:creator>Changhuang Liang &lt;changhuang.liang@starfivetech.com&gt;</dc:creator>
    </item>
<item>
        <title>46e39ee92d14bf2248d6404119b816047144de4e - irqchip/ast2700-intc: Add KUnit tests for route resolution</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#46e39ee92d14bf2248d6404119b816047144de4e</link>
        <description>irqchip/ast2700-intc: Add KUnit tests for route resolutionAdd a KUnit suite for aspeed_intc0_resolve_route().Cover invalid arguments, invalid domain/range data, connected anddisconnected mappings, and malformed upstream range cases.Signed-off-by: Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;Link: https://patch.msgid.link/20260407-irqchip-v5-3-c0b0a300a057@aspeedtech.com

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Tue, 07 Apr 2026 05:08:06 +0200</pubDate>
        <dc:creator>Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;</dc:creator>
    </item>
<item>
        <title>07825e41519abb8ac13d6d1c553af47f57775f6b - irqchip/ast2700-intc: Add AST2700-A2 support</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#07825e41519abb8ac13d6d1c553af47f57775f6b</link>
        <description>irqchip/ast2700-intc: Add AST2700-A2 supportThe AST2700 interrupt fabric is shared by multiple integrated processors(PSP/SSP/TSP/BootMCU), each with its own interrupt controller and its owndevicetree view of the system. As a result, interrupt routing cannot betreated as fixed: the valid route for a peripheral interrupt depends onwhich processor is consuming it.The INTC0 driver models this by creating a hierarchical irqdomain underthe upstream interrupt controller selected by the interrupt-parentproperty in the devicetree. Information derived from this relationshipis incorporated into the route resolution logic for the controller.The INTC1 driver implements the banked INTM-fed controller and forwardsinterrupts toward INTC0, without embedding assumptions about the finaldestination processor.Signed-off-by: Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;Link: https://patch.msgid.link/20260407-irqchip-v5-2-c0b0a300a057@aspeedtech.com

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Tue, 07 Apr 2026 05:08:05 +0200</pubDate>
        <dc:creator>Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;</dc:creator>
    </item>
<item>
        <title>5d994fd7e2f2e11f134fce0abd900bd02b655f70 - irqchip/loongson-pch-lpc: Enable building on MIPS Loongson64</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#5d994fd7e2f2e11f134fce0abd900bd02b655f70</link>
        <description>irqchip/loongson-pch-lpc: Enable building on MIPS Loongson64As the driver now supports OF-based platforms, it&apos;s now possible to use iton MIPS Loongson64 machines.Drop the requirement of LOONGARCH for this driver, to allow build onboth MIPS-based and LoongArch-based Loongson systems.Signed-off-by: Icenowy Zheng &lt;zhengxingda@iscas.ac.cn&gt;Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;Reviewed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;Reviewed-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;Link: https://patch.msgid.link/20260321092032.3502701-7-zhengxingda@iscas.ac.cn

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Sat, 21 Mar 2026 10:20:32 +0100</pubDate>
        <dc:creator>Icenowy Zheng &lt;zhengxingda@iscas.ac.cn&gt;</dc:creator>
    </item>
<item>
        <title>5e72917802dd65ad1ff57f2158a9d221b4fddf0b - irqchip/imx-irqsteer: Add NXP S32N79 support</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#5e72917802dd65ad1ff57f2158a9d221b4fddf0b</link>
        <description>irqchip/imx-irqsteer: Add NXP S32N79 supportAdd support for the interrupt steering controller found in NXP S32N79series automotive SoCs.The S32N79 IRQ_STEER variant differs from the i.MX version by notimplementing the CHANCTRL register. To handle this hardware difference,introduce a device type data structure with quirks field. TheIRQSTEER_QUIRK_NO_CHANCTRL quirk skips CHANCTRL register access for S32N79variants.The interrupt routing functionality and register layout are otherwiseidentical between the two variants.Co-developed-by: Larisa Grigore &lt;larisa.grigore@nxp.com&gt;Signed-off-by: Larisa Grigore &lt;larisa.grigore@nxp.com&gt;Signed-off-by: Ciprian Marian Costea &lt;ciprianmarian.costea@oss.nxp.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;Link: https://patch.msgid.link/20260311081154.381881-4-ciprianmarian.costea@oss.nxp.com

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Wed, 11 Mar 2026 09:11:52 +0100</pubDate>
        <dc:creator>Ciprian Marian Costea &lt;ciprianmarian.costea@oss.nxp.com&gt;</dc:creator>
    </item>
<item>
        <title>14b1cbcc6cec0b02298f4adf717646cd943b7ef6 - fsl-mc: Remove legacy MSI implementation</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#14b1cbcc6cec0b02298f4adf717646cd943b7ef6</link>
        <description>fsl-mc: Remove legacy MSI implementationGet rid of most of the fsl_mc MSI infrastructure, which is now replacedby common code.Reviewed-by: Ioana Ciornei &lt;ioana.ciornei@nxp.com&gt;Tested-by: Ioana Ciornei &lt;ioana.ciornei@nxp.com&gt; # LX2160ARDB, LS2088ARDBTested-by: Sascha Bischoff &lt;sascha.bischoff@arm.com&gt;Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;Acked-by: Thomas Gleixner &lt;tglx@kernel.org&gt;Link: https://lore.kernel.org/r/20260224100936.3752303-6-maz@kernel.orgSigned-off-by: Christophe Leroy (CS GROUP) &lt;chleroy@kernel.org&gt;

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Tue, 24 Feb 2026 11:09:35 +0100</pubDate>
        <dc:creator>Marc Zyngier &lt;maz@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>4b52df1b4e1d9cf4cb5a8e1b5287d1e3d1a6aa0c - irqchip/irq-pic32-evic: Allow driver to be compiled with COMPILE_TEST</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#4b52df1b4e1d9cf4cb5a8e1b5287d1e3d1a6aa0c</link>
        <description>irqchip/irq-pic32-evic: Allow driver to be compiled with COMPILE_TESTThis driver currently only supports builds against a PIC32 target. To avoidfuture breakage in the future update Kconfig so that it can be built withCOMPILE_TEST enabled.[ tglx: Drop the now pointless select in the pic32 Kconfig ]Signed-off-by: Brian Masney &lt;bmasney@redhat.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;Link: https://patch.msgid.link/20260222-irqchip-pic32-v1-5-37f50d1f14af@redhat.com

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 23 Feb 2026 00:43:48 +0100</pubDate>
        <dc:creator>Brian Masney &lt;bmasney@redhat.com&gt;</dc:creator>
    </item>
<item>
        <title>a34d398c83a4a4bc00513c00f6eecc34267f834f - irqchip: Allow LoongArch irqchip drivers on both 32BIT/64BIT</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#a34d398c83a4a4bc00513c00f6eecc34267f834f</link>
        <description>irqchip: Allow LoongArch irqchip drivers on both 32BIT/64BITAll LoongArch irqchip drivers are adjusted, allow them to be built on both32BIT and 64BIT platforms.Co-developed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;Link: https://patch.msgid.link/20260113085940.3344837-8-chenhuacai@loongson.cn

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Tue, 13 Jan 2026 09:59:40 +0100</pubDate>
        <dc:creator>Huacai Chen &lt;chenhuacai@loongson.cn&gt;</dc:creator>
    </item>
<item>
        <title>13e7b3305b647cf58c47c979fe8a04e08caa6098 - irqchip: Add RZ/{T2H,N2H} Interrupt Controller (ICU) driver</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#13e7b3305b647cf58c47c979fe8a04e08caa6098</link>
        <description>irqchip: Add RZ/{T2H,N2H} Interrupt Controller (ICU) driverThe Renesas RZ/T2H (R9A09G077) and Renesas RZ/N2H (R9A09G087) SoCs have anInterrupt Controller (ICU) that supports interrupts from external pins IRQ0to IRQ15, and SEI, and software-triggered interrupts INTCPU0 to INTCPU15.INTCPU0 to INTCPU13, IRQ0 to IRQ13 are non-safety interrupts, whileINTCPU14, INTCPU15, IRQ14, IRQ15 and SEI are safety interrupts, and areexposed via a separate register space.Signed-off-by: Cosmin Tanislav &lt;cosmin-gabriel.tanislav.xa@renesas.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://patch.msgid.link/20251201112933.488801-3-cosmin-gabriel.tanislav.xa@renesas.com

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 01 Dec 2025 12:29:31 +0100</pubDate>
        <dc:creator>Cosmin Tanislav &lt;cosmin-gabriel.tanislav.xa@renesas.com&gt;</dc:creator>
    </item>
<item>
        <title>15b87bec89cb227b55b3689bf5de31b85cf88559 - Merge tag &apos;irq-drivers-2025-11-30&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#15b87bec89cb227b55b3689bf5de31b85cf88559</link>
        <description>Merge tag &apos;irq-drivers-2025-11-30&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipPull irq driver updates from Thomas Gleixner: &quot;Boring updates for interrupt drivers:   - Support for a couple of new ARM64 and RISCV SoC variants and their     magic interrupt controllers which either can reuse existing code or     require quirks due to a botched hardware implementation   - More section mismatch fixes   - The usual cleanups and fixes all over the place&quot;* tag &apos;irq-drivers-2025-11-30&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (32 commits)  irqchip/meson-gpio: Add support for Amlogic S6 S7 and S7D SoCs  dt-bindings: interrupt-controller: Add support for Amlogic S6 S7 and S7D SoCs  dt-bindings: interrupt-controller: aspeed,ast2700: Correct #interrupt-cells and interrupts count  irqchip/aclint-sswi: Add Nuclei UX900 support  dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT SSWI  dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT MSWI  dt-bindings: interrupt-controller: Add Anlogic DR1V90 PLIC  irqchip/irq-bcm7038-l1: Remove unused reg_mask_status()  irqchip/sifive-plic: Fix call to __plic_toggle() in M-Mode code path  irqchip/sifive-plic: Add support for UltraRISC DP1000 PLIC  irqchip/sifive-plic: Cache the interrupt enable state  dt-bindings: interrupt-controller: Add UltraRISC DP1000 PLIC  dt-bindings: vendor-prefixes: Add UltraRISC  irqchip/qcom-irq-combiner: Rename driver structure  irqchip/riscv-imsic: Inline imsic_vector_from_local_id()  irqchip/riscv-imsic: Embed the vector array in lpriv  irqchip/riscv-imsic: Remove redundant irq_data lookups  irqchip/ts4800: Drop unused module alias  irqchip/mvebu-pic: Drop unused module alias  irqchip/meson-gpio: Drop unused module alias  ...

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Tue, 02 Dec 2025 18:32:53 +0100</pubDate>
        <dc:creator>Linus Torvalds &lt;torvalds@linux-foundation.org&gt;</dc:creator>
    </item>
<item>
        <title>c620438ef2ac80b09269a9ae3c0b4fe5add19bfe - irqchip: Kill irq-partition-percpu</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#c620438ef2ac80b09269a9ae3c0b4fe5add19bfe</link>
        <description>irqchip: Kill irq-partition-percpuThis code is now completely unused, and nobody will ever miss it.Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Tested-by: Will Deacon &lt;will@kernel.org&gt;Link: https://patch.msgid.link/20251020122944.3074811-24-maz@kernel.org

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 20 Oct 2025 14:29:40 +0200</pubDate>
        <dc:creator>Marc Zyngier &lt;maz@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>64b9738eaa937232f2567fd55bbb4fc1a00242ea - irqchip/gic-v3: Drop support for custom PPI partitions</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#64b9738eaa937232f2567fd55bbb4fc1a00242ea</link>
        <description>irqchip/gic-v3: Drop support for custom PPI partitionsThe only thing getting in the way of correctly handling PPIs the way theywere intended is the GICv3 hack that deals with PPI partitions.Remove that code, allowing the common code to kick in.Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Tested-by: Will Deacon &lt;will@kernel.org&gt;Link: https://patch.msgid.link/20251020122944.3074811-22-maz@kernel.org

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 20 Oct 2025 14:29:38 +0200</pubDate>
        <dc:creator>Marc Zyngier &lt;maz@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>1230fbb225abf3f04c64697c6b0f8dfb473b3790 - irqchip: Enable compile testing of Broadcom drivers</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#1230fbb225abf3f04c64697c6b0f8dfb473b3790</link>
        <description>irqchip: Enable compile testing of Broadcom driversThere seems to be nothing preventing the Broadcom drivers from beingcompile tested so enable that for wider build coverage.Signed-off-by: Johan Hovold &lt;johan@kernel.org&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Reviewed-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 13 Oct 2025 11:50:27 +0200</pubDate>
        <dc:creator>Johan Hovold &lt;johan@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>4752b0cfbc37a4e62e583bd8723b1fc2fe8df319 - irqchip/riscv-rpmi-sysmsi: Add ACPI support</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#4752b0cfbc37a4e62e583bd8723b1fc2fe8df319</link>
        <description>irqchip/riscv-rpmi-sysmsi: Add ACPI supportAdd ACPI support for the RISC-V RPMI system MSI based irqchip driver.Reviewed-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;Link: https://lore.kernel.org/r/20250818040920.272664-23-apatel@ventanamicro.comSigned-off-by: Paul Walmsley &lt;pjw@kernel.org&gt;

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 18 Aug 2025 06:09:18 +0200</pubDate>
        <dc:creator>Sunil V L &lt;sunilvl@ventanamicro.com&gt;</dc:creator>
    </item>
<item>
        <title>aa43953e862c031ff66e44353c88beb7a449e80d - irqchip: Add driver for the RPMI system MSI service group</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#aa43953e862c031ff66e44353c88beb7a449e80d</link>
        <description>irqchip: Add driver for the RPMI system MSI service groupThe RPMI specification defines a system MSI service group whichallows application processors to receive MSIs upon system eventssuch as graceful shutdown/reboot request, CPU hotplug event, memoryhotplug event, etc.Add an irqchip driver for the RISC-V RPMI system MSI service groupto directly receive system MSIs in Linux kernel.Reviewed-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;Link: https://lore.kernel.org/r/20250818040920.272664-14-apatel@ventanamicro.comSigned-off-by: Paul Walmsley &lt;pjw@kernel.org&gt;

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 18 Aug 2025 06:09:09 +0200</pubDate>
        <dc:creator>Anup Patel &lt;apatel@ventanamicro.com&gt;</dc:creator>
    </item>
<item>
        <title>3b6a18f0da8720d612d8a682ea5c55870da068e0 - irqchip: Build IMX_MU_MSI only on ARM</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#3b6a18f0da8720d612d8a682ea5c55870da068e0</link>
        <description>irqchip: Build IMX_MU_MSI only on ARMCompile-testing IMX_MU_MSI on x86 without PCI_MSI support results in abuild failure:drivers/gpio/gpio-sprd.c:8:include/linux/gpio/driver.h:41:33: error: field &apos;msiinfo&apos; has incomplete typedrivers/iommu/iommufd/viommu.c:4:include/linux/msi.h:528:33: error: field &apos;alloc_info&apos; has incomplete typeTighten the dependency further to only allow compile testing on Arm.This could be refined further to allow certain x86 configs.This was submitted before to address a different build failure, which wasfixed differently, but the problem has now returned in a different form.Fixes: 70afdab904d2d1e6 (&quot;irqchip: Add IMX MU MSI controller driver&quot;)Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/all/20250805160952.4006075-1-arnd@kernel.orgLink: https://lore.kernel.org/all/20221215164109.761427-1-arnd@kernel.org/

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Tue, 05 Aug 2025 18:09:49 +0200</pubDate>
        <dc:creator>Arnd Bergmann &lt;arnd@arndb.de&gt;</dc:creator>
    </item>
<item>
        <title>63eb28bb1402891b1ad2be02a530f29a9dd7f1cd - Merge tag &apos;for-linus&apos; of git://git.kernel.org/pub/scm/virt/kvm/kvm</title>
        <link>http://kernelsources.org:8080/source/history/linux/drivers/irqchip/Kconfig#63eb28bb1402891b1ad2be02a530f29a9dd7f1cd</link>
        <description>Merge tag &apos;for-linus&apos; of git://git.kernel.org/pub/scm/virt/kvm/kvmPull kvm updates from Paolo Bonzini: &quot;ARM:   - Host driver for GICv5, the next generation interrupt controller for     arm64, including support for interrupt routing, MSIs, interrupt     translation and wired interrupts   - Use FEAT_GCIE_LEGACY on GICv5 systems to virtualize GICv3 VMs on     GICv5 hardware, leveraging the legacy VGIC interface   - Userspace control of the &apos;nASSGIcap&apos; GICv3 feature, allowing     userspace to disable support for SGIs w/o an active state on     hardware that previously advertised it unconditionally   - Map supporting endpoints with cacheable memory attributes on     systems with FEAT_S2FWB and DIC where KVM no longer needs to     perform cache maintenance on the address range   - Nested support for FEAT_RAS and FEAT_DoubleFault2, allowing the     guest hypervisor to inject external aborts into an L2 VM and take     traps of masked external aborts to the hypervisor   - Convert more system register sanitization to the config-driven     implementation   - Fixes to the visibility of EL2 registers, namely making VGICv3     system registers accessible through the VGIC device instead of the     ONE_REG vCPU ioctls   - Various cleanups and minor fixes  LoongArch:   - Add stat information for in-kernel irqchip   - Add tracepoints for CPUCFG and CSR emulation exits   - Enhance in-kernel irqchip emulation   - Various cleanups  RISC-V:   - Enable ring-based dirty memory tracking   - Improve perf kvm stat to report interrupt events   - Delegate illegal instruction trap to VS-mode   - MMU improvements related to upcoming nested virtualization  s390x   - Fixes  x86:   - Add CONFIG_KVM_IOAPIC for x86 to allow disabling support for I/O     APIC, PIC, and PIT emulation at compile time   - Share device posted IRQ code between SVM and VMX and harden it     against bugs and runtime errors   - Use vcpu_idx, not vcpu_id, for GA log tag/metadata, to make lookups     O(1) instead of O(n)   - For MMIO stale data mitigation, track whether or not a vCPU has     access to (host) MMIO based on whether the page tables have MMIO     pfns mapped; using VFIO is prone to false negatives   - Rework the MSR interception code so that the SVM and VMX APIs are     more or less identical   - Recalculate all MSR intercepts from scratch on MSR filter changes,     instead of maintaining shadow bitmaps   - Advertise support for LKGS (Load Kernel GS base), a new instruction     that&apos;s loosely related to FRED, but is supported and enumerated     independently   - Fix a user-triggerable WARN that syzkaller found by setting the     vCPU in INIT_RECEIVED state (aka wait-for-SIPI), and then putting     the vCPU into VMX Root Mode (post-VMXON). Trying to detect every     possible path leading to architecturally forbidden states is hard     and even risks breaking userspace (if it goes from valid to valid     state but passes through invalid states), so just wait until     KVM_RUN to detect that the vCPU state isn&apos;t allowed   - Add KVM_X86_DISABLE_EXITS_APERFMPERF to allow disabling     interception of APERF/MPERF reads, so that a &quot;properly&quot; configured     VM can access APERF/MPERF. This has many caveats (APERF/MPERF     cannot be zeroed on vCPU creation or saved/restored on suspend and     resume, or preserved over thread migration let alone VM migration)     but can be useful whenever you&apos;re interested in letting Linux     guests see the effective physical CPU frequency in /proc/cpuinfo   - Reject KVM_SET_TSC_KHZ for vm file descriptors if vCPUs have been     created, as there&apos;s no known use case for changing the default     frequency for other VM types and it goes counter to the very reason     why the ioctl was added to the vm file descriptor. And also, there     would be no way to make it work for confidential VMs with a     &quot;secure&quot; TSC, so kill two birds with one stone   - Dynamically allocation the shadow MMU&apos;s hashed page list, and defer     allocating the hashed list until it&apos;s actually needed (the TDP MMU     doesn&apos;t use the list)   - Extract many of KVM&apos;s helpers for accessing architectural local     APIC state to common x86 so that they can be shared by guest-side     code for Secure AVIC   - Various cleanups and fixes  x86 (Intel):   - Preserve the host&apos;s DEBUGCTL.FREEZE_IN_SMM when running the guest.     Failure to honor FREEZE_IN_SMM can leak host state into guests   - Explicitly check vmcs12.GUEST_DEBUGCTL on nested VM-Enter to     prevent L1 from running L2 with features that KVM doesn&apos;t support,     e.g. BTF  x86 (AMD):   - WARN and reject loading kvm-amd.ko instead of panicking the kernel     if the nested SVM MSRPM offsets tracker can&apos;t handle an MSR (which     is pretty much a static condition and therefore should never     happen, but still)   - Fix a variety of flaws and bugs in the AVIC device posted IRQ code   - Inhibit AVIC if a vCPU&apos;s ID is too big (relative to what hardware     supports) instead of rejecting vCPU creation   - Extend enable_ipiv module param support to SVM, by simply leaving     IsRunning clear in the vCPU&apos;s physical ID table entry   - Disable IPI virtualization, via enable_ipiv, if the CPU is affected     by erratum #1235, to allow (safely) enabling AVIC on such CPUs   - Request GA Log interrupts if and only if the target vCPU is     blocking, i.e. only if KVM needs a notification in order to wake     the vCPU   - Intercept SPEC_CTRL on AMD if the MSR shouldn&apos;t exist according to     the vCPU&apos;s CPUID model   - Accept any SNP policy that is accepted by the firmware with respect     to SMT and single-socket restrictions. An incompatible policy     doesn&apos;t put the kernel at risk in any way, so there&apos;s no reason for     KVM to care   - Drop a superfluous WBINVD (on all CPUs!) when destroying a VM and     use WBNOINVD instead of WBINVD when possible for SEV cache     maintenance   - When reclaiming memory from an SEV guest, only do cache flushes on     CPUs that have ever run a vCPU for the guest, i.e. don&apos;t flush the     caches for CPUs that can&apos;t possibly have cache lines with dirty,     encrypted data  Generic:   - Rework irqbypass to track/match producers and consumers via an     xarray instead of a linked list. Using a linked list leads to     O(n^2) insertion times, which is hugely problematic for use cases     that create large numbers of VMs. Such use cases typically don&apos;t     actually use irqbypass, but eliminating the pointless registration     is a future problem to solve as it likely requires new uAPI   - Track irqbypass&apos;s &quot;token&quot; as &quot;struct eventfd_ctx *&quot; instead of a     &quot;void *&quot;, to avoid making a simple concept unnecessarily difficult     to understand   - Decouple device posted IRQs from VFIO device assignment, as binding     a VM to a VFIO group is not a requirement for enabling device     posted IRQs   - Clean up and document/comment the irqfd assignment code   - Disallow binding multiple irqfds to an eventfd with a priority     waiter, i.e. ensure an eventfd is bound to at most one irqfd     through the entire host, and add a selftest to verify eventfd:irqfd     bindings are globally unique   - Add a tracepoint for KVM_SET_MEMORY_ATTRIBUTES to help debug issues     related to private &lt;=&gt; shared memory conversions   - Drop guest_memfd&apos;s .getattr() implementation as the VFS layer will     call generic_fillattr() if inode_operations.getattr is NULL   - Fix issues with dirty ring harvesting where KVM doesn&apos;t bound the     processing of entries in any way, which allows userspace to keep     KVM in a tight loop indefinitely   - Kill off kvm_arch_{start,end}_assignment() and x86&apos;s associated     tracking, now that KVM no longer uses assigned_device_count as a     heuristic for either irqbypass usage or MDS mitigation  Selftests:   - Fix a comment typo   - Verify KVM is loaded when getting any KVM module param so that     attempting to run a selftest without kvm.ko loaded results in a     SKIP message about KVM not being loaded/enabled (versus some random     parameter not existing)   - Skip tests that hit EACCES when attempting to access a file, and     print a &quot;Root required?&quot; help message. In most cases, the test just     needs to be run with elevated permissions&quot;* tag &apos;for-linus&apos; of git://git.kernel.org/pub/scm/virt/kvm/kvm: (340 commits)  Documentation: KVM: Use unordered list for pre-init VGIC registers  RISC-V: KVM: Avoid re-acquiring memslot in kvm_riscv_gstage_map()  RISC-V: KVM: Use find_vma_intersection() to search for intersecting VMAs  RISC-V: perf/kvm: Add reporting of interrupt events  RISC-V: KVM: Enable ring-based dirty memory tracking  RISC-V: KVM: Fix inclusion of Smnpm in the guest ISA bitmap  RISC-V: KVM: Delegate illegal instruction fault to VS mode  RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs  RISC-V: KVM: Factor-out g-stage page table management  RISC-V: KVM: Add vmid field to struct kvm_riscv_hfence  RISC-V: KVM: Introduce struct kvm_gstage_mapping  RISC-V: KVM: Factor-out MMU related declarations into separate headers  RISC-V: KVM: Use ncsr_xyz() in kvm_riscv_vcpu_trap_redirect()  RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range()  RISC-V: KVM: Don&apos;t flush TLB when PTE is unchanged  RISC-V: KVM: Replace KVM_REQ_HFENCE_GVMA_VMID_ALL with KVM_REQ_TLB_FLUSH  RISC-V: KVM: Rename and move kvm_riscv_local_tlb_sanitize()  RISC-V: KVM: Drop the return value of kvm_riscv_vcpu_aia_init()  RISC-V: KVM: Check kvm_riscv_vcpu_alloc_vector_context() return value  KVM: arm64: selftests: Add FEAT_RAS EL2 registers to get-reg-list  ...

            List of files:
            /linux/drivers/irqchip/Kconfig</description>
        <pubDate>Thu, 31 Jul 2025 02:14:01 +0200</pubDate>
        <dc:creator>Linus Torvalds &lt;torvalds@linux-foundation.org&gt;</dc:creator>
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