Changes in Makefile

ffbb2ebd0c3a7ead6c9128bbbb62fc6d851779bb - hwrng: hisi-trng - Move hisi-trng into drivers/char/hw_random/

Sat, 30 May 2026 22:26:24 +0200

hwrng: hisi-trng - Move hisi-trng into drivers/char/hw_random/Since this file just implements a hwrng driver, move it intodrivers/char/hw_random/. Rename the kconfig option accordingly as well.Note that this moves the file back to its original location.Signed-off-by: Eric Biggers Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

903e6ada01f305eb6c82a27f48bf1ea18eb38a99 - hwrng: histb - Move driver to drivers/char/hw_random/histb-rng.c

Fri, 21 Apr 2023 18:56:49 +0200

hwrng: histb - Move driver to drivers/char/hw_random/histb-rng.cMove to drivers/char/hw_random since histb-(t)rng does not providecryptography pseudo rng.histb-rng is pretty like hisi-rng, but after investigation, we confirmthere is no RNG_PHY_SEED register on histb-rng so a separate driver isneeded.Still we rename relevant function names to match those in hisi-rng.Link: https://lore.kernel.org/r/20230401164448.1393336-1-mmyangfl@gmail.comSigned-off-by: David Yang Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

a2216e1874715a8b4a6f4da2ddbe9277e5613c49 - crypto: hisilicon/trng - add support for HiSTB TRNG

Sat, 01 Apr 2023 18:44:40 +0200

crypto: hisilicon/trng - add support for HiSTB TRNGHiSTB TRNG are found on some HiSilicon STB SoCs.Signed-off-by: David Yang Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

94476b2b6d60bc926a585ae62e1bf69bd22c1dff - crypto: hisilicon/qm - split a debugfs.c from qm

Sat, 12 Nov 2022 03:12:52 +0100

crypto: hisilicon/qm - split a debugfs.c from qmConsidering that the qm feature and debugfs feature are independent.The code related to debugfs is getting larger and larger. It should beseparate as a debugfs file. So move some debugfs code to new file fromqm file. The qm code logic is not modified. And maintainability isenhanced.Signed-off-by: Kai Ye Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

56c6da16c3631f953fb20d8b7ddccdf493377ad4 - crypto: hisilicon/trng - add HiSilicon TRNG driver support

Fri, 20 Nov 2020 10:02:32 +0100

crypto: hisilicon/trng - add HiSilicon TRNG driver supportMove existing char/hw_random/hisi-trng-v2.c to crypto/hisilicon/trng.c.Signed-off-by: Weili Qian Reviewed-by: Zaibo Xu Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

416d82204df44ef727de6eafafeaa4d12fdc78dc - crypto: hisilicon - add HiSilicon SEC V2 driver

Wed, 13 Nov 2019 12:11:04 +0100

crypto: hisilicon - add HiSilicon SEC V2 driverSEC driver provides PCIe hardware device initiation withAES, SM4, and 3DES skcipher algorithms registered to Crypto.It uses Hisilicon QM as interface to CPU.Signed-off-by: Zaibo Xu Signed-off-by: Longfang Liu Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

c8b4b477079d1995cc0a1c10d5cdfd02be938cdf - crypto: hisilicon - add HiSilicon HPRE accelerator

Mon, 30 Sep 2019 11:20:05 +0200

crypto: hisilicon - add HiSilicon HPRE acceleratorThe HiSilicon HPRE accelerator implements RSA and DH algorithms. Ituses Hisilicon QM as interface to CPU.This patch provides PCIe driver to the accelerator and registers itsalgorithms to crypto akcipher and kpp interfaces.Signed-off-by: Zaibo Xu Signed-off-by: Hui Tang Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

48c1cd40fae31aa39e33930e7d28a0d96f01ea17 - crypto: hisilicon - merge sgl support to hisi_qm module

Mon, 30 Sep 2019 09:08:52 +0200

crypto: hisilicon - merge sgl support to hisi_qm moduleAs HW SGL can be seen as a data format of QM's sqe, we merge sgl code intoqm module and rename it as hisi_qm, which reduces the number of module andmake the name less generic.This patch also modify the interface of SGL: - Create/free hisi_acc_sgl_pool inside. - Let user to pass the SGE number in one SGL when creating sgl pool, which is better than a unified module parameter for sgl module before. - Modify zip driver according to sgl interface change.Signed-off-by: Zhou Wang Signed-off-by: Shukun Tan Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

62c455ca853e3e352e465d66a6cc39f1f88caa60 - crypto: hisilicon - add HiSilicon ZIP accelerator support

Fri, 02 Aug 2019 09:57:52 +0200

crypto: hisilicon - add HiSilicon ZIP accelerator supportThe HiSilicon ZIP accelerator implements the zlib and gzip algorithm. Ituses Hisilicon QM as the interface to the CPU.This patch provides PCIe driver to the accelerator and registers it tocrypto acomp interface. It also uses sgl as data input/output interface.Signed-off-by: Zhou Wang Signed-off-by: Shiju Jose Signed-off-by: Kenneth Lee Signed-off-by: Hao Fang Reviewed-by: Jonathan Cameron Reviewed-by: John Garry Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

dfed0098ab91f647b5720ab6f1e03b5b55139408 - crypto: hisilicon - add hardware SGL support

Fri, 02 Aug 2019 09:57:51 +0200

crypto: hisilicon - add hardware SGL supportHiSilicon accelerators in Hip08 use same hardware scatterlist for data format.We support it in this module.Specific accelerator drivers can use hisi_acc_create_sgl_pool to allocatehardware SGLs ahead. Then use hisi_acc_sg_buf_map_to_hw_sgl to get onehardware SGL and pass related information to hardware SGL.The DMA address of mapped hardware SGL can be passed to SGL src/dst fieldin QM SQE.Signed-off-by: Zhou Wang Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

263c9959c9376ec0217d6adc61222a53469eed3c - crypto: hisilicon - add queue management driver for HiSilicon QM module

Fri, 02 Aug 2019 09:57:50 +0200

crypto: hisilicon - add queue management driver for HiSilicon QM moduleQM is a general IP used by HiSilicon accelerators. It provides a generalPCIe interface for the CPU and the accelerator to share a group of queues.A QM integrated in an accelerator provides queue management service.Queues can be assigned to PF and VFs, and queues can be controlled byunified mailboxes and doorbells. Specific task request are descripted byspecific description buffer, which will be controlled and pass to relatedaccelerator IP by QM.This patch adds a QM driver used by the accelerator driver to accessthe QM hardware.Signed-off-by: Zhou Wang Signed-off-by: Kenneth Lee Signed-off-by: Shiju Jose Signed-off-by: Hao Fang Reviewed-by: Jonathan Cameron Reviewed-by: John Garry Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile

915e4e8413dacc086efcef4de04fdfdca57e8b1c - crypto: hisilicon - SEC security accelerator driver

Mon, 23 Jul 2018 17:49:54 +0200

crypto: hisilicon - SEC security accelerator driverThis accelerator is found inside hisilicon hip06 and hip07 SoCs.Each instance provides a number of queues which feed a different number ofbackend acceleration units.The queues are operating in an out of order mode in the interests ofthroughput. The silicon does not do tracking of dependencies betweenmultiple 'messages' or update of the IVs as appropriate for training.Hence where relevant we need to do this in software.Signed-off-by: Jonathan Cameron Signed-off-by: Herbert Xu List of files: /linux/drivers/crypto/hisilicon/Makefile