en Copyright 2015 Java http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#cdd5b5a9761fd66d17586e4f4ba6588c70e640ea Merge branch 'next' into for-linusPrepare input updates for 6.7 merge window. List of files: /linux/drivers/clk/ralink/Makefile Tue, 07 Nov 2023 00:42:08 +0100 Dmitry Torokhov <dmitry.torokhov@gmail.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#34069d12e239ae8f36dd96c378e4622fb1c42a76 Merge tag 'v6.5' into nextSync up with mainline to bring in updates to the shared infrastructure. List of files: /linux/drivers/clk/ralink/Makefile Tue, 05 Sep 2023 23:08:14 +0200 Dmitry Torokhov <dmitry.torokhov@gmail.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#2612e3bbc0386368a850140a6c9b990cd496a5ec Merge drm/drm-next into drm-intel-nextCatching-up with drm-next and drm-intel-gt-next.It will unblock a code refactor around the platformdefinitions (names vs acronyms).Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> List of files: /linux/drivers/clk/ralink/Makefile Mon, 07 Aug 2023 23:14:42 +0200 Rodrigo Vivi <rodrigo.vivi@intel.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#9f771739a04919226081a107167596de75108fbb Merge drm/drm-next into drm-intel-gt-nextNeed to pull in b3e4aae612ec ("drm/i915/hdcp: Modify hdcp_gsc_message msg sending mechanism") asa dependency for https://patchwork.freedesktop.org/series/121735/Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> List of files: /linux/drivers/clk/ralink/Makefile Mon, 07 Aug 2023 12:29:40 +0200 Joonas Lahtinen <joonas.lahtinen@linux.intel.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#61b7369483efb5e0a9f3b48e75fac00d46d661e0 Merge drm/drm-next into drm-misc-nextBackmerging to get v6.5-rc2.Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> List of files: /linux/drivers/clk/ralink/Makefile Mon, 24 Jul 2023 15:44:47 +0200 Thomas Zimmermann <tzimmermann@suse.de> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#0791faebfe750292a8a842b64795a390ca4a3b51 ASoC: Merge v6.5-rc2Get a similar baseline to my other branches, and fixes for people usingthe branch. List of files: /linux/drivers/clk/ralink/Makefile Mon, 17 Jul 2023 07:12:31 +0200 Mark Brown <broonie@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#2f98e686ef59b5d19af5847d755798e2031bee3a Merge v6.5-rc1 into drm-misc-fixesBoris needs 6.5-rc1 in drm-misc-fixes to prevent a conflict.Signed-off-by: Maxime Ripard <mripard@kernel.org> List of files: /linux/drivers/clk/ralink/Makefile Tue, 11 Jul 2023 09:23:20 +0200 Maxime Ripard <mripard@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#44f10dbefd5e41b3385af91f855a57aa2afaf40e Merge branch 'master' into mm-hotfixes-stable List of files: /linux/drivers/clk/ralink/Makefile Fri, 30 Jun 2023 17:41:39 +0200 Andrew Morton <akpm@linux-foundation.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#b775d6c5859affe00527cbe74263de05cfe6b9f9 Merge tag 'mips_6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxPull MIPS updates from Thomas Bogendoerfer: - add support for TP-Link HC220 G5 v1 - add support for Wifi/Bluetooth on CI20 - rework Ralink clock and reset handling - cleanups and fixes* tag 'mips_6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (58 commits) MIPS: Loongson64: DTS: Add RTC support to Loongson-2K1000 MIPS: Loongson64: DTS: Add RTC support to LS7A PCH MIPS: OCTEON: octeon-usb: cleanup divider calculation MIPS: OCTEON: octeon-usb: introduce dwc3_octeon_{read,write}q MIPS: OCTEON: octeon-usb: move gpio config to separate function MIPS: OCTEON: octeon-usb: use bitfields for shim register MIPS: OCTEON: octeon-usb: use bitfields for host config register MIPS: OCTEON: octeon-usb: use bitfields for control register MIPS: OCTEON: octeon-usb: add all register offsets mips: ralink: match all supported system controller compatible strings MIPS: dec: prom: Address -Warray-bounds warning MIPS: DTS: CI20: Raise VDDCORE voltage to 1.125 volts clk: ralink: mtmips: Fix uninitialized use of ret in mtmips_register_{fixed,factor}_clocks() mips: ralink: introduce commonly used remap node function mips: pci-mt7620: use dev_info() to log PCIe device detection result mips: pci-mt7620: do not print NFTS register value as error log MAINTAINERS: add Mediatek MTMIPS Clock maintainer mips: ralink: get cpu rate from new driver code mips: ralink: remove reset related code mips: ralink: mt7620: remove clock related code ... List of files: /linux/drivers/clk/ralink/Makefile Fri, 30 Jun 2023 00:01:51 +0200 Linus Torvalds <torvalds@linux-foundation.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#6f3b15586eef736831abe6a14f2a6906bc0dc074 clk: ralink: add clock and reset driver for MTMIPS SoCsUntil now, clock related code for old ralink SoCs was based in fixed clocksusing 'clk_register_fixed_rate' and 'clkdev_create' directly doing in codeand not using device tree at all for their definition. Including this driveris an effort to be able to define proper clocks using device tree and alsocleaning all the clock and reset related code from 'arch/mips/ralink' dir.This clock and reset driver covers all the ralink SoCs but MT7621 which isthe newest and provides gating and some differences that make it differentfrom its predecesors. It has its own driver since some time ago. The ralinkSoCs we are taking about are RT2880, RT3050, RT3052, RT3350, RT3352, RT3883,RT5350, MT7620, MT7628 and MT7688. Mostly the code in this new driver hasbeen extracted from 'arch/mips/ralink' and cleanly put using kernel clockdriver APIs. The clock plans for this SoCs only talks about relation betweenCPU frequency and BUS frequency. This relation is different depending on theparticular SoC. CPU clock is derived from XTAL frequencies.Depending on the SoC we have the following frequencies:* RT2880 SoC: - XTAL: 40 MHz. - CPU: 250, 266, 280 or 300 MHz. - BUS: CPU / 2 MHz.* RT3050, RT3052, RT3350: - XTAL: 40 MHz. - CPU: 320 or 384 MHz. - BUS: CPU / 3 MHz.* RT3352: - XTAL: 40 MHz. - CPU: 384 or 400 MHz. - BUS: CPU / 3 MHz. - PERIPH: 40 MHz.* RT3383: - XTAL: 40 MHz. - CPU: 250, 384, 480 or 500 MHz. - BUS: Depends on RAM Type and CPU: + RAM DDR2: 125. ELSE 83 MHz. + RAM DDR2: 128. ELSE 96 MHz. + RAM DDR2: 160. ELSE 120 MHz. + RAM DDR2: 166. ELSE 125 MHz.* RT5350: - XTAL: 40 MHz. - CPU: 300, 320 or 360 MHz. - BUS: CPU / 3, CPU / 4, CPU / 3 MHz. - PERIPH: 40 MHz.* MT7628 and MT7688: - XTAL: 20 MHz or 40 MHz. - CPU: 575 or 580 MHz. - BUS: CPU / 3. - PCMI2S: 480 MHz. - PERIPH: 40 MHz.* MT7620: - XTAL: 20 MHz or 40 MHz. - PLL: XTAL, 480, 600 MHz. - CPU: depends on PLL and some mult and dividers. - BUS: depends on PLL and some mult and dividers. - PERIPH: 40 or XTAL MHz.MT7620 is a bit more complex deriving CPU clock from a PLL and an bunch ofregister reads and predividers. To derive CPU and BUS frequencies in theMT7620 SoC 'mt7620_calc_rate()' helper is used.In the case XTAL can have different frequencies and we need a differentclock frequency for peripherals 'periph' clock in introduced.The rest of the peripherals present in the SoC just follow their parentfrequencies.With this information the clk driver will provide all the clock and resetfunctionality from a set of hardcoded clocks allowing to define a nicedevice tree without fixed clocks.Acked-by: Stephen Boyd <sboyd@kernel.org>Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> List of files: /linux/drivers/clk/ralink/Makefile Mon, 19 Jun 2023 06:09:34 +0200 Sergio Paracuellos <sergio.paracuellos@gmail.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#8be98d2f2a0a262f8bf8a0bc1fdf522b3c7aab17 Merge branch 'next' into for-linusPrepare input updates for 5.15 merge window. List of files: /linux/drivers/clk/ralink/Makefile Mon, 06 Sep 2021 03:58:05 +0200 Dmitry Torokhov <dmitry.torokhov@gmail.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#320424c7d44f54c18df9812fd7c45f6963524002 Merge tag 'v5.13' into nextSync up with the mainline to get the latest parport API. List of files: /linux/drivers/clk/ralink/Makefile Mon, 19 Jul 2021 03:56:58 +0200 Dmitry Torokhov <dmitry.torokhov@gmail.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#c441bfb5f2866de71e092c1b9d866a65978dfe1a Merge tag 'v5.13-rc3' into asoc-5.13Linux 5.13-rc3 List of files: /linux/drivers/clk/ralink/Makefile Wed, 09 Jun 2021 12:52:35 +0200 Mark Brown <broonie@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#942baad211336efefb93a8369478888ab845c450 Merge drm/drm-next into drm-intel-gt-nextPulling in -rc2 fixes and TTM changes that next upcoming patches dependon.Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> List of files: /linux/drivers/clk/ralink/Makefile Wed, 02 Jun 2021 09:18:45 +0200 Joonas Lahtinen <joonas.lahtinen@linux.intel.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#c37fe6aff89cb0d842993fe2f69e48bf3ebe0ab0 Merge tag 'v5.13-rc2' into spi-5.13Linux 5.13-rc2 List of files: /linux/drivers/clk/ralink/Makefile Tue, 18 May 2021 18:24:52 +0200 Mark Brown <broonie@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#85ebe5aeef9b0bf4c91ff91652b32f9c54f71d34 Merge branch 'fixes-rc1' into fixes List of files: /linux/drivers/clk/ralink/Makefile Tue, 18 May 2021 08:45:08 +0200 Tony Lindgren <tony@atomide.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#d22fe808f9a3456f16015e79f1b86a10ce13099f Merge drm/drm-next into drm-intel-nextTime to get back in sync...Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> List of files: /linux/drivers/clk/ralink/Makefile Mon, 17 May 2021 23:48:02 +0200 Rodrigo Vivi <rodrigo.vivi@intel.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#fd531024bad7e5799e968ca70c0d3ca7b96b71ef Merge drm/drm-next into drm-misc-nextBackmerging to get v5.12 fixes. Requested for vmwgfx.Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> List of files: /linux/drivers/clk/ralink/Makefile Tue, 11 May 2021 15:59:18 +0200 Thomas Zimmermann <tzimmermann@suse.de> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#c55b44c9386f3ee1b08752638559f19deaf6040d Merge drm/drm-fixes into drm-misc-fixesStart this new release drm-misc-fixes branchSigned-off-by: Maxime Ripard <maxime@cerno.tech> List of files: /linux/drivers/clk/ralink/Makefile Tue, 11 May 2021 13:35:52 +0200 Maxime Ripard <maxime@cerno.tech> http://kernelsources.org:8080/source/history/linux/drivers/clk/ralink/Makefile#35655ceb31b56cd1cb52635a725dfcdb9662d7b7 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxPull clk updates from Stephen Boyd: "Here's a collection of largely clk driver updates. The usual suspects are here: i.MX, Qualcomm, Renesas, Allwinner, Samsung, and Rockchip, but it feels pretty light on commits. There's only one real commit to the framework core and that's to consolidate code. Otherwise the diffstat is dominated by many Qualcomm clk driver patches that modernize the driver for the proper way of speciying clk parents. That's shifting data around, which could subtly break things so I'll be on the lookout for fixes. New Drivers: - Proper clk driver for Mediatek MT7621 SoCs - Support for the clock controller on the new Rockchip rk3568 Updates: - Simplify Zynq Kconfig dependencies - Use clk_hw pointers in socfpga driver - Cleanup parent data in qcom clk drivers - Some cleanups for rk3399 modularization - Fix reparenting of i.MX UART clocks by initializing only the ones associated to stdout - Correct the PCIE clocks for i.MX8MP and i.MX8MQ - Make i.MX LPCG and SCU clocks return on registering failure - Kernel doc fixes - Add DAB hardware accelerator clocks on Renesas R-Car E3 and M3-N - Add timer (TMU) clocks on Renesas R-Car H3 ES1.0 - Add Timer (TMU & CMT) and thermal sensor (TSC) clocks on Renesas R-Car V3U - Sigma-delta modulation on Allwinner V3s audio PLL"* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (82 commits) MAINTAINERS: add MT7621 CLOCK maintainer staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk' staging: mt7621-dts: make use of new 'mt7621-clk' clk: ralink: add clock driver for mt7621 SoC clk: uniphier: Fix potential infinite loop clk: qcom: rpmh: add support for SDX55 rpmh IPA clock clk: qcom: gcc-sdm845: get rid of the test clock clk: qcom: convert SDM845 Global Clock Controller to parent_data dt-bindings: clock: separate SDM845 GCC clock bindings clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE dt: bindings: add mt7621-sysc device tree binding documentation dt-bindings: clock: add dt binding header for mt7621 clocks clk: samsung: Remove redundant dev_err calls clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback clk: zynqmp: Drop dependency on ARCH_ZYNQMP clk: zynqmp: Enable the driver if ZYNQMP_FIRMWARE is selected clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents ... List of files: /linux/drivers/clk/ralink/Makefile Thu, 29 Apr 2021 02:13:56 +0200 Linus Torvalds <torvalds@linux-foundation.org>