Changes in Kconfig

0fc8f6200d2313278fbf4539bbab74677c685531 - Merge drm/drm-fixes into drm-misc-fixes

Mon, 27 Apr 2026 10:26:49 +0200

Merge drm/drm-fixes into drm-misc-fixesGetting fixes and updates from v7.1-rc1.Signed-off-by: Thomas Zimmermann List of files: /linux/drivers/clk/Kconfig

f4b369c6fe0ceaba2da2daff8c9eb415f85926dd - Merge branch 'next' into for-linus

Mon, 20 Apr 2026 03:28:57 +0200

Merge branch 'next' into for-linusPrepare input updates for 7.1 merge window. List of files: /linux/drivers/clk/Kconfig

0421ccdfad0d92713a812a5aeb7d07b0ea7213c8 - Merge tag 'v7.0-rc3' into next

Thu, 12 Mar 2026 18:44:42 +0100

Merge tag 'v7.0-rc3' into nextSync up with the mainline to brig up the latest changes, specificallychanges to ALPS driver. List of files: /linux/drivers/clk/Kconfig

4ee64205ffaa587e8114d84a67ac721399ccb369 - Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Tue, 21 Apr 2026 17:33:26 +0200

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxPull clk updates from Stephen Boyd: "We've finally gotten rid of the struct clk_ops::round_rate() code after months of effort from Brian Masney. Now the only option is to use determine_rate(), which is good because that takes a struct argument instead of just a couple unsigned longs, allowing us to easily modify the way we determine and set rates in the clk tree. Beyond that core framework change we've got the typical pile of new SoC clk driver additions, fixes for clk data and/or adding missing clks because the consumer driver using those clks wasn't ready, etc. The usual suspects are all here: Qualcomm, Samsung, Mediatek, and Rockchip along with some newcomers making RISC-V SoCs like ESWIN's eic700 and Tenstorrent's Atlantis. The clk driver side of this looks pretty normal. Core: - Remove the round_rate() clk op (yay!) New Drivers: - ESWIN eic700 SoC clk support - Econet EN751221 SoC clock/reset support - Global TCSR, RPMh, and display clock controller support for the Qualcomm Eliza platform - TCSR, the multiple global, and the RPMh clock controller support for the Qualcomm Nord platform - GPU clock controller support for Qualcomm SM8750 - Video and GPU clock controller support for Qualcomm Glymur - Global clock controller support for Qualcomm IPQ5210 - Axis ARTPEC-9: Add new PLL clocks and new drivers for eight clock controllers on the SoC - ExynosAutov920: Add G3D (GPU) clock controller - Clock driver for the Rockchip RV1103B SoC - Initial support for the Renesas RZ/G3L (R9A08G046) SoC - Clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC"* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (132 commits) clk: visconti: pll: initialize clk_init_data to zero clk: fsl-sai: Add MCLK generation support clk: fsl-sai: Extract clock setup into fsl_sai_clk_register() dt-bindings: clock: fsl-sai: Document clock-cells = <1> support clk: fsl-sai: Add i.MX8M support with 8 byte register offset clk: fsl-sai: Sort the headers dt-bindings: clock: fsl-sai: Document i.MX8M support clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC clk: qcom: rpmh: Add support for Nord rpmh clocks clk: qcom: Add TCSR clock driver for Nord SoC dt-bindings: clock: qcom: Add Nord Global Clock Controller dt-bindings: clock: qcom-rpmhcc: Add support for Nord SoCs dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller clk: qcom: gcc-x1e80100: Keep GCC USB QTB clock always ON clk: qcom: Constify list of critical CBCR registers clk: qcom: Constify qcom_cc_driver_data clk: qcom: videocc-glymur: Constify qcom_cc_desc clk: qcom: Add a driver for SM8750 GPU clocks dt-bindings: clock: qcom: Add SM8750 GPU clocks clk: qcom: ipq-cmn-pll: Add IPQ8074 SoC support ... List of files: /linux/drivers/clk/Kconfig

3e9e952bb3139ad1e08f3e1960239c2988ab90c9 - Merge branch 'for-7.1-printf-kunit-build' into for-linus

Mon, 20 Apr 2026 13:41:28 +0200

Merge branch 'for-7.1-printf-kunit-build' into for-linus List of files: /linux/drivers/clk/Kconfig

d730905bc3c0075275b2d109cd971735274b98c0 - Merge tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Fri, 17 Apr 2026 17:53:23 +0200

Merge tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxPull MIPS updates from Thomas Bogendoerfer: - Support for Mobileye EyeQ6Lplus - Cleanups and fixes* tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits) MIPS/mtd: Handle READY GPIO in generic NAND platform data MIPS/input: Move RB532 button to GPIO descriptors MIPS: validate DT bootargs before appending them MIPS: Alchemy: Remove unused forward declaration MAINTAINERS: Mobileye: Add EyeQ6Lplus files MIPS: config: add eyeq6lplus_defconfig MIPS: Add Mobileye EyeQ6Lplus evaluation board dts MIPS: Add Mobileye EyeQ6Lplus SoC dtsi clk: eyeq: Add Mobileye EyeQ6Lplus OLB clk: eyeq: Adjust PLL accuracy computation clk: eyeq: Skip post-divisor when computing PLL frequency pinctrl: eyeq5: Add Mobileye EyeQ6Lplus OLB pinctrl: eyeq5: Use match data reset: eyeq: Add Mobileye EyeQ6Lplus OLB MIPS: Add Mobileye EyeQ6Lplus support dt-bindings: soc: mobileye: Add EyeQ6Lplus OLB dt-bindings: mips: Add Mobileye EyeQ6Lplus SoC MIPS: dts: loongson64g-package: Switch to Loongson UART driver mips: pci-mt7620: rework initialization procedure mips: pci-mt7620: add more register init values ... List of files: /linux/drivers/clk/Kconfig

d4eb7b2da66c848709e31585b9c371fa234abc39 - Merge branch 'for-7.1/core-v2' into for-linus

Thu, 16 Apr 2026 21:01:18 +0200

Merge branch 'for-7.1/core-v2' into for-linus- fixed handling of 0-sized reports (Dmitry Torokhov)- convert core code to __free() (Dmitry Torokhov)- support for multiple batteries per HID device (Lucas Zampieri) List of files: /linux/drivers/clk/Kconfig

6b701fde9b31f085f39fc2a371cb33212fab6f68 - Merge branches 'clk-samsung', 'clk-qcom', 'clk-round', 'clk-sai' and 'clk-cleanup' into clk-next

Thu, 16 Apr 2026 19:12:43 +0200

Merge branches 'clk-samsung', 'clk-qcom', 'clk-round', 'clk-sai' and 'clk-cleanup' into clk-next* clk-samsung: clk: samsung: exynos850: Add APM-to-AP mailbox clock dt-bindings: clock: exynos850: Add APM_AP MAILBOX clock clk: samsung: Use %pe format to simplify clk: samsung: pll: Fix possible truncation in a9fraco recalc rate clk: samsung: exynosautov920: add block G3D clock support dt-bindings: clock: exynosautov920: add G3D clock definitions clk: samsung: gs101: harmonise symbol names (clock arrays) clk: samsung: artpec-9: Add initial clock support for ARTPEC-9 SoC clk: samsung: Add clock PLL support for ARTPEC-9 SoC dt-bindings: clock: Add ARTPEC-9 clock controller* clk-qcom: (67 commits) clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC clk: qcom: rpmh: Add support for Nord rpmh clocks clk: qcom: Add TCSR clock driver for Nord SoC dt-bindings: clock: qcom: Add Nord Global Clock Controller dt-bindings: clock: qcom-rpmhcc: Add support for Nord SoCs dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller clk: qcom: gcc-x1e80100: Keep GCC USB QTB clock always ON clk: qcom: Constify list of critical CBCR registers clk: qcom: Constify qcom_cc_driver_data clk: qcom: videocc-glymur: Constify qcom_cc_desc clk: qcom: Add a driver for SM8750 GPU clocks dt-bindings: clock: qcom: Add SM8750 GPU clocks clk: qcom: ipq-cmn-pll: Add IPQ8074 SoC support dt-bindings: clock: qcom: Add CMN PLL support for IPQ8074 clk: qcom: ipq-cmn-pll: Add IPQ6018 SoC support dt-bindings: clock: qcom: Add CMN PLL support for IPQ6018 clk: qcom: gdsc: Fix error path on registration of multiple pm subdomains dt-bindings: clock: qcom: Add missing power-domains property clk: qcom: gcc-eliza: Enable FORCE_MEM_CORE_ON for UFS AXI PHY clock clk: qcom: dispcc-sc7180: Add missing MDSS resets ...* clk-round: clk: divider: remove divider_round_rate() and divider_round_rate_parent() clk: divider: remove divider_ro_round_rate_parent() clk: remove round_rate() clk ops clk: composite: convert from round_rate() to determine_rate() clk: test: remove references to clk_ops.round_rate* clk-sai: clk: fsl-sai: Add MCLK generation support clk: fsl-sai: Extract clock setup into fsl_sai_clk_register() dt-bindings: clock: fsl-sai: Document clock-cells = <1> support clk: fsl-sai: Add i.MX8M support with 8 byte register offset clk: fsl-sai: Sort the headers dt-bindings: clock: fsl-sai: Document i.MX8M support* clk-cleanup: clk: visconti: pll: initialize clk_init_data to zero clk: xgene: Fix mapping leak in xgene_pllclk_init() clk: Simplify clk_is_match() clk: baikal-t1: Remove not-going-to-be-supported code for Baikal SoC clk: mvebu: armada-37xx-periph: fix __iomem casts in structure init clk: qoriq: avoid format string warning List of files: /linux/drivers/clk/Kconfig

522a83abc36eb374d532a3db326ee1d3aab1d367 - Merge branches 'clk-tenstorrent', 'clk-rockchip', 'clk-imx' and 'clk-allwinner' into clk-next

Thu, 16 Apr 2026 19:12:33 +0200

Merge branches 'clk-tenstorrent', 'clk-rockchip', 'clk-imx' and 'clk-allwinner' into clk-next* clk-tenstorrent: clk: tenstorrent: Add Atlantis clock controller driver reset: tenstorrent: Add reset controller for Atlantis dt-bindings: clk: tenstorrent: Add tenstorrent,atlantis-prcm-rcpu* clk-rockchip: clk: rockchip: rk3568: Add PCIe pipe clock gates clk: rockchip: Add clock controller for the RV1103B dt-bindings: clock: rockchip: Add RV1103B CRU support* clk-imx: clk: imx8mq: Correct the CSI PHY sels clk: vf610: Add support for the Ethernet switch clocks dt-bindings: clock: vf610: Add definitions for MTIP L2 switch dt-bindings: clock: vf610: Drop VF610_CLK_END define clk: vf610: Move VF610_CLK_END define to clk-vf610 driver clk: imx: imx8-acm: fix flags for acm clocks clk: imx: imx6q: Fix device node reference leak in of_assigned_ldb_sels() clk: imx: imx6q: Fix device node reference leak in pll6_bypassed() clk: imx: fracn-gppll: Add 477.4MHz support clk: imx: fracn-gppll: Add 333.333333 MHz support clk: imx: pll14xx: Use unsigned format specifier dt-bindings: clock: imx6q[ul]-clock: add optional clock enet[1]_ref_pad* clk-allwinner: clk: sunxi-ng: sun55i-a523-r: Add missing r-spi module clock List of files: /linux/drivers/clk/Kconfig

699646e684aa8ca8dca6ab68c4f5fff87d456790 - Merge branches 'clk-fixes', 'clk-renesas', 'clk-rpi', 'clk-eswin' and 'clk-mediatek' into clk-next

Thu, 16 Apr 2026 19:07:47 +0200

Merge branches 'clk-fixes', 'clk-renesas', 'clk-rpi', 'clk-eswin' and 'clk-mediatek' into clk-next - ESWIN eic700 SoC clk support - Econet EN751221 SoC clock/reset support* clk-fixes: clk: spacemit: ccu_mix: fix inverted condition in ccu_mix_trigger_fc() clk: microchip: mpfs-ccc: fix out of bounds access during output registration clk: qcom: dispcc-sm8450: use RCG2 ops for DPTX1 AUX clock source* clk-renesas: clk: renesas: Add support for RZ/G3L SoC dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC clk: renesas: rzg2l: Re-enable critical module clocks during resume clk: renesas: rzg2l: Add rzg2l_mod_clock_init_mstop_helper() clk: renesas: rzg2l: Add helper for mod clock enable/disable clk: renesas: r9a0{7g04[34],8g045}: Add critical reset entries clk: renesas: rzg2l: Add support for critical resets clk: renesas: r9a09g056: Remove entries for WDT{0,2,3} clk: renesas: r9a06g032: Enable watchdog reset sources clk: renesas: cpg-mssr: Use struct_size() helper clk: renesas: r9a09g047: Add PCIe clocks and reset clk: renesas: r9a09g057: Add PCIe clocks and reset clk: renesas: r9a09g056: Add PCIe clocks and reset clk: renesas: r9a09g047: Add entries for the RSPIs clk: renesas: r9a09g056: Add clock and reset entries for RTC clk: renesas: r9a09g057: Remove entries for WDT{0,2,3} clk: renesas: r9a09g056: Fix ordering of module clocks array clk: renesas: r9a09g057: Fix ordering of module clocks array* clk-rpi: clk: bcm: rpi: Manage clock rate in prepare/unprepare callbacks* clk-eswin: MAINTAINERS: Add entry for ESWIN EIC7700 clock driver clk: eswin: Add eic7700 clock driver clk: divider: Add devm_clk_hw_register_divider_parent_data dt-bindings: clock: eswin: Documentation for eic7700 SoC* clk-mediatek: clk: airoha: Add econet EN751221 clock/reset support to en7523-scu dt-bindings: clock, reset: Add econet EN751221 List of files: /linux/drivers/clk/Kconfig

4eb9ed3933e541ed96416608033620f64eea39f5 - clk: eyeq: Add Mobileye EyeQ6Lplus OLB

Mon, 16 Mar 2026 16:25:46 +0100

clk: eyeq: Add Mobileye EyeQ6Lplus OLBDeclare the PLLs and fixed factors found in the EyeQ6Lplus OLB as partof the match data for the "mobileye,eyeq6lplus-olb" compatible.The PLL and fixed factor of the CPU are registered in early init as theyare required during the boot by the GIC timer.Also select clk-eyeq for all EYEQ SoCs instead of listing each oneindividually, as it is needed by all Mobileye EyeQ SoC.Signed-off-by: Benoît Monin Acked-by: Stephen Boyd Signed-off-by: Thomas Bogendoerfer List of files: /linux/drivers/clk/Kconfig

c206085b2678840df7f99018cac048a4f7b21d8a - clk: fsl-sai: Add i.MX8M support with 8 byte register offset

Thu, 09 Apr 2026 02:29:03 +0200

clk: fsl-sai: Add i.MX8M support with 8 byte register offsetThe i.MX8M/Mini/Nano/Plus variant of the SAI IP has control registersshifted by +8 bytes and requires additional bus clock. Add support forthe i.MX8M variant of the IP with this register shift and additionalclock.Reviewed-by: Brian Masney Reviewed-by: Peng Fan Signed-off-by: Marek Vasut Signed-off-by: Stephen Boyd List of files: /linux/drivers/clk/Kconfig

5aa81ab21de30b7b058202102f052289115298ef - Merge tag 'tenstorrent-clk-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux into clk-tenstorrent

Sun, 12 Apr 2026 00:55:13 +0200

Merge tag 'tenstorrent-clk-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux into clk-tenstorrentPull Tenstorrent clk driver updates from Drew Fustini: - Clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC* tag 'tenstorrent-clk-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux: clk: tenstorrent: Add Atlantis clock controller driver reset: tenstorrent: Add reset controller for Atlantis dt-bindings: clk: tenstorrent: Add tenstorrent,atlantis-prcm-rcpu List of files: /linux/drivers/clk/Kconfig

d8b034525fd9541f23c5a3c54cd1dbe716570e97 - clk: airoha: Add econet EN751221 clock/reset support to en7523-scu

Thu, 12 Mar 2026 17:24:49 +0100

clk: airoha: Add econet EN751221 clock/reset support to en7523-scuEcoNet EN751221 clock/reset driver is significantly similar to theEN7523 / EN7581, however the EN751221 does not have a neat batch of clockdivider registers so there are fewer known clocks, and the frequency ofeach clock is derived differently. This clock driver will probably workcorrectly on EN751627, EN7528, and EN7580.Signed-off-by: Caleb James DeLisle Reviewed-by: Brian Masney Signed-off-by: Stephen Boyd List of files: /linux/drivers/clk/Kconfig

cd44f127c1d42833a32ba0a0965255ee6184f8c1 - clk: eswin: Add eic7700 clock driver

Tue, 03 Mar 2026 09:07:12 +0100

clk: eswin: Add eic7700 clock driverAdd clock drivers for the EIC7700 SoC. The clock controller on the ESWINEIC7700 provides various clocks to different IP blocks within the SoC.Signed-off-by: Yifeng Huang Tested-by: Marcel Ziswiler # ebc77Reviewed-by: Brian Masney Signed-off-by: Xuyang Dong Tested-by: Bo Gan # hfp550Signed-off-by: Stephen Boyd List of files: /linux/drivers/clk/Kconfig

5d6c477687aeb158df9ec95580270146778f6af1 - clk: baikal-t1: Remove not-going-to-be-supported code for Baikal SoC

Tue, 24 Feb 2026 12:17:18 +0100

clk: baikal-t1: Remove not-going-to-be-supported code for Baikal SoCAs noticed in the discussion [1] the Baikal SoC and platformsare not going to be finalized, hence remove stale code.Reviewed-by: Brian Masney Link: https://lore.kernel.org/lkml/22b92ddf-6321-41b5-8073-f9c7064d3432@infradead.org/ [1]Signed-off-by: Andy Shevchenko Acked-by: Rob Herring (Arm) Reviewed-by: Randy Dunlap Signed-off-by: Stephen Boyd List of files: /linux/drivers/clk/Kconfig

42d3b66d4cdbacfc9d120d2301b8de89cc29a914 - Merge drm/drm-next into drm-xe-next

Thu, 12 Mar 2026 15:17:56 +0100

Merge drm/drm-next into drm-xe-nextBackmerging to bring in 7.00-rc3. Important ahead GPU SVM merging THPsupport.Signed-off-by: Matthew Brost List of files: /linux/drivers/clk/Kconfig

23c8ebc952849b3ba47d04d0ec95daf5cc136061 - clk: tenstorrent: Add Atlantis clock controller driver

Fri, 06 Mar 2026 18:12:19 +0100

clk: tenstorrent: Add Atlantis clock controller driverAdd driver for clock controller in Tenstorrent Atlantis SoC. This versionof the driver covers clocks from RCPU subsystem.5 types of clocks generated by this controller: PLLs (PLLswith bypass functionality and an additional Gate clk at output), SharedGates (Multiple Gate clks that share an enable bit), standard Muxes,Dividers and Gates. All clocks are implemented using custom clk ops anduse the regmap interface associated with the syscon. All clocks are derivedfrom a 24 Mhz oscillator.The reset controller is also setup as an auxiliary device of the clockcontroller.Signed-off-by: Anirudh Srinivasan Reviewed-by: Brian Masney Reviewed-by: Drew Fustini Signed-off-by: Drew Fustini List of files: /linux/drivers/clk/Kconfig

f09812b85fa6f41058bcc46e70ac406bf9b0493a - Merge drm/drm-next into drm-intel-next

Wed, 25 Feb 2026 12:23:04 +0100

Merge drm/drm-next into drm-intel-nextSync with v7.0-rc1 which contains a few treewide changes affecting i915.Signed-off-by: Jani Nikula List of files: /linux/drivers/clk/Kconfig

8b85987d3cf50178f67618122d9f3bb202f62f42 - Merge drm/drm-next into drm-misc-next

Mon, 23 Feb 2026 11:48:20 +0100

Merge drm/drm-next into drm-misc-nextLet's merge 7.0-rc1 to start the new drm-misc-next windowSigned-off-by: Maxime Ripard List of files: /linux/drivers/clk/Kconfig