Changes in amd_cache_disable.c

c17ee635fd3a482b2ad2bf5e269755c2eae5f25e - Merge drm/drm-fixes into drm-misc-fixes

Mon, 23 Feb 2026 10:09:45 +0100

Merge drm/drm-fixes into drm-misc-fixes7.0-rc1 was just released, let's merge it to kick the new release cycle.Signed-off-by: Maxime Ripard List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

bf4afc53b77aeaa48b5409da5c8da6bb4eff7f43 - Convert 'alloc_obj' family to use the new default GFP_KERNEL argument

Sun, 22 Feb 2026 01:37:42 +0100

Convert 'alloc_obj' family to use the new default GFP_KERNEL argumentThis was done entirely with mindless brute force, using git grep -l '\ List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

8934827db5403eae57d4537114a9ff88b0a8460f - Merge tag 'kmalloc_obj-treewide-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux

Sat, 21 Feb 2026 20:02:58 +0100

Merge tag 'kmalloc_obj-treewide-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linuxPull kmalloc_obj conversion from Kees Cook: "This does the tree-wide conversion to kmalloc_obj() and friends using coccinelle, with a subsequent small manual cleanup of whitespace alignment that coccinelle does not handle. This uncovered a clang bug in __builtin_counted_by_ref(), so the conversion is preceded by disabling that for current versions of clang. The imminent clang 22.1 release has the fix. I've done allmodconfig build tests for x86_64, arm64, i386, and arm. I did defconfig builds for alpha, m68k, mips, parisc, powerpc, riscv, s390, sparc, sh, arc, csky, xtensa, hexagon, and openrisc"* tag 'kmalloc_obj-treewide-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux: kmalloc_obj: Clean up after treewide replacements treewide: Replace kmalloc with kmalloc_obj for non-scalar types compiler_types: Disable __builtin_counted_by_ref for Clang List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

69050f8d6d075dc01af7a5f2f550a8067510366f - treewide: Replace kmalloc with kmalloc_obj for non-scalar types

Sat, 21 Feb 2026 08:49:23 +0100

treewide: Replace kmalloc with kmalloc_obj for non-scalar typesThis is the result of running the Coccinelle script fromscripts/coccinelle/api/kmalloc_objs.cocci. The script is designed toavoid scalar types (which need careful case-by-case checking), andinstead replace kmalloc-family calls that allocate struct or unionobject instances:Single allocations: kmalloc(sizeof(TYPE), ...)are replaced with: kmalloc_obj(TYPE, ...)Array allocations: kmalloc_array(COUNT, sizeof(TYPE), ...)are replaced with: kmalloc_objs(TYPE, COUNT, ...)Flex array allocations: kmalloc(struct_size(PTR, FAM, COUNT), ...)are replaced with: kmalloc_flex(*PTR, FAM, COUNT, ...)(where TYPE may also be *VAR)The resulting allocations no longer return "void *", instead returning"TYPE *".Signed-off-by: Kees Cook List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

f088104d837a991c65e51fa30bb4196169b3244d - Merge drm/drm-next into drm-intel-gt-next

Tue, 16 Sep 2025 12:53:20 +0200

Merge drm/drm-next into drm-intel-gt-nextBackmerge in order to get the commit: 048832a3f400 ("drm/i915: Refactor shmem_pwrite() to use kiocb and write_iter")To drm-intel-gt-next as there are followup fixes to be applied.Signed-off-by: Joonas Lahtinen List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

ab93e0dd72c37d378dd936f031ffb83ff2bd87ce - Merge branch 'next' into for-linus

Wed, 06 Aug 2025 19:08:54 +0200

Merge branch 'next' into for-linusPrepare input updates for 6.17 merge window. List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

a7bee4e7f78089c101be2ad51f4b5ec64782053e - Merge tag 'ib-mfd-gpio-input-pwm-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into next

Mon, 04 Aug 2025 08:28:48 +0200

Merge tag 'ib-mfd-gpio-input-pwm-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into nextMerge an immutable branch between MFD, GPIO, Input and PWM to resolveconflicts for the merge window pull request. List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

74f1af95820fc2ee580a775a3a17c416db30b38c - Merge remote-tracking branch 'drm/drm-next' into msm-next

Sun, 29 Jun 2025 04:54:49 +0200

Merge remote-tracking branch 'drm/drm-next' into msm-nextBack-merge drm-next to (indirectly) get arm-smmu updates for makingstall-on-fault more reliable.Signed-off-by: Rob Clark List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

c598d5eb9fb331ba17bc9ad67ae9a2231ca5aca5 - Merge drm/drm-next into drm-misc-next

Wed, 11 Jun 2025 09:01:34 +0200

Merge drm/drm-next into drm-misc-nextBackmerging to forward to v6.16-rc1Signed-off-by: Thomas Zimmermann List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

86e2d052c2320bf12571a5d96b16c2745e1cfc5e - Merge drm/drm-next into drm-xe-next

Mon, 09 Jun 2025 18:26:55 +0200

Merge drm/drm-next into drm-xe-nextBackmerging to bring in 6.16Signed-off-by: Thomas Hellström List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

34c55367af96f62e89221444f04487440ebc6487 - Merge drm/drm-next into drm-intel-next

Mon, 09 Jun 2025 11:40:46 +0200

Merge drm/drm-next into drm-intel-nextSync to v6.16-rc1, among other things to get the fixed size GENMASK_U*()and BIT_U*() macros.Signed-off-by: Jani Nikula List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

785cdec46e9227f9433884ed3b436471e944007c - Merge tag 'x86-core-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Tue, 27 May 2025 01:04:17 +0200

Merge tag 'x86-core-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipPull core x86 updates from Ingo Molnar: "Boot code changes: - A large series of changes to reorganize the x86 boot code into a better isolated and easier to maintain base of PIC early startup code in arch/x86/boot/startup/, by Ard Biesheuvel. Motivation & background: | Since commit | | c88d71508e36 ("x86/boot/64: Rewrite startup_64() in C") | | dated Jun 6 2017, we have been using C code on the boot path in a way | that is not supported by the toolchain, i.e., to execute non-PIC C | code from a mapping of memory that is different from the one provided | to the linker. It should have been obvious at the time that this was a | bad idea, given the need to sprinkle fixup_pointer() calls left and | right to manipulate global variables (including non-pointer variables) | without crashing. | | This C startup code has been expanding, and in particular, the SEV-SNP | startup code has been expanding over the past couple of years, and | grown many of these warts, where the C code needs to use special | annotations or helpers to access global objects. This tree includes the first phase of this work-in-progress x86 boot code reorganization. Scalability enhancements and micro-optimizations: - Improve code-patching scalability (Eric Dumazet) - Remove MFENCEs for X86_BUG_CLFLUSH_MONITOR (Andrew Cooper) CPU features enumeration updates: - Thorough reorganization and cleanup of CPUID parsing APIs (Ahmed S. Darwish) - Fix, refactor and clean up the cacheinfo code (Ahmed S. Darwish, Thomas Gleixner) - Update CPUID bitfields to x86-cpuid-db v2.3 (Ahmed S. Darwish) Memory management changes: - Allow temporary MMs when IRQs are on (Andy Lutomirski) - Opt-in to IRQs-off activate_mm() (Andy Lutomirski) - Simplify choose_new_asid() and generate better code (Borislav Petkov) - Simplify 32-bit PAE page table handling (Dave Hansen) - Always use dynamic memory layout (Kirill A. Shutemov) - Make SPARSEMEM_VMEMMAP the only memory model (Kirill A. Shutemov) - Make 5-level paging support unconditional (Kirill A. Shutemov) - Stop prefetching current->mm->mmap_lock on page faults (Mateusz Guzik) - Predict valid_user_address() returning true (Mateusz Guzik) - Consolidate initmem_init() (Mike Rapoport) FPU support and vector computing: - Enable Intel APX support (Chang S. Bae) - Reorgnize and clean up the xstate code (Chang S. Bae) - Make task_struct::thread constant size (Ingo Molnar) - Restore fpu_thread_struct_whitelist() to fix CONFIG_HARDENED_USERCOPY=y (Kees Cook) - Simplify the switch_fpu_prepare() + switch_fpu_finish() logic (Oleg Nesterov) - Always preserve non-user xfeatures/flags in __state_perm (Sean Christopherson) Microcode loader changes: - Help users notice when running old Intel microcode (Dave Hansen) - AMD: Do not return error when microcode update is not necessary (Annie Li) - AMD: Clean the cache if update did not load microcode (Boris Ostrovsky) Code patching (alternatives) changes: - Simplify, reorganize and clean up the x86 text-patching code (Ingo Molnar) - Make smp_text_poke_batch_process() subsume smp_text_poke_batch_finish() (Nikolay Borisov) - Refactor the {,un}use_temporary_mm() code (Peter Zijlstra) Debugging support: - Add early IDT and GDT loading to debug relocate_kernel() bugs (David Woodhouse) - Print the reason for the last reset on modern AMD CPUs (Yazen Ghannam) - Add AMD Zen debugging document (Mario Limonciello) - Fix opcode map (!REX2) superscript tags (Masami Hiramatsu) - Stop decoding i64 instructions in x86-64 mode at opcode (Masami Hiramatsu) CPU bugs and bug mitigations: - Remove X86_BUG_MMIO_UNKNOWN (Borislav Petkov) - Fix SRSO reporting on Zen1/2 with SMT disabled (Borislav Petkov) - Restructure and harmonize the various CPU bug mitigation methods (David Kaplan) - Fix spectre_v2 mitigation default on Intel (Pawan Gupta) MSR API: - Large MSR code and API cleanup (Xin Li) - In-kernel MSR API type cleanups and renames (Ingo Molnar) PKEYS: - Simplify PKRU update in signal frame (Chang S. Bae) NMI handling code: - Clean up, refactor and simplify the NMI handling code (Sohil Mehta) - Improve NMI duration console printouts (Sohil Mehta) Paravirt guests interface: - Restrict PARAVIRT_XXL to 64-bit only (Kirill A. Shutemov) SEV support: - Share the sev_secrets_pa value again (Tom Lendacky) x86 platform changes: - Introduce the header namespace (Ingo Molnar) - i2c: piix4, x86/platform: Move the SB800 PIIX4 FCH definitions to (Mario Limonciello) Fixes and cleanups: - x86 assembly code cleanups and fixes (Uros Bizjak) - Misc fixes and cleanups (Andi Kleen, Andy Lutomirski, Andy Shevchenko, Ard Biesheuvel, Bagas Sanjaya, Baoquan He, Borislav Petkov, Chang S. Bae, Chao Gao, Dan Williams, Dave Hansen, David Kaplan, David Woodhouse, Eric Biggers, Ingo Molnar, Josh Poimboeuf, Juergen Gross, Malaya Kumar Rout, Mario Limonciello, Nathan Chancellor, Oleg Nesterov, Pawan Gupta, Peter Zijlstra, Shivank Garg, Sohil Mehta, Thomas Gleixner, Uros Bizjak, Xin Li)"* tag 'x86-core-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (331 commits) x86/bugs: Fix spectre_v2 mitigation default on Intel x86/bugs: Restructure ITS mitigation x86/xen/msr: Fix uninitialized variable 'err' x86/msr: Remove a superfluous inclusion of x86/paravirt: Restrict PARAVIRT_XXL to 64-bit only x86/mm/64: Make 5-level paging support unconditional x86/mm/64: Make SPARSEMEM_VMEMMAP the only memory model x86/mm/64: Always use dynamic memory layout x86/bugs: Fix indentation due to ITS merge x86/cpuid: Rename hypervisor_cpuid_base()/for_each_possible_hypervisor_cpuid_base() to cpuid_base_hypervisor()/for_each_possible_cpuid_base_hypervisor() x86/cpu/intel: Rename CPUID(0x2) descriptors iterator parameter x86/cacheinfo: Rename CPUID(0x2) descriptors iterator parameter x86/cpuid: Rename cpuid_get_leaf_0x2_regs() to cpuid_leaf_0x2() x86/cpuid: Rename have_cpuid_p() to cpuid_feature() x86/cpuid: Set as the main CPUID header x86/cpuid: Move CPUID(0x2) APIs into x86/msr: Add rdmsrl_on_cpu() compatibility wrapper x86/mm: Fix kernel-doc descriptions of various pgtable methods x86/asm-offsets: Export certain 'struct cpuinfo_x86' fields for 64-bit asm use too x86/boot: Defer initialization of VM space related global variables ... List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

2fb8414e644b133a9c3250f408232af99da256a4 - Merge branch 'x86/cpu' into x86/core, to resolve conflicts

Tue, 13 May 2025 10:37:01 +0200

Merge branch 'x86/cpu' into x86/core, to resolve conflicts Conflicts: arch/x86/kernel/cpu/bugs.cSigned-off-by: Ingo Molnar List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

c96f564e6f943cf5d8536e1c43f243aa7c42b4ed - Merge branch 'x86/cpu' into x86/microcode, to pick up dependent commits

Tue, 22 Apr 2025 08:31:41 +0200

Merge branch 'x86/cpu' into x86/microcode, to pick up dependent commitsAvoid a conflict in by merging pending x86/cpu changes.Signed-off-by: Ingo Molnar List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

4e2547509f472d77d5c6d27feae318ac9d5eba5d - Merge branch 'x86/cpu' into x86/fpu, to pick up dependent commits

Wed, 16 Apr 2025 09:35:49 +0200

Merge branch 'x86/cpu' into x86/fpu, to pick up dependent commitsSigned-off-by: Ingo Molnar List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

bcbb65559532891148d990527e9df6b8fc98e98d - x86/platform/amd: Move the header to

Mon, 14 Apr 2025 09:32:04 +0200

x86/platform/amd: Move the header to Collect AMD specific platform header files in .Signed-off-by: Ingo Molnar Acked-by: Borislav Petkov (AMD) Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Mario Limonciello Link: https://lore.kernel.org/r/20250413084144.3746608-4-mingo@kernel.org List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

071f4ad6494aff76589ca30a2d13e74bc1e33e0f - x86/cacheinfo: Use sysfs_emit() for sysfs attributes show()

Mon, 24 Mar 2025 14:33:09 +0100

x86/cacheinfo: Use sysfs_emit() for sysfs attributes show()Per Documentation/filesystems/sysfs.rst, a sysfs attribute's show()method should only use sysfs_emit() or sysfs_emit_at() when returningvalues to user space.Use sysfs_emit() for the AMD L3 cache sysfs attributes cache_disable_0,cache_disable_1, and subcaches.Signed-off-by: Ahmed S. Darwish Signed-off-by: Ingo Molnar Cc: H. Peter Anvin Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250324133324.23458-15-darwi@linutronix.de List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c

365e960d296ef9f36b20971aa4854ce07817a9bb - x86/cacheinfo: Move AMD cache_disable_0/1 handling to separate file

Mon, 24 Mar 2025 14:33:08 +0100

x86/cacheinfo: Move AMD cache_disable_0/1 handling to separate fileParent commit decoupled amd_northbridge out of _cpuid4_info_regs, whereit was merely "parked" there until ci_info_init() can store it in theprivate pointer of the API.Given that decoupling, move the AMD-specific L3 cache_disable_0/1 sysfscode from the generic (and already extremely convoluted) x86/cacheinfocode into its own file.Compile the file only if CONFIG_AMD_NB and CONFIG_SYSFS are bothenabled, which mirrors the existing logic.Signed-off-by: Ahmed S. Darwish Signed-off-by: Ingo Molnar Cc: H. Peter Anvin Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250324133324.23458-14-darwi@linutronix.de List of files: /linux/arch/x86/kernel/cpu/amd_cache_disable.c