Changes in Makefile

0fc8f6200d2313278fbf4539bbab74677c685531 - Merge drm/drm-fixes into drm-misc-fixes

Mon, 27 Apr 2026 10:26:49 +0200

Merge drm/drm-fixes into drm-misc-fixesGetting fixes and updates from v7.1-rc1.Signed-off-by: Thomas Zimmermann List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

01f492e1817e858d1712f2489d0afbaa552f417b - Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Fri, 17 Apr 2026 16:18:03 +0200

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmPull kvm updates from Paolo Bonzini: "Arm: - Add support for tracing in the standalone EL2 hypervisor code, which should help both debugging and performance analysis. This uses the new infrastructure for 'remote' trace buffers that can be exposed by non-kernel entities such as firmware, and which came through the tracing tree - Add support for GICv5 Per Processor Interrupts (PPIs), as the starting point for supporting the new GIC architecture in KVM - Finally add support for pKVM protected guests, where pages are unmapped from the host as they are faulted into the guest and can be shared back from the guest using pKVM hypercalls. Protected guests are created using a new machine type identifier. As the elusive guestmem has not yet delivered on its promises, anonymous memory is also supported This is only a first step towards full isolation from the host; for example, the CPU register state and DMA accesses are not yet isolated. Because this does not really yet bring fully what it promises, it is hidden behind CONFIG_ARM_PKVM_GUEST + 'kvm-arm.mode=protected', and also triggers TAINT_USER when a VM is created. Caveat emptor - Rework the dreaded user_mem_abort() function to make it more maintainable, reducing the amount of state being exposed to the various helpers and rendering a substantial amount of state immutable - Expand the Stage-2 page table dumper to support NV shadow page tables on a per-VM basis - Tidy up the pKVM PSCI proxy code to be slightly less hard to follow - Fix both SPE and TRBE in non-VHE configurations so that they do not generate spurious, out of context table walks that ultimately lead to very bad HW lockups - A small set of patches fixing the Stage-2 MMU freeing in error cases - Tighten-up accepted SMC immediate value to be only #0 for host SMCCC calls - The usual cleanups and other selftest churn LoongArch: - Use CSR_CRMD_PLV for kvm_arch_vcpu_in_kernel() - Add DMSINTC irqchip in kernel support RISC-V: - Fix steal time shared memory alignment checks - Fix vector context allocation leak - Fix array out-of-bounds in pmu_ctr_read() and pmu_fw_ctr_read_hi() - Fix double-free of sdata in kvm_pmu_clear_snapshot_area() - Fix integer overflow in kvm_pmu_validate_counter_mask() - Fix shift-out-of-bounds in make_xfence_request() - Fix lost write protection on huge pages during dirty logging - Split huge pages during fault handling for dirty logging - Skip CSR restore if VCPU is reloaded on the same core - Implement kvm_arch_has_default_irqchip() for KVM selftests - Factored-out ISA checks into separate sources - Added hideleg to struct kvm_vcpu_config - Factored-out VCPU config into separate sources - Support configuration of per-VM HGATP mode from KVM user space s390: - Support for ESA (31-bit) guests inside nested hypervisors - Remove restriction on memslot alignment, which is not needed anymore with the new gmap code - Fix LPSW/E to update the bear (which of course is the breaking event address register) x86: - Shut up various UBSAN warnings on reading module parameter before they were initialized - Don't zero-allocate page tables that are used for splitting hugepages in the TDP MMU, as KVM is guaranteed to set all SPTEs in the page table and thus write all bytes - As an optimization, bail early when trying to unsync 4KiB mappings if the target gfn can just be mapped with a 2MiB hugepage x86 generic: - Copy single-chunk MMIO write values into struct kvm_vcpu (more precisely struct kvm_mmio_fragment) to fix use-after-free stack bugs where KVM would dereference stack pointer after an exit to userspace - Clean up and comment the emulated MMIO code to try to make it easier to maintain (not necessarily "easy", but "easier") - Move VMXON+VMXOFF and EFER.SVME toggling out of KVM (not *all* of VMX and SVM enabling) as it is needed for trusted I/O - Advertise support for AVX512 Bit Matrix Multiply (BMM) instructions - Immediately fail the build if a required #define is missing in one of KVM's headers that is included multiple times - Reject SET_GUEST_DEBUG with -EBUSY if there's an already injected exception, mostly to prevent syzkaller from abusing the uAPI to trigger WARNs, but also because it can help prevent userspace from unintentionally crashing the VM - Exempt SMM from CPUID faulting on Intel, as per the spec - Misc hardening and cleanup changes x86 (AMD): - Fix and optimize IRQ window inhibit handling for AVIC; make it per-vCPU so that KVM doesn't prematurely re-enable AVIC if multiple vCPUs have to-be-injected IRQs - Clean up and optimize the OSVW handling, avoiding a bug in which KVM would overwrite state when enabling virtualization on multiple CPUs in parallel. This should not be a problem because OSVW should usually be the same for all CPUs - Drop a WARN in KVM_MEMORY_ENCRYPT_REG_REGION where KVM complains about a "too large" size based purely on user input - Clean up and harden the pinning code for KVM_MEMORY_ENCRYPT_REG_REGION - Disallow synchronizing a VMSA of an already-launched/encrypted vCPU, as doing so for an SNP guest will crash the host due to an RMP violation page fault - Overhaul KVM's APIs for detecting SEV+ guests so that VM-scoped queries are required to hold kvm->lock, and enforce it by lockdep. Fix various bugs where sev_guest() was not ensured to be stable for the whole duration of a function or ioctl - Convert a pile of kvm->lock SEV code to guard() - Play nicer with userspace that does not enable KVM_CAP_EXCEPTION_PAYLOAD, for which KVM needs to set CR2 and DR6 as a response to ioctls such as KVM_GET_VCPU_EVENTS (even if the payload would end up in EXITINFO2 rather than CR2, for example). Only set CR2 and DR6 when consumption of the payload is imminent, but on the other hand force delivery of the payload in all paths where userspace retrieves CR2 or DR6 - Use vcpu->arch.cr2 when updating vmcb12's CR2 on nested #VMEXIT instead of vmcb02->save.cr2. The value is out of sync after a save/restore or after a #PF is injected into L2 - Fix a class of nSVM bugs where some fields written by the CPU are not synchronized from vmcb02 to cached vmcb12 after VMRUN, and so are not up-to-date when saved by KVM_GET_NESTED_STATE - Fix a class of bugs where the ordering between KVM_SET_NESTED_STATE and KVM_SET_{S}REGS could cause vmcb02 to be incorrectly initialized after save+restore - Add a variety of missing nSVM consistency checks - Fix several bugs where KVM failed to correctly update VMCB fields on nested #VMEXIT - Fix several bugs where KVM failed to correctly synthesize #UD or #GP for SVM-related instructions - Add support for save+restore of virtualized LBRs (on SVM) - Refactor various helpers and macros to improve clarity and (hopefully) make the code easier to maintain - Aggressively sanitize fields when copying from vmcb12, to guard against unintentionally allowing L1 to utilize yet-to-be-defined features - Fix several bugs where KVM botched rAX legality checks when emulating SVM instructions. There are remaining issues in that KVM doesn't handle size prefix overrides for 64-bit guests - Fail emulation of VMRUN/VMLOAD/VMSAVE if mapping vmcb12 fails instead of somewhat arbitrarily synthesizing #GP (i.e. don't double down on AMD's architectural but sketchy behavior of generating #GP for "unsupported" addresses) - Cache all used vmcb12 fields to further harden against TOCTOU bugs x86 (Intel): - Drop obsolete branch hint prefixes from the VMX instruction macros - Use ASM_INPUT_RM() in __vmcs_writel() to coerce clang into using a register input when appropriate - Code cleanups guest_memfd: - Don't mark guest_memfd folios as accessed, as guest_memfd doesn't support reclaim, the memory is unevictable, and there is no storage to write back to LoongArch selftests: - Add KVM PMU test cases s390 selftests: - Enable more memory selftests x86 selftests: - Add support for Hygon CPUs in KVM selftests - Fix a bug in the MSR test where it would get false failures on AMD/Hygon CPUs with exactly one of RDPID or RDTSCP - Add an MADV_COLLAPSE testcase for guest_memfd as a regression test for a bug where the kernel would attempt to collapse guest_memfd folios against KVM's will"* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (373 commits) KVM: x86: use inlines instead of macros for is_sev_*guest x86/virt: Treat SVM as unsupported when running as an SEV+ guest KVM: SEV: Goto an existing error label if charging misc_cg for an ASID fails KVM: SVM: Move lock-protected allocation of SEV ASID into a separate helper KVM: SEV: use mutex guard in snp_handle_guest_req() KVM: SEV: use mutex guard in sev_mem_enc_unregister_region() KVM: SEV: use mutex guard in sev_mem_enc_ioctl() KVM: SEV: use mutex guard in snp_launch_update() KVM: SEV: Assert that kvm->lock is held when querying SEV+ support KVM: SEV: Document that checking for SEV+ guests when reclaiming memory is "safe" KVM: SEV: Hide "struct kvm_sev_info" behind CONFIG_KVM_AMD_SEV=y KVM: SEV: WARN on unhandled VM type when initializing VM KVM: LoongArch: selftests: Add PMU overflow interrupt test KVM: LoongArch: selftests: Add basic PMU event counting test KVM: LoongArch: selftests: Add cpucfg read/write helpers LoongArch: KVM: Add DMSINTC inject msi to vCPU LoongArch: KVM: Add DMSINTC device support LoongArch: KVM: Make vcpu_is_preempted() as a macro rather than function LoongArch: KVM: Move host CSR_GSTAT save and restore in context switch LoongArch: KVM: Move host CSR_EENTRY save and restore in context switch ... List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

e74c3a8891c05f88eeb87121de7e12dc95766a4a - Merge tag 'kvmarm-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

Mon, 13 Apr 2026 11:49:54 +0200

Merge tag 'kvmarm-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEADKVM/arm64 updates for 7.1* New features:- Add support for tracing in the standalone EL2 hypervisor code, which should help both debugging and performance analysis. This comes with a full infrastructure for 'remote' trace buffers that can be exposed by non-kernel entities such as firmware.- Add support for GICv5 Per Processor Interrupts (PPIs), as the starting point for supporting the new GIC architecture in KVM.- Finally add support for pKVM protected guests, with anonymous memory being used as a backing store. About time!* Improvements and bug fixes:- Rework the dreaded user_mem_abort() function to make it more maintainable, reducing the amount of state being exposed to the various helpers and rendering a substantial amount of state immutable.- Expand the Stage-2 page table dumper to support NV shadow page tables on a per-VM basis.- Tidy up the pKVM PSCI proxy code to be slightly less hard to follow.- Fix both SPE and TRBE in non-VHE configurations so that they do not generate spurious, out of context table walks that ultimately lead to very bad HW lockups.- A small set of patches fixing the Stage-2 MMU freeing in error cases.- Tighten-up accepted SMC immediate value to be only #0 for host SMCCC calls.- The usual cleanups and other selftest churn. List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

f8078d51ee232c8d4fa552d30e06c641b944e2c2 - Merge branch kvm-arm64/vgic-v5-ppi into kvmarm-master/next

Wed, 08 Apr 2026 13:22:35 +0200

Merge branch kvm-arm64/vgic-v5-ppi into kvmarm-master/next* kvm-arm64/vgic-v5-ppi: (40 commits) : . : Add initial GICv5 support for KVM guests, only adding PPI support : for the time being. Patches courtesy of Sascha Bischoff. : : From the cover letter: : : "This is v7 of the patch series to add the virtual GICv5 [1] device : (vgic_v5). Only PPIs are supported by this initial series, and the : vgic_v5 implementation is restricted to the CPU interface, : only. Further patch series are to follow in due course, and will add : support for SPIs, LPIs, the GICv5 IRS, and the GICv5 ITS." : . KVM: arm64: selftests: Add no-vgic-v5 selftest KVM: arm64: selftests: Introduce a minimal GICv5 PPI selftest KVM: arm64: gic-v5: Communicate userspace-driveable PPIs via a UAPI Documentation: KVM: Introduce documentation for VGICv5 KVM: arm64: gic-v5: Probe for GICv5 device KVM: arm64: gic-v5: Set ICH_VCTLR_EL2.En on boot KVM: arm64: gic-v5: Introduce kvm_arm_vgic_v5_ops and register them KVM: arm64: gic-v5: Hide FEAT_GCIE from NV GICv5 guests KVM: arm64: gic: Hide GICv5 for protected guests KVM: arm64: gic-v5: Mandate architected PPI for PMU emulation on GICv5 KVM: arm64: gic-v5: Enlighten arch timer for GICv5 irqchip/gic-v5: Introduce minimal irq_set_type() for PPIs KVM: arm64: gic-v5: Initialise ID and priority bits when resetting vcpu KVM: arm64: gic-v5: Create and initialise vgic_v5 KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE KVM: arm64: gic-v5: Implement direct injection of PPIs KVM: arm64: Introduce set_direct_injection irq_op KVM: arm64: gic-v5: Trap and mask guest ICC_PPI_ENABLERx_EL1 writes KVM: arm64: gic-v5: Check for pending PPIs KVM: arm64: gic-v5: Clear TWI if single task running ...Signed-off-by: Marc Zyngier List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

2de32a25a3f721052c9aaf753a65b96f63c2c7d9 - Merge branch kvm-arm64/hyp-tracing into kvmarm-master/next

Wed, 08 Apr 2026 13:21:51 +0200

Merge branch kvm-arm64/hyp-tracing into kvmarm-master/next* kvm-arm64/hyp-tracing: (40 commits) : . : EL2 tracing support, adding both 'remote' ring-buffer : infrastructure and the tracing itself, courtesy of : Vincent Donnefort. From the cover letter: : : "The growing set of features supported by the hypervisor in protected : mode necessitates debugging and profiling tools. Tracefs is the : ideal candidate for this task: : : * It is simple to use and to script. : : * It is supported by various tools, from the trace-cmd CLI to the : Android web-based perfetto. : : * The ring-buffer, where are stored trace events consists of linked : pages, making it an ideal structure for sharing between kernel and : hypervisor. : : This series first introduces a new generic way of creating remote events and : remote buffers. Then it adds support to the pKVM hypervisor." : . tracing: selftests: Extend hotplug testing for trace remotes tracing: Non-consuming read for trace remotes with an offline CPU tracing: Adjust cmd_check_undefined to show unexpected undefined symbols tracing: Restore accidentally removed SPDX tag KVM: arm64: avoid unused-variable warning tracing: Generate undef symbols allowlist for simple_ring_buffer KVM: arm64: tracing: add ftrace dependency tracing: add more symbols to whitelist tracing: Update undefined symbols allow list for simple_ring_buffer KVM: arm64: Fix out-of-tree build for nVHE/pKVM tracing tracing: selftests: Add hypervisor trace remote tests KVM: arm64: Add selftest event support to nVHE/pKVM hyp KVM: arm64: Add hyp_enter/hyp_exit events to nVHE/pKVM hyp KVM: arm64: Add event support to the nVHE/pKVM hyp and trace remote KVM: arm64: Add trace reset to the nVHE/pKVM hyp KVM: arm64: Sync boot clock with the nVHE/pKVM hyp KVM: arm64: Add trace remote for the nVHE/pKVM hyp KVM: arm64: Add tracing capability for the nVHE/pKVM hyp KVM: arm64: Support unaligned fixmap in the pKVM hyp KVM: arm64: Initialise hyp_nr_cpus for nVHE hyp ...Signed-off-by: Marc Zyngier List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

af325e87af5da2f686d1ad547edc96f731418f2a - KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp interface

Thu, 19 Mar 2026 16:53:52 +0100

KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp interfaceIntroduce the following hyp functions to save/restore GICv5 state:* __vgic_v5_save_apr()* __vgic_v5_restore_vmcr_apr()* __vgic_v5_save_ppi_state() - no hypercall required* __vgic_v5_restore_ppi_state() - no hypercall required* __vgic_v5_save_state() - no hypercall required* __vgic_v5_restore_state() - no hypercall requiredNote that the functions tagged as not requiring hypercalls are alwayscalled directly from the same context. They are either called via thevgic_save_state()/vgic_restore_state() path when running with VHE, orvia __hyp_vgic_save_state()/__hyp_vgic_restore_state() otherwise. Thismimics how vgic_v3_save_state()/vgic_v3_restore_state() areimplemented.Overall, the state of the following registers is saved/restored:* ICC_ICSR_EL1* ICH_APR_EL2* ICH_PPI_ACTIVERx_EL2* ICH_PPI_DVIRx_EL2* ICH_PPI_ENABLERx_EL2* ICH_PPI_PENDRx_EL2* ICH_PPI_PRIORITYRx_EL2* ICH_VMCR_EL2All of these are saved/restored to/from the KVM vgic_v5 CPUIF shadowstate, with the exception of the PPI active, pending, and enablestate. The pending state is saved and restored from kvm_host_data asany changes here need to be tracked and propagated back to thevgic_irq shadow structures (coming in a future commit). Therefore, anentry and an exit copy is required. The active and enable state isrestored from the vgic_v5 CPUIF, but is saved to kvm_host_data. Again,this needs to by synced back into the shadow data structures.The ICSR must be save/restored as this register is shared between hostand guest. Therefore, to avoid leaking host state to the guest, thismust be saved and restored. Moreover, as this can by used by the hostat any time, it must be save/restored eagerly. Note: the host state isnot preserved as the host should only use this register whenpreemption is disabled.As with GICv3, the VMCR is eagerly saved as this is required whenchecking if interrupts can be injected or not, and therefore impactsthings such as WFI.As part of restoring the ICH_VMCR_EL2 and ICH_APR_EL2, GICv3-compatmode is also disabled by setting the ICH_VCTLR_EL2.V3 bit to 0. Thecorrespoinding GICv3-compat mode enable is part of the VMCR & APRrestore for a GICv3 guest as it only takes effect when actuallyrunning a guest.Co-authored-by: Timothy Hayes Signed-off-by: Timothy Hayes Signed-off-by: Sascha Bischoff Link: https://patch.msgid.link/20260319154937.3619520-17-sascha.bischoff@arm.comSigned-off-by: Marc Zyngier List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

ce6a2badf58170bcf73489cd73981bb5775c1e22 - KVM: arm64: Fix out-of-tree build for nVHE/pKVM tracing

Wed, 11 Mar 2026 17:49:56 +0100

KVM: arm64: Fix out-of-tree build for nVHE/pKVM tracingsimple_ring_buffer.c is located in the source tree and isn't duplicatedto objtree. Fix its include path.Signed-off-by: Vincent Donnefort Link: https://patch.msgid.link/20260311164956.1424119-1-vdonnefort@google.comSigned-off-by: Marc Zyngier List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

0a90fbc8a1709f682e0196c2632027cdedae5e94 - KVM: arm64: Add event support to the nVHE/pKVM hyp and trace remote

Mon, 09 Mar 2026 17:25:13 +0100

KVM: arm64: Add event support to the nVHE/pKVM hyp and trace remoteAllow the creation of hypervisor and trace remote events with a singlemacro HYP_EVENT(). That macro expands in the kernel side to add allthe required declarations (based on REMOTE_EVENT()) as well as in thehypervisor side to create the trace_() function.Signed-off-by: Vincent Donnefort Link: https://patch.msgid.link/20260309162516.2623589-28-vdonnefort@google.comSigned-off-by: Marc Zyngier List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

680a04c333fa29bf92007efe11431be005e8c4bb - KVM: arm64: Add tracing capability for the nVHE/pKVM hyp

Mon, 09 Mar 2026 17:25:09 +0100

KVM: arm64: Add tracing capability for the nVHE/pKVM hypThere is currently no way to inspect or log what's happening at EL2when the nVHE or pKVM hypervisor is used. With the growing set offeatures for pKVM, the need for tooling is more pressing. And tracefs,by its reliability, versatility and support for user-space is fit forpurpose.Add support to write into a tracefs compatible ring-buffer. There's noway the hypervisor could log events directly into the host tracefsring-buffers. So instead let's use our own, where the hypervisor is thewriter and the host the reader.Signed-off-by: Vincent Donnefort Link: https://patch.msgid.link/20260309162516.2623589-24-vdonnefort@google.comSigned-off-by: Marc Zyngier List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

405df5b55748d93d44666fd6005c60981094a077 - KVM: arm64: Add clock support to nVHE/pKVM hyp

Mon, 09 Mar 2026 17:25:06 +0100

KVM: arm64: Add clock support to nVHE/pKVM hypIn preparation for supporting tracing from the nVHE hyp, add support togenerate timestamps with a clock fed by the CNTCVT counter. The clockcan be kept in sync with the kernel's by updating the slope values. Thiswill be done later.As current we do only create a trace clock, make the whole supportdependent on the upcoming CONFIG_NVHE_EL2_TRACING.Signed-off-by: Vincent Donnefort Link: https://patch.msgid.link/20260309162516.2623589-21-vdonnefort@google.comSigned-off-by: Marc Zyngier List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

a4a508df2aa34f8650afde54ea804321c618f45f - Merge tag 'v6.18' into next

Sat, 13 Dec 2025 10:18:20 +0100

Merge tag 'v6.18' into nextSync up with the mainline to bring in the latest APIs. List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

cb9f145f638d7afa633632a9290d6ad06caeb8ee - Merge remote-tracking branch 'drm/drm-next' into msm-next-robclark

Sat, 01 Nov 2025 13:47:30 +0100

Merge remote-tracking branch 'drm/drm-next' into msm-next-robclarkBack-merge drm-next to get caught up.Signed-off-by: Rob Clark List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

82ee50252dc891e3f3b32d923bb4f656d300b772 - Merge drm/drm-next into drm-xe-next

Tue, 14 Oct 2025 11:31:49 +0200

Merge drm/drm-next into drm-xe-nextBackmerging to bring in 6.18-rc1.Signed-off-by: Thomas Hellström List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

2acee98fcc61052d63fab4539fcb6ee677555645 - Merge drm/drm-next into drm-intel-next

Tue, 14 Oct 2025 09:37:11 +0200

Merge drm/drm-next into drm-intel-nextSync to v6.18-rc1.Signed-off-by: Jani Nikula List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

9b966ae42235a88eaea714be09ff3d698535bdfe - Merge drm/drm-next into drm-misc-next

Mon, 13 Oct 2025 09:19:19 +0200

Merge drm/drm-next into drm-misc-nextUpdating drm-misc-next to the state of v6.18-rc1.Signed-off-by: Thomas Zimmermann List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

39e9d5f63075f4d54e3b59b8238478c32af92755 - Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf before 6.18-rc1

Sun, 12 Oct 2025 03:27:47 +0200

Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf before 6.18-rc1Cross-merge BPF and other fixes after downstream PR.No conflicts.Signed-off-by: Alexei Starovoitov List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

f088104d837a991c65e51fa30bb4196169b3244d - Merge drm/drm-next into drm-intel-gt-next

Tue, 16 Sep 2025 12:53:20 +0200

Merge drm/drm-next into drm-intel-gt-nextBackmerge in order to get the commit: 048832a3f400 ("drm/i915: Refactor shmem_pwrite() to use kiocb and write_iter")To drm-intel-gt-next as there are followup fixes to be applied.Signed-off-by: Joonas Lahtinen List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

2ace52718376fdb56aca863da2eebe70d7e2ddb1 - Merge branch 'objtool/core'

Fri, 21 Nov 2025 11:21:20 +0100

Merge branch 'objtool/core'Bring in the UDB and objtool data annotations to avoid conflicts while further extending the bug exceptions.Signed-off-by: Peter Zijlstra List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

a53d0cf7f1cb3182ad533ff5cacfa5fd29c419ad - Merge commit 'linus' into core/bugs, to resolve conflicts

Tue, 05 Aug 2025 11:15:34 +0200

Merge commit 'linus' into core/bugs, to resolve conflictsResolve conflicts with this commit that was developed in parallelduring the merge window: 8c8efa93db68 ("x86/bug: Add ARCH_WARN_ASM macro for BUG/WARN asm code sharing with Rust") Conflicts: arch/riscv/include/asm/bug.h arch/x86/include/asm/bug.hSigned-off-by: Ingo Molnar List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile

f39b6c468c52745dbca9a842d91c8373fda208ab - Merge tag 'v6.18-rc6' into for-linus

Tue, 18 Nov 2025 08:16:55 +0100

Merge tag 'v6.18-rc6' into for-linusSync up with the mainline to bring in definition ofINPUT_PROP_HAPTIC_TOUCHPAD. List of files: /linux/arch/arm64/kvm/hyp/nvhe/Makefile