en Copyright 2015 Java http://kernelsources.org:8080/source/history/freebsd/lib/libpmc/pmc.perf.3#5369f8e73eff4772b133284012cb810e50d7c018 hwpmc: add MPERF/APERF MSR support for AMD/Intel CPUsAdd support for reading the MPERF (MSR 0xE7) and APERF (MSR 0xE8)model-specific registers on AMD/Intel CPUs through hwpmc(4). Thesecounters track maximum and actual performance frequency respectively,and are used to compute effective CPU frequency scaling independentof the nominal TSC rate. The name of the class was chosen as PERFbecause later support for other PERF MSRs can be added to the sameclass.Extend libpmc(3) to expose the AMD/Intel MPERF/APERF counters addedto hwpmc(4) in the companion kernel change, so userland consumers(pmcstat(8), etc.) can allocate and read these events by name.Document the new PERF class and its MPERF/APERF counters in a newpmc.perf.3 manual page, describing their semantics and how to readthem via pmc(3) and pmcstat(8).Bump PMC_VERSION_MINOR.Signed-off-by: Anderson Nascimento <anascime@amd.com>Reviewed by: Ali Mashtizadeh <ali@mashtizadeh.com>, mhorneReviewed by: ziaee (manpages)Sponsored by: AMDDifferential Revision: https://reviews.freebsd.org/D58647 List of files: /freebsd/lib/libpmc/pmc.perf.3 Thu, 03 Sep 2026 19:51:38 +0200 Anderson Nascimento <anascime@amd.com>