# # CDDL HEADER START # # The contents of this file are subject to the terms of the # Common Development and Distribution License, Version 1.0 only # (the "License"). You may not use this file except in compliance # with the License. # # You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE # or http://www.opensolaris.org/os/licensing. # See the License for the specific language governing permissions # and limitations under the License. # # When distributing Covered Code, include this CDDL HEADER in each # file and include the License file at usr/src/OPENSOLARIS.LICENSE. # If applicable, add the following below this CDDL HEADER, with the # fields enclosed by brackets "[]" replaced with your own identifying # information: Portions Copyright [yyyy] [name of copyright owner] # # CDDL HEADER END # # # Copyright 2005 Sun Microsystems, Inc. All rights reserved. # Use is subject to license terms. # #pragma ident "%Z%%M% %I% %E% SMI" # name="ppm" parent="pseudo" instance=0; # # ppm configuration format # # "ppm-domains" - in form of "domain_xxx" where "xxx" string highlights # the nature of the domain; # # "domain_xxx-model" - PM model: CPU, PCI, PCI_PROP, PCIE, FET or LED. # # "domain_xxx-propname" - a property name that is exported by device in # a domain. Currently, it is used by PCI_PROP model to identify devices # that are to have their clocks stopped when all power-manageable devices # in the domain are at D3 power level. # # "domain-xxx-devices" - a list of prom path match patterns to match devices # that fall into "domain_xxx", where wildcard '*' is allowed by observing # the following expectations: # . a single wildcard with exact match up to (but exclude) the wildcard # which then terminates the match pattern; # . a single wildcard that does not terminate a match pattern must # match driver name (followed by '@'); # . with two wildcard occurences, the first is to match driver name, # the second function id, as well as the last character of the match # pattern. # # "domain-xxx-ctrl" - blank space separated definitions in the form of # keyword=definition [keyword=definition...] # The keywords are as follows, where 'method' must come before mask as it # tells how to store 'mask' and 'val'. Missing 'val' defaults to 0. # # which keywords apply depends on cmd. There are two sets as shown below. # Here is the first: # cmd=[CPU_GO | LED_ON | LED_OFF | FET_ON | FET_OFF | CLK_ON | CLK_OFF] # path= - control device's prom pathname (includes minor) # method=[KIO|I2CKIO] This selects a method which may be # an ioctl that sets a single value or an i2c ioctl that # takes a value and a mask to access gpio register # iord= - value of ioctl command for reading # iowr= - value of ioctl command for writing # val= - a single integer value, generally the value to which # the relevant bits of a register will be set # mask= - which bits of val are relevant (if method is I2CKIO) # # Here is the second: # cmd=[CPU_NEXT | PRE_CHNG | POST_CHNG] # path= - control device's prom pathname, including minor # method=[CPUSPEEDKIO | VCORE] This selects a method that uses # information like cpu speed index, value for # adjust cpu core voltage, delays, etc. # iowr= - value of ioctl write command # speeds= - indicates the number of cpu speeds that are # supported ppm-domains="domain_cpu", "domain_diskfet1", "domain_diskfet2", "domain_diskfet3", "domain_diskfet4", "domain_led", "domain_pciegfx"; # # 0x6a02 is JBPPMIOC_NEXT (('j' << 8) | 2) # 0x6a03 is JBPPMIOC_GO (('j' << 8) | 3) # domain_cpu-devices="/SUNW,UltraSPARC-IIIi+@*"; domain_cpu-model="CPU"; domain_cpu-control= "cmd=CPU_NEXT path=/ppm@1f,0:jbus-ppm method=CPUSPEEDKIO iowr=0x6a02 speeds=3", "cmd=CPU_GO path=/ppm@1f,0:jbus-ppm method=KIO iowr=0x6a03 val=0"; # # iowr -- 0x4D82 is GPIO_SET_OUTPUT per sys/i2c/clients/i2c_gpio.h file # iord -- 0x4D80 is GPIO_GET_INPUT per sys/i2c/clients/i2c_gpio.h file # mask -- bit mask for control pin # val -- pin value to set on/off # delay -- minimum delay between FET off and FET on # post_delay -- delay after turning on/off the FET # domain_diskfet1-devices = "/pci@1e,600000/pci@0/pci@a/pci@0/LSILogic,sas@0/sd@0,0"; domain_diskfet1-model = "FET"; domain_diskfet1-control = "cmd=FET_ON path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x01 val=0x01 post_delay=1500000", "cmd=FET_OFF path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x01 val=0"; domain_diskfet2-devices = "/pci@1e,600000/pci@0/pci@a/pci@0/LSILogic,sas@0/sd@1,0"; domain_diskfet2-model = "FET"; domain_diskfet2-control = "cmd=FET_ON path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x02 val=0x02 post_delay=1500000", "cmd=FET_OFF path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x02 val=0"; domain_diskfet3-devices = "/pci@1e,600000/pci@0/pci@a/pci@0/LSILogic,sas@0/sd@2,0"; domain_diskfet3-model = "FET"; domain_diskfet3-control = "cmd=FET_ON path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x04 val=0x04 post_delay=1500000", "cmd=FET_OFF path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x04 val=0"; domain_diskfet4-devices = "/pci@1e,600000/pci@0/pci@a/pci@0/LSILogic,sas@0/sd@3,0"; domain_diskfet4-model = "FET"; domain_diskfet4-control = "cmd=FET_ON path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x08 val=0x08 post_delay=1500000", "cmd=FET_OFF path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x08 val=0"; # # Manipulate the front-panel LED. This platform uses ACTIVE low. # # Note: no devices to claim in this domain # domain_led-devices = ""; domain_led-model = "LED"; domain_led-control = "cmd=LED_ON path=/i2c@1f,530000/gpio@0,30 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x01 val=0x00", "cmd=LED_OFF path=/i2c@1f,530000/gpio@0,30 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x01 val=0x01"; # # PCI Express Primary Graphics Slot (directly attached to root complex(Fire)) # domain_pciegfx-devices = "/pci@1f,700000/*"; domain_pciegfx-model = "PCIE"; domain_pciegfx-control = "cmd=PRE_PWR_OFF path=/pci@1f,700000 method=KIO iowr=0x504D01 val=0x00", "cmd=PRE_PWR_ON path=/pci@1f,700000 method=KIO iowr=0x504D02 val=0x00", "cmd=POST_PWR_ON path=/pci@1f,700000 method=KIO iowr=0x504D03 val=0x00 post_delay=100000", "cmd=CLK_OFF path=/i2c@1f,530000/gpio@0,30 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x10 val=0x00", "cmd=CLK_ON path=/i2c@1f,530000/gpio@0,30 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x10 val=0x10", "cmd=PWR_OFF path=/i2c@1f,530000/gpio@0,30 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x08 val=0x00", "cmd=PWR_ON path=/i2c@1f,530000/gpio@0,30 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x08 val=0x08", "cmd=RESET_OFF path=/i2c@1f,530000/gpio@0,30 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x04 val=0x04 delay=10000", "cmd=RESET_ON path=/i2c@1f,530000/gpio@0,30 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x04 val=0x00";