// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright (C) 2022 MediaTek Inc. */ /dts-v1/; #include "mt8186.dtsi" #include #include #include #include #include / { aliases { i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; i2c5 = &i2c5; mmc0 = &mmc0; mmc1 = &mmc1; serial0 = &uart0; }; chosen { stdout-path = "serial0:115200n8"; }; memory@40000000 { device_type = "memory"; /* The size should be filled in by the bootloader. */ reg = <0 0x40000000 0 0>; }; backlight_lcd0: backlight-lcd0 { compatible = "pwm-backlight"; pwms = <&pwm0 0 500000>; power-supply = <&ppvar_sys>; enable-gpios = <&pio 152 0>; brightness-levels = <0 1023>; num-interpolated-steps = <1023>; default-brightness-level = <576>; }; bt-sco { compatible = "linux,bt-sco"; #sound-dai-cells = <0>; }; dmic-codec { compatible = "dmic-codec"; #sound-dai-cells = <0>; num-channels = <2>; wakeup-delay-ms = <50>; }; gpio_keys: gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pen_eject>; pen_insert: pen-insert-switch { label = "Pen Insert"; /* Insert = low, eject = high */ gpios = <&pio 18 GPIO_ACTIVE_LOW>; wakeup-event-action = ; wakeup-source; linux,code = ; linux,input-type = ; }; }; pp1800_dpbrdg_dx: regulator-pp1800-dpbrdg-dx { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&en_pp1800_dpbrdg>; gpios = <&pio 39 GPIO_ACTIVE_HIGH>; regulator-name = "pp1800_dpbrdg_dx"; enable-active-high; vin-supply = <&mt6366_vio18_reg>; }; pp3300_disp_x: regulator-pp3300-disp-x { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&edp_panel_fixed_pins>; gpios = <&pio 153 GPIO_ACTIVE_HIGH>; regulator-name = "pp3300_disp_x"; enable-active-high; regulator-boot-on; vin-supply = <&pp3300_z2>; }; /* system wide LDO 3.3V power rail */ pp3300_z5: regulator-pp3300-ldo-z5 { compatible = "regulator-fixed"; regulator-name = "pp3300_ldo_z5"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&ppvar_sys>; }; /* separately switched 3.3V power rail */ pp3300_s3: regulator-pp3300-s3 { compatible = "regulator-fixed"; regulator-name = "pp3300_s3"; /* automatically sequenced by PMIC EXT_PMIC_EN2 */ regulator-always-on; regulator-boot-on; vin-supply = <&pp3300_z2>; }; /* system wide 3.3V power rail */ pp3300_z2: regulator-pp3300-z2 { compatible = "regulator-fixed"; regulator-name = "pp3300_z2"; /* EN pin tied to pp4200_z2, which is controlled by EC */ regulator-always-on; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&ppvar_sys>; }; /* system wide 4.2V power rail */ pp4200_z2: regulator-pp4200-z2 { compatible = "regulator-fixed"; regulator-name = "pp4200_z2"; /* controlled by EC */ regulator-always-on; regulator-boot-on; regulator-min-microvolt = <4200000>; regulator-max-microvolt = <4200000>; vin-supply = <&ppvar_sys>; }; /* system wide switching 5.0V power rail */ pp5000_z2: regulator-pp5000-z2 { compatible = "regulator-fixed"; regulator-name = "pp5000_z2"; /* controlled by EC */ regulator-always-on; regulator-boot-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&ppvar_sys>; }; /* system wide semi-regulated power rail from battery or USB */ ppvar_sys: regulator-ppvar-sys { compatible = "regulator-fixed"; regulator-name = "ppvar_sys"; regulator-always-on; regulator-boot-on; }; reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; adsp_dma_mem: memory@61000000 { compatible = "shared-dma-pool"; reg = <0 0x61000000 0 0x100000>; no-map; }; adsp_mem: memory@60000000 { compatible = "shared-dma-pool"; reg = <0 0x60000000 0 0x1000000>; no-map; }; scp_mem: memory@50000000 { compatible = "shared-dma-pool"; reg = <0 0x50000000 0 0x10a0000>; no-map; }; }; sound: sound { compatible = "mediatek,mt8186-mt6366-rt1019-rt5682s-sound"; pinctrl-names = "aud_clk_mosi_off", "aud_clk_mosi_on", "aud_clk_miso_off", "aud_clk_miso_on", "aud_dat_miso_off", "aud_dat_miso_on", "aud_dat_mosi_off", "aud_dat_mosi_on", "aud_gpio_i2s0_off", "aud_gpio_i2s0_on", "aud_gpio_i2s1_off", "aud_gpio_i2s1_on", "aud_gpio_i2s2_off", "aud_gpio_i2s2_on", "aud_gpio_i2s3_off", "aud_gpio_i2s3_on", "aud_gpio_pcm_off", "aud_gpio_pcm_on", "aud_gpio_dmic_sec"; pinctrl-0 = <&aud_clk_mosi_off>; pinctrl-1 = <&aud_clk_mosi_on>; pinctrl-2 = <&aud_clk_miso_off>; pinctrl-3 = <&aud_clk_miso_on>; pinctrl-4 = <&aud_dat_miso_off>; pinctrl-5 = <&aud_dat_miso_on>; pinctrl-6 = <&aud_dat_mosi_off>; pinctrl-7 = <&aud_dat_mosi_on>; pinctrl-8 = <&aud_gpio_i2s0_off>; pinctrl-9 = <&aud_gpio_i2s0_on>; pinctrl-10 = <&aud_gpio_i2s1_off>; pinctrl-11 = <&aud_gpio_i2s1_on>; pinctrl-12 = <&aud_gpio_i2s2_off>; pinctrl-13 = <&aud_gpio_i2s2_on>; pinctrl-14 = <&aud_gpio_i2s3_off>; pinctrl-15 = <&aud_gpio_i2s3_on>; pinctrl-16 = <&aud_gpio_pcm_off>; pinctrl-17 = <&aud_gpio_pcm_on>; pinctrl-18 = <&aud_gpio_dmic_sec>; mediatek,adsp = <&adsp>; mediatek,platform = <&afe>; audio-routing = "Headphone", "HPOL", "Headphone", "HPOR", "IN1P", "Headset Mic", "Speakers", "Speaker", "HDMI1", "TX"; hs-playback-dai-link { link-name = "I2S0"; dai-format = "i2s"; mediatek,clk-provider = "cpu"; codec { sound-dai = <&rt5682s 0>; }; }; hs-capture-dai-link { link-name = "I2S1"; dai-format = "i2s"; mediatek,clk-provider = "cpu"; codec { sound-dai = <&rt5682s 0>; }; }; spk-share-dai-link { link-name = "I2S2"; mediatek,clk-provider = "cpu"; }; spk-hdmi-playback-dai-link { link-name = "I2S3"; dai-format = "i2s"; mediatek,clk-provider = "cpu"; /* RT1019P and IT6505 connected to the same I2S line */ codec { sound-dai = <&it6505dptx>, <&rt1019p>; }; }; }; rt1019p: speaker-codec { compatible = "realtek,rt1019p"; pinctrl-names = "default"; pinctrl-0 = <&rt1019p_pins_default>; #sound-dai-cells = <0>; sdb-gpios = <&pio 150 GPIO_ACTIVE_HIGH>; }; usb_p1_vbus: regulator-usb-p1-vbus { compatible = "regulator-fixed"; gpio = <&pio 148 GPIO_ACTIVE_HIGH>; regulator-name = "vbus1"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; vin-supply = <&pp5000_z2>; }; wifi_pwrseq: wifi-pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; pinctrl-0 = <&wifi_enable_pin>; post-power-on-delay-ms = <50>; reset-gpios = <&pio 54 GPIO_ACTIVE_LOW>; }; wifi_wakeup: wifi-wakeup { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&wifi_wakeup_pin>; wowlan-event { label = "Wake on WiFi"; gpios = <&pio 7 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; }; }; &adsp { memory-region = <&adsp_dma_mem>, <&adsp_mem>; status = "okay"; }; &afe { status = "okay"; }; &cci { proc-supply = <&mt6366_vproc12_reg>; }; &cpu0 { proc-supply = <&mt6366_vproc12_reg>; }; &cpu1 { proc-supply = <&mt6366_vproc12_reg>; }; &cpu2 { proc-supply = <&mt6366_vproc12_reg>; }; &cpu3 { proc-supply = <&mt6366_vproc12_reg>; }; &cpu4 { proc-supply = <&mt6366_vproc12_reg>; }; &cpu5 { proc-supply = <&mt6366_vproc12_reg>; }; &cpu6 { proc-supply = <&mt6366_vproc11_reg>; }; &cpu7 { proc-supply = <&mt6366_vproc11_reg>; }; &dpi { pinctrl-names = "default", "sleep"; pinctrl-0 = <&dpi_pins_default>; pinctrl-1 = <&dpi_pins_sleep>; /* TODO Re-enable after DP to Type-C port muxing can be described */ status = "disabled"; }; &dpi_out { remote-endpoint = <&it6505_in>; }; &dsi0 { status = "okay"; }; &gic { mediatek,broken-save-restore-fw; }; &gpu { mali-supply = <&mt6366_vgpu_reg>; status = "okay"; }; &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; status = "okay"; }; &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; clock-frequency = <400000>; i2c-scl-internal-delay-ns = <8000>; status = "okay"; }; &i2c2 { pinctrl-names = "default"; /* * Trackpad pin put here to work around second source components * sharing the pinmux in steelix designs. */ pinctrl-0 = <&i2c2_pins>, <&trackpad_pin>; clock-frequency = <400000>; i2c-scl-internal-delay-ns = <10000>; status = "okay"; trackpad@15 { compatible = "elan,ekth3000"; reg = <0x15>; interrupts-extended = <&pio 11 IRQ_TYPE_LEVEL_LOW>; vcc-supply = <&pp3300_s3>; wakeup-source; }; }; &i2c3 { pinctrl-names = "default"; pinctrl-0 = <&i2c3_pins>; clock-frequency = <100000>; status = "okay"; it6505dptx: dp-bridge@5c { compatible = "ite,it6505"; reg = <0x5c>; interrupts-extended = <&pio 8 IRQ_TYPE_LEVEL_LOW>; pinctrl-names = "default"; pinctrl-0 = <&it6505_pins>; #sound-dai-cells = <0>; ovdd-supply = <&mt6366_vsim2_reg>; pwr18-supply = <&pp1800_dpbrdg_dx>; reset-gpios = <&pio 177 GPIO_ACTIVE_HIGH>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; it6505_in: endpoint { link-frequencies = /bits/ 64 <150000000>; remote-endpoint = <&dpi_out>; }; }; port@1 { reg = <1>; }; }; }; }; &i2c5 { pinctrl-names = "default"; pinctrl-0 = <&i2c5_pins>; status = "okay"; rt5682s: codec@1a { compatible = "realtek,rt5682s"; reg = <0x1a>; interrupts-extended = <&pio 17 IRQ_TYPE_EDGE_BOTH>; #sound-dai-cells = <1>; AVDD-supply = <&mt6366_vio18_reg>; DBVDD-supply = <&mt6366_vio18_reg>; LDO1-IN-supply = <&mt6366_vio18_reg>; MICVDD-supply = <&pp3300_z2>; realtek,jd-src = <1>; }; }; &mfg0 { domain-supply = <&mt6366_vsram_gpu_reg>; }; &mfg1 { domain-supply = <&mt6366_vgpu_reg>; }; &mipi_tx0 { status = "okay"; }; &mmc0 { pinctrl-names = "default", "state_uhs"; pinctrl-0 = <&mmc0_pins_default>; pinctrl-1 = <&mmc0_pins_uhs>; bus-width = <8>; max-frequency = <200000000>; non-removable; cap-mmc-highspeed; mmc-hs200-1_8v; mmc-hs400-1_8v; supports-cqe; no-sd; no-sdio; cap-mmc-hw-reset; hs400-ds-delay = <0x11814>; mediatek,hs400-ds-dly3 = <0x14>; vmmc-supply = <&mt6366_vemc_reg>; vqmmc-supply = <&mt6366_vio18_reg>; status = "okay"; }; &mmc1 { pinctrl-names = "default", "state_uhs", "state_eint"; pinctrl-0 = <&mmc1_pins_default>; pinctrl-1 = <&mmc1_pins_uhs>; pinctrl-2 = <&mmc1_pins_eint>; /delete-property/ interrupts; interrupt-names = "msdc", "sdio_wakeup"; interrupts-extended = <&gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>, <&pio 87 IRQ_TYPE_LEVEL_LOW>; #address-cells = <1>; #size-cells = <0>; bus-width = <4>; max-frequency = <200000000>; cap-sd-highspeed; sd-uhs-sdr104; sd-uhs-sdr50; keep-power-in-suspend; wakeup-source; cap-sdio-irq; no-mmc; no-sd; non-removable; vmmc-supply = <&pp3300_s3>; vqmmc-supply = <&mt6366_vio18_reg>; mmc-pwrseq = <&wifi_pwrseq>; status = "okay"; bluetooth@2 { compatible = "mediatek,mt7921s-bluetooth"; reg = <2>; pinctrl-names = "default"; pinctrl-0 = <&bt_pins_reset>; reset-gpios = <&pio 155 GPIO_ACTIVE_LOW>; }; }; &nor_flash { assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D7_D4>; pinctrl-names = "default"; pinctrl-0 = <&nor_pins_default>; #address-cells = <1>; #size-cells = <0>; status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <39000000>; }; }; &pio { /* 185 lines */ gpio-line-names = "TP", "TP", "TP", "I2S0_HP_DI", "I2S3_DP_SPKR_DO", "SAR_INT_ODL", "BT_WAKE_AP_ODL", "WIFI_INT_ODL", "DPBRDG_INT_ODL", "EDPBRDG_INT_ODL", "EC_AP_HPD_OD", "TCHPAD_INT_ODL", "TCHSCR_INT_1V8_ODL", "EC_AP_INT_ODL", "EC_IN_RW_ODL", "GSC_AP_INT_ODL", /* AP_FLASH_WP_L is crossystem ABI. Rev1 schematics call it AP_WP_ODL. */ "AP_FLASH_WP_L", "HP_INT_ODL", "PEN_EJECT_OD", "WCAM_PWDN_L", "WCAM_RST_L", "UCAM_SEN_EN", "UCAM_RST_L", "LTE_RESET_L", "LTE_SAR_DETECT_L", "I2S2_DP_SPK_MCK", "I2S2_DP_SPKR_BCK", "I2S2_DP_SPKR_LRCK", "I2S2_DP_SPKR_DI (TP)", "EN_PP1000_EDPBRDG", "EN_PP1800_EDPBRDG", "EN_PP3300_EDPBRDG", "UART_GSC_TX_AP_RX", "UART_AP_TX_GSC_RX", "UART_DBGCON_TX_ADSP_RX", "UART_ADSP_TX_DBGCON_RX", "EN_PP1000_DPBRDG", "TCHSCR_REPORT_DISABLE", "EN_PP3300_DPBRDG", "EN_PP1800_DPBRDG", "SPI_AP_CLK_EC", "SPI_AP_CS_EC_L", "SPI_AP_DO_EC_DI", "SPI_AP_DI_EC_DO", "SPI_AP_CLK_GSC", "SPI_AP_CS_GSC_L", "SPI_AP_DO_GSC_DI", "SPI_AP_DI_GSC_DO", "UART_DBGCON_TX_SCP_RX", "UART_SCP_TX_DBGCON_RX", "EN_PP1200_CAM_X", "EN_PP2800A_VCM_X", "EN_PP2800A_UCAM_X", "EN_PP2800A_WCAM_X", "WLAN_MODULE_RST_L", "EN_PP1200_UCAM_X", "I2S1_HP_DO", "I2S1_HP_BCK", "I2S1_HP_LRCK", "I2S1_HP_MCK", "TCHSCR_RST_1V8_L", "SPI_AP_CLK_ROM", "SPI_AP_CS_ROM_L", "SPI_AP_DO_ROM_DI", "SPI_AP_DI_ROM_DO", "NC", "NC", "EMMC_STRB", "EMMC_CLK", "EMMC_CMD", "EMMC_RST_L", "EMMC_DATA0", "EMMC_DATA1", "EMMC_DATA2", "EMMC_DATA3", "EMMC_DATA4", "EMMC_DATA5", "EMMC_DATA6", "EMMC_DATA7", "AP_KPCOL0", "NC", "NC", "NC", "TP", "SDIO_CLK", "SDIO_CMD", "SDIO_DATA0", "SDIO_DATA1", "SDIO_DATA2", "SDIO_DATA3", "NC", "NC", "NC", "NC", "NC", "NC", "EDPBRDG_PWREN", "BL_PWM_1V8", "EDPBRDG_RST_L", "MIPI_DPI_CLK", "MIPI_DPI_VSYNC", "MIPI_DPI_HSYNC", "MIPI_DPI_DE", "MIPI_DPI_D0", "MIPI_DPI_D1", "MIPI_DPI_D2", "MIPI_DPI_D3", "MIPI_DPI_D4", "MIPI_DPI_D5", "MIPI_DPI_D6", "MIPI_DPI_DA7", "MIPI_DPI_D8", "MIPI_DPI_D9", "MIPI_DPI_D10", "MIPI_DPI_D11", "PCM_BT_CLK", "PCM_BT_SYNC", "PCM_BT_DI", "PCM_BT_DO", "JTAG_TMS_TP", "JTAG_TCK_TP", "JTAG_TDI_TP", "JTAG_TDO_TP", "JTAG_TRSTN_TP", "CLK_24M_WCAM", "CLK_24M_UCAM", "UCAM_DET_ODL", "AP_I2C_EDPBRDG_SCL_1V8", "AP_I2C_EDPBRDG_SDA_1V8", "AP_I2C_TCHSCR_SCL_1V8", "AP_I2C_TCHSCR_SDA_1V8", "AP_I2C_TCHPAD_SCL_1V8", "AP_I2C_TCHPAD_SDA_1V8", "AP_I2C_DPBRDG_SCL_1V8", "AP_I2C_DPBRDG_SDA_1V8", "AP_I2C_WLAN_SCL_1V8", "AP_I2C_WLAN_SDA_1V8", "AP_I2C_AUD_SCL_1V8", "AP_I2C_AUD_SDA_1V8", "AP_I2C_TPM_SCL_1V8", "AP_I2C_UCAM_SDA_1V8", "AP_I2C_UCAM_SCL_1V8", "AP_I2C_UCAM_SDA_1V8", "AP_I2C_WCAM_SCL_1V8", "AP_I2C_WCAM_SDA_1V8", "SCP_I2C_SENSOR_SCL_1V8", "SCP_I2C_SENSOR_SDA_1V8", "AP_EC_WARM_RST_REQ", "AP_XHCI_INIT_DONE", "USB3_HUB_RST_L", "EN_SPKR", "BEEP_ON", "AP_EDP_BKLTEN", "EN_PP3300_DISP_X", "EN_PP3300_SDBRDG_X", "BT_KILL_1V8_L", "WIFI_KILL_1V8_L", "PWRAP_SPI0_CSN", "PWRAP_SPI0_CK", "PWRAP_SPI0_MO", "PWRAP_SPI0_MI", "SRCLKENA0", "SRCLKENA1", "SCP_VREQ_VAO", "AP_RTC_CLK32K", "AP_PMIC_WDTRST_L", "AUD_CLK_MOSI", "AUD_SYNC_MOSI", "AUD_DAT_MOSI0", "AUD_DAT_MOSI1", "AUD_CLK_MISO", "AUD_SYNC_MISO", "AUD_DAT_MISO0", "AUD_DAT_MISO1", "NC", "NC", "DPBRDG_PWREN", "DPBRDG_RST_L", "LTE_W_DISABLE_L", "LTE_SAR_DETECT_L", "EN_PP3300_LTE_X", "LTE_PWR_OFF_L", "LTE_RESET_L", "TP", "TP"; aud_clk_mosi_off: aud-clk-mosi-off-pins { pins-clk-sync { pinmux = , ; input-enable; bias-pull-down; }; }; aud_clk_mosi_on: aud-clk-mosi-on-pins { pins-clk-sync { pinmux = , ; }; }; aud_clk_miso_off: aud-clk-miso-off-pins { pins-clk-sync { pinmux = , ; input-enable; bias-pull-down; }; }; aud_clk_miso_on: aud-clk-miso-on-pins { pins-clk-sync { pinmux = , ; }; }; aud_dat_mosi_off: aud-dat-mosi-off-pins { pins-dat { pinmux = , ; input-enable; bias-pull-down; }; }; aud_dat_mosi_on: aud-dat-mosi-on-pins { pins-dat { pinmux = , ; }; }; aud_dat_miso_off: aud-dat-miso-off-pins { pins-dat { pinmux = , ; input-enable; bias-pull-down; }; }; aud_dat_miso_on: aud-dat-miso-on-pins { pins-dat { pinmux = , ; input-schmitt-enable; bias-disable; }; }; aud_gpio_i2s0_off: aud-gpio-i2s0-off-pins { pins-sdata { pinmux = ; }; }; aud_gpio_i2s0_on: aud-gpio-i2s0-on-pins { pins-sdata { pinmux = ; }; }; aud_gpio_i2s1_off: aud-gpio-i2s-off-pins { pins-clk-sdata { pinmux = , , , ; output-low; }; }; aud_gpio_i2s1_on: aud-gpio-i2s1-on-pins { pins-clk-sdata { pinmux = , , , ; }; }; aud_gpio_i2s2_off: aud-gpio-i2s2-off-pins { pins-cmd-dat { pinmux = , ; output-low; }; }; aud_gpio_i2s2_on: aud-gpio-i2s2-on-pins { pins-clk { pinmux = , ; drive-strength = <4>; }; }; aud_gpio_i2s3_off: aud-gpio-i2s3-off-pins { pins-sdata { pinmux = ; output-low; }; }; aud_gpio_i2s3_on: aud-gpio-i2s3-on-pins { pins-sdata { pinmux = ; drive-strength = <4>; }; }; aud_gpio_pcm_off: aud-gpio-pcm-off-pins { pins-clk-sdata { pinmux = , , , ; output-low; }; }; aud_gpio_pcm_on: aud-gpio-pcm-on-pins { pins-clk-sdata { pinmux = , , , ; }; }; aud_gpio_dmic_sec: aud-gpio-dmic-sec-pins { pins { pinmux = ; output-low; }; }; bt_pins_reset: bt-reset-pins { pins-bt-reset { pinmux = ; output-high; }; }; dpi_pins_sleep: dpi-sleep-pins { pins-cmd-dat { pinmux = , , , , , , , , , , , , , , , ; drive-strength = <10>; output-low; }; }; dpi_pins_default: dpi-default-pins { pins-cmd-dat { pinmux = , , , , , , , , , , , , , , , ; drive-strength = <10>; }; }; ec_ap_int: cros-ec-int-pins { pins-ec-ap-int-odl { pinmux = ; input-enable; }; }; edp_panel_fixed_pins: edp-panel-fixed-pins { pins-vreg-en { pinmux = ; output-high; }; }; en_pp1800_dpbrdg: en-pp1800-dpbrdg-pins { pins-vreg-en { pinmux = ; output-low; }; }; gsc_int: gsc-int-pins { pins-gsc-ap-int-odl { pinmux = ; input-enable; }; }; i2c0_pins: i2c0-pins { pins-bus { pinmux = , ; bias-disable; drive-strength = <4>; input-enable; }; }; i2c1_pins: i2c1-pins { pins-bus { pinmux = , ; bias-disable; drive-strength = <4>; input-enable; }; }; i2c2_pins: i2c2-pins { pins-bus { pinmux = , ; bias-disable; drive-strength = <4>; input-enable; }; }; i2c3_pins: i2c3-pins { pins-bus { pinmux = , ; bias-disable; drive-strength = <4>; input-enable; }; }; i2c5_pins: i2c5-pins { pins-bus { pinmux = , ; bias-disable; drive-strength = <4>; input-enable; }; }; it6505_pins: it6505-pins { pins-hpd { pinmux = ; input-enable; bias-pull-up; }; pins-int { pinmux = ; input-enable; bias-pull-up; }; pins-reset { pinmux = ; output-low; bias-pull-up; }; }; mmc0_pins_default: mmc0-default-pins { pins-clk { pinmux = ; bias-pull-down = ; }; pins-cmd-dat { pinmux = , , , , , , , , ; input-enable; bias-pull-up = ; }; pins-rst { pinmux = ; bias-pull-up = ; }; }; mmc0_pins_uhs: mmc0-uhs-pins { pins-clk { pinmux = ; drive-strength = <6>; bias-pull-down = ; }; pins-cmd-dat { pinmux = , , , , , , , , ; input-enable; drive-strength = <6>; bias-pull-up = ; }; pins-ds { pinmux = ; drive-strength = <6>; bias-pull-down = ; }; pins-rst { pinmux = ; bias-pull-up = ; }; }; mmc1_pins_default: mmc1-default-pins { pins-clk { pinmux = ; drive-strength = <6>; bias-pull-down = ; }; pins-cmd-dat { pinmux = , , , , ; input-enable; drive-strength = <6>; bias-pull-up = ; }; }; mmc1_pins_uhs: mmc1-uhs-pins { pins-clk { pinmux = ; drive-strength = <6>; bias-pull-down = ; }; pins-cmd-dat { pinmux = , , , , ; input-enable; drive-strength = <8>; bias-pull-up = ; }; }; mmc1_pins_eint: mmc1-eint-pins { pins-dat1 { pinmux = ; input-enable; bias-pull-up = ; }; }; nor_pins_default: nor-default-pins { pins-clk-dat { pinmux = , , ; drive-strength = <6>; bias-pull-down; }; pins-cs-dat { pinmux = , , ; drive-strength = <6>; bias-pull-up; }; }; pen_eject: pen-eject-pins { pins { pinmux = ; input-enable; /* External pull-up. */ bias-disable; }; }; pwm0_pin: disp-pwm-pins { pins { pinmux = ; output-high; }; }; rt1019p_pins_default: rt1019p-default-pins { pins-sdb { pinmux = ; output-low; }; }; scp_pins: scp-default-pins { pins-scp-uart { pinmux = , ; }; }; spi1_pins: spi1-pins { pins-bus { pinmux = , , , ; bias-disable; input-enable; }; }; spi2_pins: spi2-pins { pins-bus { pinmux = , , , ; bias-disable; input-enable; }; }; spmi_pins: spmi-pins { pins-bus { pinmux = , ; }; }; touchscreen_pins: touchscreen-pins { pins-irq { pinmux = ; input-enable; bias-pull-up; }; pins-reset { pinmux = ; output-high; }; pins-report-sw { pinmux = ; output-low; }; }; trackpad_pin: trackpad-default-pins { pins-int-n { pinmux = ; input-enable; bias-disable; /* pulled externally */ }; }; wifi_enable_pin: wifi-enable-pins { pins-wifi-enable { pinmux = ; }; }; wifi_wakeup_pin: wifi-wakeup-pins { pins-wifi-wakeup { pinmux = ; input-enable; }; }; }; &pwm0 { pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; status = "okay"; }; &pwrap { pmic { compatible = "mediatek,mt6366", "mediatek,mt6358"; interrupt-controller; interrupts-extended = <&pio 201 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; mt6366codec: codec { compatible = "mediatek,mt6366-sound", "mediatek,mt6358-sound"; Avdd-supply = <&mt6366_vaud28_reg>; mediatek,dmic-mode = <1>; /* one-wire */ }; mt6366_regulators: regulators { compatible = "mediatek,mt6366-regulator", "mediatek,mt6358-regulator"; vsys-ldo1-supply = <&pp4200_z2>; vsys-ldo2-supply = <&pp4200_z2>; vsys-ldo3-supply = <&pp4200_z2>; vsys-vcore-supply = <&pp4200_z2>; vsys-vdram1-supply = <&pp4200_z2>; vsys-vgpu-supply = <&pp4200_z2>; vsys-vmodem-supply = <&pp4200_z2>; vsys-vpa-supply = <&pp4200_z2>; vsys-vproc11-supply = <&pp4200_z2>; vsys-vproc12-supply = <&pp4200_z2>; vsys-vs1-supply = <&pp4200_z2>; vsys-vs2-supply = <&pp4200_z2>; vs1-ldo1-supply = <&mt6366_vs1_reg>; vs2-ldo1-supply = <&mt6366_vdram1_reg>; vs2-ldo2-supply = <&mt6366_vs2_reg>; vs2-ldo3-supply = <&mt6366_vs2_reg>; vcore { regulator-name = "pp0750_dvdd_core"; regulator-min-microvolt = <550000>; regulator-max-microvolt = <800000>; regulator-ramp-delay = <6250>; regulator-enable-ramp-delay = <200>; regulator-allowed-modes = ; regulator-always-on; }; mt6366_vdram1_reg: vdram1 { regulator-name = "pp1125_emi_vdd2"; regulator-min-microvolt = <1125000>; regulator-max-microvolt = <1125000>; regulator-ramp-delay = <12500>; regulator-enable-ramp-delay = <0>; regulator-allowed-modes = ; regulator-always-on; }; mt6366_vgpu_reg: vgpu { /* * Called "ppvar_dvdd_gpu" in the schematic. * Called "ppvar_dvdd_vgpu" here to match * regulator coupling requirements. */ regulator-name = "ppvar_dvdd_vgpu"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <950000>; regulator-ramp-delay = <6250>; regulator-enable-ramp-delay = <200>; regulator-allowed-modes = ; regulator-coupled-with = <&mt6366_vsram_gpu_reg>; regulator-coupled-max-spread = <10000>; }; mt6366_vproc11_reg: vproc11 { regulator-name = "ppvar_dvdd_proc_bc_mt6366"; regulator-min-microvolt = <600000>; regulator-max-microvolt = <1200000>; regulator-ramp-delay = <6250>; regulator-enable-ramp-delay = <200>; regulator-allowed-modes = ; regulator-always-on; }; mt6366_vproc12_reg: vproc12 { regulator-name = "ppvar_dvdd_proc_lc"; regulator-min-microvolt = <600000>; regulator-max-microvolt = <1200000>; regulator-ramp-delay = <6250>; regulator-enable-ramp-delay = <200>; regulator-allowed-modes = ; regulator-always-on; }; mt6366_vs1_reg: vs1 { regulator-name = "pp2000_vs1"; regulator-min-microvolt = <2000000>; regulator-max-microvolt = <2000000>; regulator-ramp-delay = <12500>; regulator-enable-ramp-delay = <0>; regulator-always-on; }; mt6366_vs2_reg: vs2 { regulator-name = "pp1350_vs2"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; regulator-ramp-delay = <12500>; regulator-enable-ramp-delay = <0>; regulator-always-on; }; va12 { regulator-name = "pp1200_va12"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-enable-ramp-delay = <270>; regulator-always-on; }; mt6366_vaud28_reg: vaud28 { regulator-name = "pp2800_vaud28"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-enable-ramp-delay = <270>; }; mt6366_vaux18_reg: vaux18 { regulator-name = "pp1840_vaux18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1840000>; regulator-enable-ramp-delay = <270>; }; mt6366_vbif28_reg: vbif28 { regulator-name = "pp2800_vbif28"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-enable-ramp-delay = <270>; }; mt6366_vcn18_reg: vcn18 { regulator-name = "pp1800_vcn18_x"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-enable-ramp-delay = <270>; }; mt6366_vcn28_reg: vcn28 { regulator-name = "pp2800_vcn28_x"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-enable-ramp-delay = <270>; }; mt6366_vefuse_reg: vefuse { regulator-name = "pp1800_vefuse"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-enable-ramp-delay = <270>; }; mt6366_vfe28_reg: vfe28 { regulator-name = "pp2800_vfe28_x"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-enable-ramp-delay = <270>; }; mt6366_vemc_reg: vemc { regulator-name = "pp3000_vemc"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; regulator-enable-ramp-delay = <60>; }; mt6366_vibr_reg: vibr { regulator-name = "pp2800_vibr_x"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-enable-ramp-delay = <60>; }; mt6366_vio18_reg: vio18 { regulator-name = "pp1800_vio18_s3"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-enable-ramp-delay = <2700>; regulator-always-on; }; mt6366_vio28_reg: vio28 { regulator-name = "pp2800_vio28_x"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-enable-ramp-delay = <270>; }; mt6366_vm18_reg: vm18 { regulator-name = "pp1800_emi_vdd1"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1840000>; regulator-enable-ramp-delay = <325>; regulator-always-on; }; mt6366_vmc_reg: vmc { regulator-name = "pp3000_vmc"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; regulator-enable-ramp-delay = <60>; }; mt6366_vmddr_reg: vmddr { regulator-name = "pm0750_emi_vmddr"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <750000>; regulator-enable-ramp-delay = <325>; regulator-always-on; }; mt6366_vmch_reg: vmch { regulator-name = "pp3000_vmch"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; regulator-enable-ramp-delay = <60>; }; mt6366_vcn33_reg: vcn33 { regulator-name = "pp3300_vcn33_x"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-enable-ramp-delay = <270>; }; vdram2 { regulator-name = "pp0600_emi_vddq"; regulator-min-microvolt = <600000>; regulator-max-microvolt = <600000>; regulator-enable-ramp-delay = <3300>; regulator-always-on; }; mt6366_vrf12_reg: vrf12 { regulator-name = "pp1200_vrf12_x"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-enable-ramp-delay = <120>; }; mt6366_vrf18_reg: vrf18 { regulator-name = "pp1800_vrf18_x"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-enable-ramp-delay = <120>; }; vsim1 { regulator-name = "pp1860_vsim1_x"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1860000>; regulator-enable-ramp-delay = <540>; }; mt6366_vsim2_reg: vsim2 { regulator-name = "pp2760_vsim2_x"; regulator-min-microvolt = <2700000>; regulator-max-microvolt = <2760000>; regulator-enable-ramp-delay = <540>; }; mt6366_vsram_gpu_reg: vsram-gpu { regulator-name = "pp0900_dvdd_sram_gpu"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1050000>; regulator-ramp-delay = <6250>; regulator-enable-ramp-delay = <240>; regulator-coupled-with = <&mt6366_vgpu_reg>; regulator-coupled-max-spread = <10000>; }; mt6366_vsram_others_reg: vsram-others { regulator-name = "pp0900_dvdd_sram_core"; regulator-min-microvolt = <900000>; regulator-max-microvolt = <900000>; regulator-ramp-delay = <6250>; regulator-enable-ramp-delay = <240>; regulator-always-on; }; mt6366_vsram_proc11_reg: vsram-proc11 { regulator-name = "pp0900_dvdd_sram_bc"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1120000>; regulator-ramp-delay = <6250>; regulator-enable-ramp-delay = <240>; regulator-always-on; }; mt6366_vsram_proc12_reg: vsram-proc12 { regulator-name = "pp0900_dvdd_sram_lc"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1120000>; regulator-ramp-delay = <6250>; regulator-enable-ramp-delay = <240>; regulator-always-on; }; vusb { regulator-name = "pp3070_vusb"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3070000>; regulator-enable-ramp-delay = <270>; regulator-always-on; }; vxo22 { regulator-name = "pp2240_vxo22"; regulator-min-microvolt = <2200000>; regulator-max-microvolt = <2240000>; regulator-enable-ramp-delay = <120>; /* Feeds DCXO internally */ regulator-always-on; }; }; rtc { compatible = "mediatek,mt6366-rtc", "mediatek,mt6358-rtc"; }; }; }; &scp { pinctrl-names = "default"; pinctrl-0 = <&scp_pins>; firmware-name = "mediatek/mt8186/scp.img"; memory-region = <&scp_mem>; status = "okay"; cros-ec-rpmsg { compatible = "google,cros-ec-rpmsg"; mediatek,rpmsg-name = "cros-ec-rpmsg"; }; }; &spi1 { pinctrl-names = "default"; pinctrl-0 = <&spi1_pins>; mediatek,pad-select = <0>; status = "okay"; cros_ec: ec@0 { compatible = "google,cros-ec-spi"; reg = <0>; interrupts-extended = <&pio 13 IRQ_TYPE_LEVEL_LOW>; pinctrl-names = "default"; pinctrl-0 = <&ec_ap_int>; spi-max-frequency = <1000000>; i2c_tunnel: i2c-tunnel { compatible = "google,cros-ec-i2c-tunnel"; google,remote-bus = <1>; #address-cells = <1>; #size-cells = <0>; }; typec { compatible = "google,cros-ec-typec"; #address-cells = <1>; #size-cells = <0>; usb_c0: connector@0 { compatible = "usb-c-connector"; reg = <0>; label = "left"; power-role = "dual"; data-role = "host"; try-power-role = "source"; }; usb_c1: connector@1 { compatible = "usb-c-connector"; reg = <1>; label = "right"; power-role = "dual"; data-role = "host"; try-power-role = "source"; }; }; }; }; &spi2 { pinctrl-names = "default"; pinctrl-0 = <&spi2_pins>; cs-gpios = <&pio 45 GPIO_ACTIVE_LOW>; mediatek,pad-select = <0>; status = "okay"; tpm@0 { compatible = "google,cr50"; reg = <0>; interrupts-extended = <&pio 15 IRQ_TYPE_EDGE_RISING>; pinctrl-names = "default"; pinctrl-0 = <&gsc_int>; spi-max-frequency = <1000000>; }; }; &ssusb0 { status = "okay"; }; &ssusb1 { status = "okay"; }; &u3phy0 { status = "okay"; }; &u3phy1 { status = "okay"; }; &uart0 { status = "okay"; }; &usb_host0 { vbus-supply = <&pp3300_s3>; status = "okay"; }; &usb_host1 { vbus-supply = <&usb_p1_vbus>; status = "okay"; }; &watchdog { mediatek,reset-by-toprgu; }; #include #include