// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2023 Loongson Technology Corporation Limited
 */

/dts-v1/;

#include <dt-bindings/interrupt-controller/irq.h>

/ {
	#address-cells = <2>;
	#size-cells = <2>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@1 {
			compatible = "loongson,la364";
			device_type = "cpu";
			reg = <0x0>;
			clocks = <&cpu_clk>;
		};

		cpu1: cpu@2 {
			compatible = "loongson,la364";
			device_type = "cpu";
			reg = <0x1>;
			clocks = <&cpu_clk>;
		};
	};

	cpu_clk: cpu-clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <1400000000>;
	};

	cpuintc: interrupt-controller {
		compatible = "loongson,cpu-interrupt-controller";
		#interrupt-cells = <1>;
		interrupt-controller;
	};

	bus@10000000 {
		compatible = "simple-bus";
		ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
			 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
			 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
			 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
		#address-cells = <2>;
		#size-cells = <2>;

		isa@18400000 {
			compatible = "isa";
			#size-cells = <1>;
			#address-cells = <2>;
			ranges = <1 0x0 0x0 0x18400000 0x4000>;
		};

		pmc: power-management@100d0000 {
			compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon";
			reg = <0x0 0x100d0000 0x0 0x58>;
			interrupt-parent = <&eiointc>;
			interrupts = <47>;
			loongson,suspend-address = <0x0 0x1c000500>;

			syscon-reboot {
				compatible = "syscon-reboot";
				offset = <0x30>;
				mask = <0x1>;
			};

			syscon-poweroff {
				compatible = "syscon-poweroff";
				regmap = <&pmc>;
				offset = <0x14>;
				mask = <0x3c00>;
				value = <0x3c00>;
			};
		};

		liointc: interrupt-controller@1fe01400 {
			compatible = "loongson,liointc-1.0";
			reg = <0x0 0x1fe01400 0x0 0x64>;

			interrupt-controller;
			#interrupt-cells = <2>;
			interrupt-parent = <&cpuintc>;
			interrupts = <2>;
			interrupt-names = "int0";
			loongson,parent_int_map = <0xffffffff>, /* int0 */
						  <0x00000000>, /* int1 */
						  <0x00000000>, /* int2 */
						  <0x00000000>; /* int3 */
		};

		eiointc: interrupt-controller@1fe01600 {
			compatible = "loongson,ls2k2000-eiointc";
			reg = <0x0 0x1fe01600 0x0 0xea00>;
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&cpuintc>;
			interrupts = <3>;
		};

		pic: interrupt-controller@10000000 {
			compatible = "loongson,pch-pic-1.0";
			reg = <0x0 0x10000000 0x0 0x400>;
			interrupt-controller;
			#interrupt-cells = <2>;
			loongson,pic-base-vec = <0>;
			interrupt-parent = <&eiointc>;
		};

		msi: msi-controller@1fe01140 {
			compatible = "loongson,pch-msi-1.0";
			reg = <0x0 0x1fe01140 0x0 0x8>;
			interrupt-controller;
			#interrupt-cells = <1>;
			msi-controller;
			loongson,msi-base-vec = <64>;
			loongson,msi-num-vecs = <192>;
			interrupt-parent = <&eiointc>;
		};

		rtc0: rtc@100d0100 {
			compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc";
			reg = <0x0 0x100d0100 0x0 0x100>;
			interrupt-parent = <&pic>;
			interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		uart0: serial@1fe001e0 {
			compatible = "ns16550a";
			reg = <0x0 0x1fe001e0 0x0 0x10>;
			clock-frequency = <100000000>;
			interrupt-parent = <&liointc>;
			interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
			no-loopback-test;
			status = "disabled";
		};

		pcie@1a000000 {
			compatible = "loongson,ls2k-pci";
			reg = <0x0 0x1a000000 0x0 0x02000000>,
			      <0xfe 0x0 0x0 0x20000000>;
			#address-cells = <3>;
			#size-cells = <2>;
			device_type = "pci";
			msi-parent = <&msi>;
			bus-range = <0x0 0xff>;
			ranges = <0x01000000 0x0 0x00008000 0x0 0x18408000 0x0 0x00008000>,
				 <0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>;

			gmac0: ethernet@3,0 {
				reg = <0x1800 0x0 0x0 0x0 0x0>;
				interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
				status = "disabled";
			};

			gmac1: ethernet@3,1 {
				reg = <0x1900 0x0 0x0 0x0 0x0>;
				interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
				status = "disabled";
			};

			gmac2: ethernet@3,2 {
				reg = <0x1a00 0x0 0x0 0x0 0x0>;
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
				status = "disabled";
			};

			xhci0: usb@4,0 {
				reg = <0x2000 0x0 0x0 0x0 0x0>;
				interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
				status = "disabled";
			};

			xhci1: usb@19,0 {
				reg = <0xc800 0x0 0x0 0x0 0x0>;
				interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
				status = "disabled";
			};

			display@6,1 {
				reg = <0x3100 0x0 0x0 0x0 0x0>;
				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
				status = "disabled";
			};

			hda@7,0 {
				reg = <0x3800 0x0 0x0 0x0 0x0>;
				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
				status = "disabled";
			};

			sata: sata@8,0 {
				reg = <0x4000 0x0 0x0 0x0 0x0>;
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
				status = "disabled";
			};

			pcie@9,0 {
				reg = <0x4800 0x0 0x0 0x0 0x0>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				interrupt-parent = <&pic>;
				#interrupt-cells = <1>;
				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
				interrupt-map = <0x0 0x0 0x0 0x0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
				ranges;
			};

			pcie@a,0 {
				reg = <0x5000 0x0 0x0 0x0 0x0>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				interrupt-parent = <&pic>;
				#interrupt-cells = <1>;
				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
				interrupt-map = <0x0 0x0 0x0 0x0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
				ranges;
			};

			pcie@b,0 {
				reg = <0x5800 0x0 0x0 0x0 0x0>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				interrupt-parent = <&pic>;
				#interrupt-cells = <1>;
				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
				interrupt-map = <0x0 0x0 0x0 0x0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
				ranges;
			};

			pcie@c,0 {
				reg = <0x6000 0x0 0x0 0x0 0x0>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				interrupt-parent = <&pic>;
				#interrupt-cells = <1>;
				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
				interrupt-map = <0x0 0x0 0x0 0x0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
				ranges;
			};

			pcie@d,0 {
				reg = <0x6800 0x0 0x0 0x0 0x0>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				interrupt-parent = <&pic>;
				#interrupt-cells = <1>;
				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
				interrupt-map = <0x0 0x0 0x0 0x0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
				ranges;
			};

			pcie@e,0 {
				reg = <0x7000 0x0 0x0 0x0 0x0>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				interrupt-parent = <&pic>;
				#interrupt-cells = <1>;
				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
				interrupt-map = <0x0 0x0 0x0 0x0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
				ranges;
			};

			pcie@f,0 {
				reg = <0x7800 0x0 0x0 0x0 0x0>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				interrupt-parent = <&pic>;
				#interrupt-cells = <1>;
				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
				interrupt-map = <0x0 0x0 0x0 0x0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
				ranges;
			};

			pcie@10,0 {
				reg = <0x8000 0x0 0x0 0x0 0x0>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				interrupt-parent = <&pic>;
				#interrupt-cells = <1>;
				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
				interrupt-map = <0x0 0x0 0x0 0x0 &pic 30 IRQ_TYPE_LEVEL_HIGH>;
				ranges;
			};
		};
	};
};