# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Rockchip DWC HDMI TX Encoder maintainers: - Mark Yao description: | The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP with a companion PHY IP. allOf: - $ref: ../bridge/synopsys,dw-hdmi.yaml# - $ref: /schemas/sound/dai-common.yaml# properties: compatible: enum: - rockchip,rk3228-dw-hdmi - rockchip,rk3288-dw-hdmi - rockchip,rk3328-dw-hdmi - rockchip,rk3399-dw-hdmi - rockchip,rk3568-dw-hdmi reg-io-width: const: 4 avdd-0v9-supply: description: A 0.9V supply that powers up the SoC internal circuitry. The actual pin name varies between the different SoCs and is usually HDMI_TX_AVDD_0V9 or sometimes HDMI_AVDD_1V0. avdd-1v8-supply: description: A 1.8V supply that powers up the SoC internal circuitry. The pin name on the SoC usually is HDMI_TX_AVDD_1V8. clocks: minItems: 2 items: - {} - {} # The next three clocks are all optional, but shall be specified in this # order when present. - description: The HDMI CEC controller main clock - description: Power for GRF IO - description: External clock for some HDMI PHY (old clock name, deprecated) - description: External clock for some HDMI PHY (new name) clock-names: minItems: 2 items: - {} - {} - enum: - cec - grf - vpll - ref - enum: - grf - vpll - ref - enum: - vpll - ref phys: maxItems: 1 description: The HDMI PHY phy-names: const: hdmi pinctrl-names: description: The unwedge pinctrl entry shall drive the DDC SDA line low. This is intended to work around a hardware errata that can cause the DDC I2C bus to be wedged. minItems: 1 items: - const: default - const: unwedge power-domains: maxItems: 1 ports: $ref: /schemas/graph.yaml#/properties/ports properties: port@0: $ref: /schemas/graph.yaml#/properties/port description: Input of the DWC HDMI TX properties: endpoint: description: Connection to the VOP endpoint@0: description: Connection to the VOPB endpoint@1: description: Connection to the VOPL port@1: $ref: /schemas/graph.yaml#/properties/port description: Output of the DWC HDMI TX required: - port@0 - port@1 rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the GRF to mux vopl/vopb. "#sound-dai-cells": const: 0 required: - compatible - reg - reg-io-width - clocks - clock-names - interrupts - ports - rockchip,grf unevaluatedProperties: false examples: - | #include #include #include #include hdmi: hdmi@ff980000 { compatible = "rockchip,rk3288-dw-hdmi"; reg = <0xff980000 0x20000>; reg-io-width = <4>; interrupts = ; clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>; clock-names = "iahb", "isfr"; ddc-i2c-bus = <&i2c5>; power-domains = <&power RK3288_PD_VIO>; rockchip,grf = <&grf>; #sound-dai-cells = <0>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; hdmi_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_hdmi>; }; hdmi_in_vopl: endpoint@1 { reg = <1>; remote-endpoint = <&vopl_out_hdmi>; }; }; port@1 { reg = <1>; hdmi_out_con: endpoint { remote-endpoint = <&hdmi_con_in>; }; }; }; }; ...