'\" te
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.TH CPC 3CPC "Oct 8, 2008"
.SH NAME
cpc \- hardware performance counters
.SH DESCRIPTION
.sp
.LP
Modern microprocessors contain \fIhardware performance counters\fR that allow
the measurement of many different hardware events related to CPU behavior,
including instruction and data cache misses as well as various internal states
of the processor. The counters can be configured to count user events, system
events, or both. Data from the performance counters can be used to analyze and
tune the behavior of software on a particular type of processor.
.sp
.LP
Most processors are able to generate an interrupt on counter overflow, allowing
the counters to be used for various forms of profiling.
.sp
.LP
This manual page describes a set of APIs that allow Solaris applications to use
these counters. Applications can measure their own behavior, the behavior of
other applications, or the behavior of the whole system.
.SS "Shared Counters or Private Counters"
.sp
.LP
There are two principal models for using these performance counters. Some users
of these statistics want to observe system-wide behavior. Other users want to
view the performance counters as part of the register set exported by each
\fBLWP\fR. On a machine performing more than one activity, these two models are
in conflict because the counters represent a critical hardware resource that
cannot simultaneously be both shared and private.
.SS "Configuration Interfaces"
.sp
.LP
The following configuration interfaces are provided:
.sp
.ne 2
.na
\fB\fBcpc_open\fR(3CPC)\fR
.ad
.RS 21n
Check the version the application was compiled with against the version of the
library.
.RE

.sp
.ne 2
.na
\fB\fBcpc_cciname\fR(3CPC)\fR
.ad
.RS 21n
Return a printable string to describe the performance counters of the
processor.
.RE

.sp
.ne 2
.na
\fB\fBcpc_npic\fR(3CPC)\fR
.ad
.RS 21n
Return the number of performance counters on the processor.
.RE

.sp
.ne 2
.na
\fB\fBcpc_cpuref\fR(3CPC)\fR
.ad
.RS 21n
Return a reference to documentation that should be consulted to understand how
to use and interpret data from the performance counters.
.RE

.SS "Performance Counter Access"
.sp
.LP
Performance counters can be present in hardware but not acccessible because
either some of the necessary system software components are not available or
not installed, or the counters might be in use by other processes.  The
\fBcpc_open\fR(3CPC) function determines the accessibility of the counters and
must be invoked before any attempt to program the counters.
.SS "Finding Events"
.sp
.LP
Each different type of processor has its own set of events available for
measurement. The \fBcpc_walk_events_all\fR(3CPC) and
\fBcpc_walk_events_pic\fR(3CPC) functions allow an application to determine the
names of events supported by the underlying processor. A collection of generic,
platform independent event names are defined by \fBgeneric_events\fR(3CPC).
Each generic event maps to an underlying hardware event specific to the
underlying processor and any optional attributes. The
\fBcpc_walk_generic_events_all\fR(3CPC) and
\fBcpc_walk_generic_events_pic\fR(3CPC) functions allow an application to
determine the generic events supported on the underlying platform.
.SS "Using Attributes"
.sp
.LP
Some processors have advanced performance counter capabilities that are
configured with attributes. The \fBcpc_walk_attrs\fR(3CPC) function can be used
to determine the names of attributes supported by the underlying processor. The
documentation referenced by \fBcpc_cpuref\fR(3CPC) should be consulted to
understand the meaning of a processor's performance counter attributes.
.SS "Performance Counter Context"
.sp
.LP
Each processor on the system possesses its own set of performance counter
registers. For a single process, it is often desirable to maintain the illusion
that the counters are an intrinsic part of that process (whichever processors
it runs on), since this allows the events to be directly attributed to the
process without having to make passive all other activity on the system.
.sp
.LP
To achieve this behavior, the library associates \fIperformance counter
context\fR with each \fBLWP\fR in the process. The context consists of a small
amount of kernel memory to hold the counter values when the \fBLWP\fR is not
running, and some simple kernel functions to save and restore those counter
values from and to the hardware registers when the \fBLWP\fR performs a normal
context switch. A process can only observe and manipulate its own copy of the
performance counter control and data registers.
.SS "Performance Counters In Other Processes"
.sp
.LP
Though applications can be modified to instrument themselves as demonstrated
above, it is frequently useful to be able to examine the behavior of an
existing application without changing the source code. A separate library,
\fBlibpctx\fR, provides a simple set of interfaces that use the facilities of
\fBproc\fR(4) to control a target process, and together with functions in
\fBlibcpc\fR, allow \fBtruss\fR-like tools to be constructed to measure the
performance counters in other applications. An example of one such application
is \fBcputrack\fR(1).
.sp
.LP
The functions in \fBlibpctx\fR are independent of those in \fBlibcpc\fR. These
functions manage a process using an event-loop paradigm \(em that is, the
execution of certain system calls by the controlled process cause the library
to stop the controlled process and execute callback functions in the context of
the controlling process. These handlers can perform various operations on the
target process using APIs in \fBlibpctx\fR and \fBlibcpc\fR that consume
\fBpctx_t\fR handles.
.SH SEE ALSO
.sp
.LP
\fBcputrack\fR(1), \fBcpustat\fR(1M), \fBcpc_bind_curlwp\fR(3CPC),
\fBcpc_buf_create\fR(3CPC), \fBcpc_enable\fR(3CPC), \fBcpc_npic\fR(3CPC),
\fBcpc_open\fR(3CPC), \fBcpc_set_create\fR(3CPC), \fBcpc_seterrhndlr\fR(3CPC),
\fBgeneric_events\fR(3CPC), \fBlibcpc\fR(3LIB), \fBpctx_capture\fR(3CPC),
\fBpctx_set_events\fR(3CPC), \fBproc\fR(4)