'\" te
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.TH ATOMIC_AND 3C "May 13, 2005"
.SH NAME
atomic_and, atomic_and_8, atomic_and_uchar, atomic_and_16, atomic_and_ushort,
atomic_and_32, atomic_and_uint, atomic_and_ulong, atomic_and_64,
atomic_and_8_nv, atomic_and_uchar_nv, atomic_and_16_nv, atomic_and_ushort_nv,
atomic_and_32_nv, atomic_and_uint_nv, atomic_and_ulong_nv, atomic_and_64_nv \-
atomic AND operations
.SH SYNOPSIS
.LP
.nf
#include <atomic.h>

\fBvoid\fR \fBatomic_and_8\fR(\fBvolatile uint8_t *\fR\fItarget\fR, \fBuint8_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBvoid\fR \fBatomic_and_uchar\fR(\fBvolatile uchar_t *\fR\fItarget\fR, \fBuchar_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBvoid\fR \fBatomic_and_16\fR(\fBvolatile uint16_t *\fR\fItarget\fR, \fBuint16_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBvoid\fR \fBatomic_and_ushort\fR(\fBvolatile ushort_t *\fR\fItarget\fR, \fBushort_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBvoid\fR \fBatomic_and_32\fR(\fBvolatile uint32_t *\fR\fItarget\fR, \fBuint32_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBvoid\fR \fBatomic_and_uint\fR(\fBvolatile uint_t *\fR\fItarget\fR, \fBuint_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBvoid\fR \fBatomic_and_ulong\fR(\fBvolatile ulong_t *\fR\fItarget\fR, \fBulong_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBvoid\fR \fBatomic_and_64\fR(\fBvolatile uint64_t *\fR\fItarget\fR, \fBuint64_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBuint8_t\fR \fBatomic_and_8_nv\fR(\fBvolatile uint8_t *\fR\fItarget\fR, \fBuint8_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBuchar_t\fR \fBatomic_and_uchar_nv\fR(\fBvolatile uchar_t *\fR\fItarget\fR, \fBuchar_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBuint16_t\fR \fBatomic_and_16_nv\fR(\fBvolatile uint16_t *\fR\fItarget\fR, \fBuint16_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBushort_t\fR \fBatomic_and_ushort_nv\fR(\fBvolatile ushort_t *\fR\fItarget\fR, \fBushort_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBuint32_t\fR \fBatomic_and_32_nv\fR(\fBvolatile uint32_t *\fR\fItarget\fR, \fBuint32_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBuint_t\fR \fBatomic_and_uint_nv\fR(\fBvolatile uint_t *\fR\fItarget\fR, \fBuint_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBulong_t\fR \fBatomic_and_ulong_nv\fR(\fBvolatile ulong_t *\fR\fItarget\fR, \fBulong_t\fR \fIbits\fR);
.fi

.LP
.nf
\fBuint64_t\fR \fBatomic_and_64_nv\fR(\fBvolatile uint64_t *\fR\fItarget\fR, \fBuint64_t\fR \fIbits\fR);
.fi

.SH DESCRIPTION
.sp
.LP
These functions enable the bitwise AND of \fIbits\fR to the value stored in
\fItarget\fR to occur in an atomic manner.
.SH RETURN VALUES
.sp
.LP
The *\fB_nv()\fR variants of these functions return the new value of
\fItarget\fR.
.SH ERRORS
.sp
.LP
No errors are defined.
.SH ATTRIBUTES
.sp
.LP
See \fBattributes\fR(7) for descriptions of the following attributes:
.sp

.sp
.TS
box;
c | c
l | l .
ATTRIBUTE TYPE	ATTRIBUTE VALUE
_
Interface Stability	Committed
_
MT-Level	MT-Safe
.TE

.SH SEE ALSO
.sp
.LP
.BR atomic_add (3C),
.BR atomic_bits (3C),
.BR atomic_cas (3C),
.BR atomic_dec (3C),
.BR atomic_inc (3C),
.BR atomic_or (3C),
.BR atomic_swap (3C),
.BR membar_ops (3C),
.BR attributes (7),
.BR atomic_ops (9F)
.SH NOTES
.sp
.LP
The *\fB_nv()\fR variants are substantially more expensive on some platforms
than the versions that do not return values. Do not use them unless you need to
know the new value \fBatomically\fR.