#
# This file and its contents are supplied under the terms of the
# Common Development and Distribution License ("CDDL"), version 1.0.
# You may only use this file in accordance with the terms of version
# 1.0 of the CDDL.
#
# A full copy of the text of the CDDL should have accompanied this
# source.  A copy of the CDDL is also available via the Internet at
# http://www.illumos.org/license/CDDL.
#

#
# Copyright (c) 2018, Joyent, Inc.
#

#
# This file describes the USB topology for the SuperMicro
# SSG-2028P-ACR24L product. For more information on the format see
# topo_usb_file.c.
#

#
# Older revisions of this system had issues with the ACPI tables that
# caused the ACPI PLD data to incorrectly match ports. As such, drive
# all port matching rules from this. We'll explicitly label the ports as
# well.
#
disable-acpi-match
enable-metadata-match
port
	label
		Rear Upper Left USB
	chassis
	external
	port-type
		0x0
	acpi-path
		\_SB_.PCI0.XHCI.RHUB.HS02
	acpi-path
		\_SB_.PCI0.EHC1.HUBN.PR01.PR12
end-port

port
	label
		Rear Lower Left USB
	chassis
	external
	port-type
		0x0
	acpi-path
		\_SB_.PCI0.XHCI.RHUB.HS01
	acpi-path
		\_SB_.PCI0.EHC1.HUBN.PR01.PR11
end-port

port
	label
		Rear Upper Right USB
	chassis
	external
	port-type
		0x3
	acpi-path
		\_SB_.PCI0.XHCI.RHUB.HS12
	acpi-path
		\_SB_.PCI0.XHCI.RHUB.SSP1
	acpi-path
		\_SB_.PCI0.EHC2.HUBN.PR01.PR16
end-port

port
	label
		Rear Lower Right USB
	chassis
	external
	port-type
		0x3
	acpi-path
		\_SB_.PCI0.XHCI.RHUB.HS11
	acpi-path
		\_SB_.PCI0.XHCI.RHUB.SSP2
	acpi-path
		\_SB_.PCI0.EHC2.HUBN.PR01.PR15
end-port

port
	label
		Internal USB
	internal
	port-type
		0x3
	acpi-path
		\_SB_.PCI0.XHCI.RHUB.HS07
	acpi-path
		\_SB_.PCI0.XHCI.RHUB.SSP4
	acpi-path
		\_SB_.PCI0.EHC2.HUBN.PR01.PR13
end-port