/* * MPC8555 CDS Device Tree Source * * Copyright 2006, 2008 Freescale Semiconductor Inc. All rights reserved * * Neither the name of Freescale Semiconductor, Inc nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Freescale hereby publishes it under the following licenses: * * BSD License * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * GNU General Public License, version 2 * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, * MA 02110-1301, USA. * * You may select the license of your choice. *------------------------------------------------------------------ */ /dts-v1/; / { model = "MPC8555CDS"; compatible = "MPC8555CDS", "MPC85xxCDS"; #address-cells = <1>; #size-cells = <1>; aliases { ethernet0 = &enet0; ethernet1 = &enet1; serial0 = &serial0; serial1 = &serial1; pci0 = &pci0; pci1 = &pci1; }; cpus { #address-cells = <1>; #size-cells = <0>; PowerPC,8555@0 { device_type = "cpu"; reg = <0x0>; d-cache-line-size = <32>; // 32 bytes i-cache-line-size = <32>; // 32 bytes d-cache-size = <0x8000>; // L1, 32K i-cache-size = <0x8000>; // L1, 32K timebase-frequency = <0>; // 33 MHz, from uboot bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot next-level-cache = <&L2>; }; }; memory { device_type = "memory"; reg = <0x0 0x10000000>; // 256M at 0x0 }; localbus@e0005000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,lbc", "fsl,elbc"; reg = <0xe0005000 0x1000>; interrupts = <19 2>; interrupt-parent = <&mpic>; ranges = <0x0 0x0 0xff800000 0x00800000 0x1 0x0 0xff000000 0x00800000 0x2 0x0 0xf8000000 0x00008000>; nor@0,0 { #address-cells = <1>; #size-cells = <1>; compatible = "cfi-flash"; reg = <0x0 0x0 0x00800000>; bank-width = <2>; device-width = <1>; }; nor@1,0 { #address-cells = <1>; #size-cells = <1>; compatible = "cfi-flash"; reg = <0x1 0x0 0x00800000>; bank-width = <2>; device-width = <1>; }; rtc@2,0 { #address-cells = <1>; #size-cells = <1>; compatible = "dallas,ds1553"; reg = <0x2 0x0 0x00008000>; bank-width = <1>; device-width = <1>; }; }; soc8555@e0000000 { #address-cells = <1>; #size-cells = <1>; device_type = "soc"; compatible = "simple-bus"; ranges = <0x0 0xe0000000 0x100000>; bus-frequency = <0>; ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <8>; }; ecm@1000 { compatible = "fsl,mpc8555-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,8555-memory-controller"; reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; interrupts = <18 2>; }; L2: l2-cache-controller@20000 { compatible = "fsl,8555-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes cache-size = <0x40000>; // L2, 256K interrupt-parent = <&mpic>; interrupts = <16 2>; }; i2c@3000 { #address-cells = <1>; #size-cells = <0>; cell-index = <0>; compatible = "fsl-i2c"; reg = <0x3000 0x100>; interrupts = <43 2>; interrupt-parent = <&mpic>; dfsrr; }; dma@21300 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; reg = <0x21300 0x4>; ranges = <0x0 0x21100 0x200>; cell-index = <0>; dma-channel@0 { compatible = "fsl,mpc8555-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x0 0x80>; cell-index = <0>; interrupt-parent = <&mpic>; interrupts = <20 2>; }; dma-channel@80 { compatible = "fsl,mpc8555-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x80 0x80>; cell-index = <1>; interrupt-parent = <&mpic>; interrupts = <21 2>; }; dma-channel@100 { compatible = "fsl,mpc8555-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x100 0x80>; cell-index = <2>; interrupt-parent = <&mpic>; interrupts = <22 2>; }; dma-channel@180 { compatible = "fsl,mpc8555-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x180 0x80>; cell-index = <3>; interrupt-parent = <&mpic>; interrupts = <23 2>; }; }; enet0: ethernet@24000 { #address-cells = <1>; #size-cells = <1>; cell-index = <0>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; reg = <0x24000 0x1000>; ranges = <0x0 0x24000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <29 2 30 2 34 2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi0>; phy-handle = <&phy0>; mdio@520 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,gianfar-mdio"; reg = <0x520 0x20>; phy0: ethernet-phy@0 { interrupt-parent = <&mpic>; interrupts = <5 1>; reg = <0x0>; device_type = "ethernet-phy"; }; phy1: ethernet-phy@1 { interrupt-parent = <&mpic>; interrupts = <5 1>; reg = <0x1>; device_type = "ethernet-phy"; }; tbi0: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; }; }; }; enet1: ethernet@25000 { #address-cells = <1>; #size-cells = <1>; cell-index = <1>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; reg = <0x25000 0x1000>; ranges = <0x0 0x25000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <35 2 36 2 40 2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi1>; phy-handle = <&phy1>; mdio@520 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,gianfar-tbi"; reg = <0x520 0x20>; tbi1: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; }; }; }; serial0: serial@4500 { cell-index = <0>; device_type = "serial"; compatible = "ns16550"; reg = <0x4500 0x100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? interrupts = <42 2>; interrupt-parent = <&mpic>; }; serial1: serial@4600 { cell-index = <1>; device_type = "serial"; compatible = "ns16550"; reg = <0x4600 0x100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? interrupts = <42 2>; interrupt-parent = <&mpic>; }; crypto@30000 { compatible = "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <45 2>; interrupt-parent = <&mpic>; fsl,num-channels = <4>; fsl,channel-fifo-len = <24>; fsl,exec-units-mask = <0x7e>; fsl,descriptor-types-mask = <0x01010ebf>; }; mpic: pic@40000 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; }; cpm@80000 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; reg = <0x80000 0x20000>; interrupts = <46 2>; interrupt-parent = <&mpic>; }; }; pci0: pci@e0008000 { interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; interrupt-map = < /* IDSEL 0x10 */ 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 /* IDSEL 0x11 */ 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 /* IDSEL 0x12 (Slot 1) */ 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 /* IDSEL 0x13 (Slot 2) */ 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 /* IDSEL 0x14 (Slot 3) */ 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 /* IDSEL 0x15 (Slot 4) */ 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 /* Bus 1 (Tundra Bridge) */ /* IDSEL 0x12 (ISA bridge) */ 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; interrupt-parent = <&mpic>; interrupts = <24 2>; bus-range = <0 0>; ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x10000000 0x1000000 0x0 0x0 0xfee00000 0x0 0x00010000>; clock-frequency = <66666666>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; reg = <0xe0008000 0x1000>; compatible = "fsl,mpc8540-pci"; device_type = "pci"; i8259@19000 { interrupt-controller; device_type = "interrupt-controller"; reg = <0x19000 0x0 0x0 0x0 0x1>; #address-cells = <0>; #interrupt-cells = <2>; compatible = "chrp,iic"; interrupts = <1>; interrupt-parent = <&pci0>; }; }; pci1: pci@e0009000 { interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < /* IDSEL 0x15 */ 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; interrupt-parent = <&mpic>; interrupts = <25 2>; bus-range = <0 0>; ranges = <0x2000000 0x0 0x90000000 0x90000000 0x0 0x10000000 0x1000000 0x0 0x0 0xfee10000 0x0 0x00010000>; clock-frequency = <66666666>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; reg = <0xe0009000 0x1000>; compatible = "fsl,mpc8540-pci"; device_type = "pci"; }; };