// SPDX-License-Identifier: GPL-2.0 /* * AM625 SK: https://www.ti.com/lit/zip/sprr448 * * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; #include "k3-am62x-sk-common.dtsi" / { compatible = "ti,am625-sk", "ti,am625"; model = "Texas Instruments AM625 SK"; opp-table { /* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */ opp-1400000000 { opp-hz = /bits/ 64 <1400000000>; opp-supported-hw = <0x01 0x0004>; clock-latency-ns = <6000000>; }; }; memory@80000000 { device_type = "memory"; /* 2G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; }; vmain_pd: regulator-0 { /* TPS65988 PD CONTROLLER OUTPUT */ bootph-all; compatible = "regulator-fixed"; regulator-name = "vmain_pd"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; regulator-boot-on; }; vcc_5v0: regulator-1 { /* Output of LM34936 */ bootph-all; compatible = "regulator-fixed"; regulator-name = "vcc_5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&vmain_pd>; regulator-always-on; regulator-boot-on; }; vcc_3v3_sys: regulator-2 { /* output of LM61460-Q1 */ bootph-all; compatible = "regulator-fixed"; regulator-name = "vcc_3v3_sys"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vmain_pd>; regulator-always-on; regulator-boot-on; }; vdd_mmc1: regulator-3 { /* TPS22918DBVR */ bootph-all; compatible = "regulator-fixed"; regulator-name = "vdd_mmc1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; enable-active-high; vin-supply = <&vcc_3v3_sys>; gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; }; vdd_sd_dv: regulator-4 { /* Output of TLV71033 */ bootph-all; compatible = "regulator-gpio"; regulator-name = "tlv71033"; pinctrl-names = "default"; pinctrl-0 = <&vdd_sd_dv_pins_default>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; vin-supply = <&vcc_5v0>; gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; states = <1800000 0x0>, <3300000 0x1>; }; vcc_1v8: regulator-5 { /* output of TPS6282518DMQ */ compatible = "regulator-fixed"; regulator-name = "vcc_1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; vin-supply = <&vcc_3v3_sys>; regulator-always-on; regulator-boot-on; }; }; &main_pmx0 { main_rgmii2_pins_default: main-rgmii2-default-pins { bootph-all; pinctrl-single,pins = < AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */ AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */ AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */ AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */ AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */ AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */ AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */ AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */ AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */ AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */ >; }; ospi0_pins_default: ospi0-default-pins { bootph-all; pinctrl-single,pins = < AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */ AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */ AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */ AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */ AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */ AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */ AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */ AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */ >; }; vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { bootph-all; pinctrl-single,pins = < AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */ >; }; main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { bootph-all; pinctrl-single,pins = < AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */ >; }; }; &main_gpio0 { bootph-all; }; &main_gpio1 { bootph-all; }; &main_i2c1 { bootph-all; exp1: gpio@22 { bootph-all; compatible = "ti,tca6424"; reg = <0x22>; gpio-controller; #gpio-cells = <2>; gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", "PRU_DETECT", "MMC1_SD_EN", "VPP_LDO_EN", "EXP_PS_3V3_En", "EXP_PS_5V0_En", "EXP_HAT_DETECT", "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn", "UART1_FET_BUF_EN", "WL_LT_EN", "GPIO_HDMI_RSTn", "CSI_GPIO1", "CSI_GPIO2", "PRU_3V3_EN", "HDMI_INTn", "PD_I2C_IRQ", "MCASP1_FET_EN", "MCASP1_BUF_BT_EN", "MCASP1_FET_SEL", "UART1_FET_SEL", "TSINT#", "IO_EXP_TEST_LED"; interrupt-parent = <&main_gpio1>; interrupts = <23 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; }; }; &sdhci1 { vmmc-supply = <&vdd_mmc1>; vqmmc-supply = <&vdd_sd_dv>; }; &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>; }; &cpsw_port2 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy1>; }; &cpsw3g_mdio { cpsw3g_phy1: ethernet-phy@1 { reg = <1>; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; ti,min-output-impedance; }; }; &mailbox0_cluster0 { mbox_m4_0: mbox-m4-0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; }; &fss { bootph-all; }; &ospi0 { bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&ospi0_pins_default>; flash@0 { bootph-all; compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <8>; spi-rx-bus-width = <8>; spi-max-frequency = <25000000>; cdns,tshsl-ns = <60>; cdns,tsd2d-ns = <60>; cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <4>; partitions { bootph-all; compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "ospi.tiboot3"; reg = <0x0 0x80000>; }; partition@80000 { label = "ospi.tispl"; reg = <0x80000 0x200000>; }; partition@280000 { label = "ospi.u-boot"; reg = <0x280000 0x400000>; }; partition@680000 { label = "ospi.env"; reg = <0x680000 0x40000>; }; partition@6c0000 { label = "ospi.env.backup"; reg = <0x6c0000 0x40000>; }; partition@800000 { label = "ospi.rootfs"; reg = <0x800000 0x37c0000>; }; partition@3fc0000 { bootph-pre-ram; label = "ospi.phypattern"; reg = <0x3fc0000 0x40000>; }; }; }; }; &tlv320aic3106 { DVDD-supply = <&vcc_1v8>; };