<html><head><meta name="color-scheme" content="light dark"></head><body><pre style="word-wrap: break-word; white-space: pre-wrap;">//===-- VVPNodes.def - Lists &amp; properties of VE Vector Predication Nodes --===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines all VVP_* SDNodes and their properties
//
//===----------------------------------------------------------------------===//

/// HANDLE_VP_TO_VVP(VPOPC, VVPOPC)
/// \p  VPOPC is the VP_* SDNode opcode.
/// \p  VVPOPC is the VVP_* SDNode opcode.
#ifndef HANDLE_VP_TO_VVP
#define HANDLE_VP_TO_VVP(VPOPC, VVPOPC)
#endif

/// ADD_VVP_OP(VVPNAME,SDNAME)
/// \p VVPName is a VVP SDNode operator.
/// \p SDNAME is the generic SD opcode corresponding to \p VVPName.
#ifndef ADD_VVP_OP
#define ADD_VVP_OP(X, Y)
#endif

/// ADD_UNARY_VVP_OP(VVPNAME,SDNAME)
/// \p VVPName is a VVP Unary operator.
/// \p SDNAME is the generic SD opcode corresponding to \p VVPName.
#ifndef ADD_UNARY_VVP_OP
#define ADD_UNARY_VVP_OP(VVPNAME,SDNAME) \
            ADD_VVP_OP(VVPNAME,SDNAME)
#endif

/// ADD_BINARY_VVP_OP(VVPNAME,SDNAME)
/// \p VVPName is a VVP Binary operator.
/// \p SDNAME is the generic SD opcode corresponding to \p VVPName.
#ifndef ADD_BINARY_VVP_OP
#define ADD_BINARY_VVP_OP(VVPNAME,VPNAME,SDNAME) \
            ADD_VVP_OP(VVPNAME,SDNAME) \
            HANDLE_VP_TO_VVP(VPNAME, VVPNAME)
#endif

/// ADD_TERNARY_VVP_OP(VVPNAME,SDNAME)
/// \p VVPName is a VVP Ternary operator.
/// \p SDNAME is the generic SD opcode corresponding to \p VVPName.
#ifndef ADD_TERNARY_VVP_OP
#define ADD_TERNARY_VVP_OP(VVPNAME,SDNAME) \
    ADD_VVP_OP(VVPNAME,SDNAME)
#endif

#ifndef ADD_BINARY_VVP_OP_COMPACT
#define ADD_BINARY_VVP_OP_COMPACT(NAME) \
    ADD_BINARY_VVP_OP(VVP_##NAME,VP_##NAME,NAME)
#endif

/// REGISTER_PACKED(OPC)
/// \p OPC The VVP opcode of the operation.
#ifndef REGISTER_PACKED
#define REGISTER_PACKED(OPC)
#endif

/// ADD_REDUCE_VVP_OP(OPC)
/// \p OPC The VVP opcode of the operation.
/// \p SDNAME The standard opcode of the operation.
#ifndef ADD_REDUCE_VVP_OP
#define ADD_REDUCE_VVP_OP(OPC, SDNAME) ADD_VVP_OP(OPC, SDNAME)
#endif

// Scalar standard ISD to perform this reduction.
#ifndef HANDLE_VVP_REDUCE_TO_SCALAR
#define HANDLE_VVP_REDUCE_TO_SCALAR(VVP_RED_ISD, REDUCE_ISD)
#endif

/// Reductions.
#define HELPER_REDUCTION(OPC, SCALAR_OPC) \
    ADD_REDUCE_VVP_OP(VVP_REDUCE_##OPC,VECREDUCE_##OPC) \
    HANDLE_VP_TO_VVP(VP_REDUCE_##OPC, VVP_REDUCE_##OPC) \
    HANDLE_VVP_REDUCE_TO_SCALAR(VVP_REDUCE_##OPC, SCALAR_OPC)

HELPER_REDUCTION(ADD, ADD)
HELPER_REDUCTION(AND, AND)
HELPER_REDUCTION(OR, OR)
HELPER_REDUCTION(XOR, XOR)
HELPER_REDUCTION(SMAX, SMAX)

#undef HELPER_REDUCTION

ADD_VVP_OP(VVP_LOAD,LOAD)   HANDLE_VP_TO_VVP(VP_LOAD, VVP_LOAD)   REGISTER_PACKED(VVP_LOAD)
ADD_VVP_OP(VVP_STORE,STORE) HANDLE_VP_TO_VVP(VP_STORE, VVP_STORE) REGISTER_PACKED(VVP_STORE)

ADD_VVP_OP(VVP_GATHER, MGATHER)     HANDLE_VP_TO_VVP(VP_GATHER, VVP_GATHER)
ADD_VVP_OP(VVP_SCATTER, MSCATTER)   HANDLE_VP_TO_VVP(VP_SCATTER, VVP_SCATTER)

// Integer arithmetic.
ADD_BINARY_VVP_OP_COMPACT(ADD) REGISTER_PACKED(VVP_ADD)
ADD_BINARY_VVP_OP_COMPACT(SUB) REGISTER_PACKED(VVP_SUB)
ADD_BINARY_VVP_OP_COMPACT(MUL)
ADD_BINARY_VVP_OP_COMPACT(UDIV)
ADD_BINARY_VVP_OP_COMPACT(SDIV)

ADD_BINARY_VVP_OP(VVP_SRA,VP_SRA,SRA) REGISTER_PACKED(VVP_SRA)
ADD_BINARY_VVP_OP(VVP_SRL,VP_SRL,SRL) REGISTER_PACKED(VVP_SRL)
ADD_BINARY_VVP_OP_COMPACT(SHL) REGISTER_PACKED(VVP_SHL)

ADD_BINARY_VVP_OP_COMPACT(AND) REGISTER_PACKED(VVP_AND)
ADD_BINARY_VVP_OP_COMPACT(OR)  REGISTER_PACKED(VVP_OR)
ADD_BINARY_VVP_OP_COMPACT(XOR) REGISTER_PACKED(VVP_XOR)

// FP arithmetic.
ADD_UNARY_VVP_OP(VVP_FNEG, FNEG) HANDLE_VP_TO_VVP(VP_FNEG, VVP_FNEG) REGISTER_PACKED(VVP_FNEG)
ADD_BINARY_VVP_OP_COMPACT(FADD) REGISTER_PACKED(VVP_FADD)
ADD_BINARY_VVP_OP_COMPACT(FSUB) REGISTER_PACKED(VVP_FSUB)
ADD_BINARY_VVP_OP_COMPACT(FMUL) REGISTER_PACKED(VVP_FMUL)
ADD_BINARY_VVP_OP_COMPACT(FDIV)

ADD_TERNARY_VVP_OP(VVP_FFMA,FMA) HANDLE_VP_TO_VVP(VP_FMA, VVP_FFMA) REGISTER_PACKED(VVP_FFMA)

ADD_VVP_OP(VVP_SETCC, SETCC)

// Shuffles.
ADD_VVP_OP(VVP_SELECT,VSELECT) REGISTER_PACKED(VVP_SELECT)
HANDLE_VP_TO_VVP(VP_SELECT, VVP_SELECT)
HANDLE_VP_TO_VVP(VP_MERGE, VVP_SELECT)


#undef ADD_BINARY_VVP_OP
#undef ADD_TERNARY_VVP_OP
#undef ADD_UNARY_VVP_OP
#undef ADD_BINARY_VVP_OP_COMPACT
#undef ADD_REDUCE_VVP_OP
#undef ADD_VVP_OP
#undef HANDLE_VP_TO_VVP
#undef HANDLE_VVP_REDUCE_TO_SCALAR
#undef REGISTER_PACKED
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