Lines Matching +full:0 +full:x0d000000
24 # define SIU_MAX_VOLUME 0x1000
26 # define SIU_MAX_VOLUME 0x7fff
29 #define PRAM_SIZE 0x2000
30 #define XRAM_SIZE 0x800
31 #define YRAM_SIZE 0x800
33 #define XRAM_OFFSET 0x4000
34 #define YRAM_OFFSET 0x6000
35 #define REG_OFFSET 0xc000
40 #define VOLUME_CAPTURE 0
42 #define DFLT_VOLUME_LEVEL 0x08000800
66 .i2s = 0x50000000,
67 .pcm = 0x40000000,
68 .spdif = 0x80000000, /* not on all SIU versions */
69 .mask = 0xd0000000,
72 .i2s = 0x05000000,
73 .pcm = 0x04000000,
74 .spdif = 0x08000000,
75 .mask = 0x0d000000,
80 .i2s = 0x00500000,
81 .pcm = 0x00400000,
82 .spdif = 0, /* impossible - turn off */
83 .mask = 0x00500000,
86 .i2s = 0x00050000,
87 .pcm = 0x00040000,
88 .spdif = 0, /* impossible - turn off */
89 .mask = 0x00050000,
102 siu_write32(base + SIU_SRCTL, 0);
107 port_info->stfifo = 0;
108 port_info->trdat = 0;
111 siu_write32(base + SIU_SRCTL, 0x301);
114 siu_write32(base + SIU_CKCTL, 0x40400000);
117 siu_write32(base + SIU_BRGASEL, 0);
118 siu_write32(base + SIU_BRRA, 0);
122 siu_write32(base + SIU_BRRB, 0);
124 siu_write32(base + SIU_IFCTL, 0x44440000);
127 siu_write32(base + SIU_SFORM, 0x0c0c0000);
143 siu_write32(base + SIU_SRCTL, 0);
159 ydef[0] = (fw->spbpar[idx].ab1a << 16) |
162 ydef[1] = fw->yram0[1]; /* 0x03000300 */
164 ydef[3] = fw->yram0[3]; /* 0 */
165 ydef[4] = fw->yram0[4]; /* 0 */
203 srctl |= 0x200;
204 ifctl &= ~0xc2;
208 srctl |= 0x100;
209 ifctl &= ~0x31;
232 dpak &= ~0xc0000000;
235 dpak &= ~0x00c00000;
255 for (cnt = 0; cnt < PRAM0_SIZE; cnt++, add++, ptr++)
259 add = info->pram + (0x0100 / sizeof(u32));
260 for (cnt = 0; cnt < PRAM1_SIZE; cnt++, add++, ptr++)
265 for (cnt = 0; cnt < XRAM0_SIZE + XRAM1_SIZE + XRAM2_SIZE; cnt++, add++)
266 siu_write32(add, 0);
270 for (cnt = 0; cnt < YRAM_DEF_SIZE; cnt++, add++)
274 add = info->yram + (0x0200 / sizeof(u32));
275 for (cnt = 0; cnt < YRAM_FIR_SIZE; cnt++, add++)
279 add = info->yram + (0x0600 / sizeof(u32));
280 for (cnt = 0; cnt < YRAM_IIR_SIZE; cnt++, add++)
281 siu_write32(add, 0);
284 port_info->trdat = 0x0;
288 siu_write32(base + SIU_SBACTIV, 0);
290 siu_write32(base + SIU_SBCTL, 0xc0000000);
292 cnt = 0x10000;
293 while (--cnt && siu_read32(base + SIU_SBCTL) != 0x80000000)
300 siu_write32(base + SIU_SBPSET, 0x00400000);
302 siu_write32(base + SIU_SBACTIV, 0xc0000000);
304 return 0;
312 siu_write32(base + SIU_SBACTIV, 0);
314 siu_write32(base + SIU_SBCTL, 0);
316 port_info->stfifo = 0;
346 uinfo->value.integer.min = 0;
349 return 0;
363 /* Playback is always on port 0 */
365 ucontrol->value.integer.value[0] = vol & 0xffff;
366 ucontrol->value.integer.value[1] = vol >> 16 & 0xffff;
371 ucontrol->value.integer.value[0] = vol & 0xffff;
372 ucontrol->value.integer.value[1] = vol >> 16 & 0xffff;
380 return 0;
395 if (ucontrol->value.integer.value[0] < 0 ||
396 ucontrol->value.integer.value[0] > SIU_MAX_VOLUME ||
397 ucontrol->value.integer.value[1] < 0 ||
401 new_vol = ucontrol->value.integer.value[0] |
407 /* Playback is always on port 0 */
427 return 0;
433 .index = 0,
443 .index = 0,
473 if (ret < 0)
480 if (ret < 0)
485 return 0;
507 if (unlikely(ret < 0))
512 return 0;
563 siu_stream->rw_flg = 0; /* stream-data transfer flag */
573 if (ret < 0)
576 ret = 0;
596 dev_dbg(dai->dev, "%s: fmt 0x%x on port %d\n",
599 if (info->port_id < 0)
622 return 0;
673 if (ret < 0) {
679 if (ret < 0)
741 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
773 if (ret < 0)
778 return 0;