Lines Matching +full:adc +full:- +full:channels

1 // SPDX-License-Identifier: GPL-2.0-or-later
30  * AD193X volume/mute/de-emphasis etc. controls
37 static const DECLARE_TLV_DB_MINMAX(adau193x_tlv, -9563, 0);
67 	/* DAC de-emphasis */
72 	/* ADC switch control */
78 	/* ADC high-pass filter */
79 	SOC_SINGLE("ADC High Pass Filter Switch", AD193X_ADC_CTRL0,
96 	SND_SOC_DAPM_ADC("ADC", "Capture", SND_SOC_NOPM, 0, 0),
105 	struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
108 	return !!ad193x->sysclk;
123 	{ "ADC", NULL, "SYSCLK" },
124 	{ "ADC", NULL, "ADC_PWR" },
125 	{ "ADC", NULL, "ADC1IN" },
126 	{ "ADC", NULL, "ADC2IN" },
131 	switch (ad193x->type) {
148 	struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(dai->component);
151 		regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL2,
155 		regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL2,
164 	struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(dai->component);
165 	unsigned int channels;
169 		channels = AD193X_2_CHANNELS;
172 		channels = AD193X_4_CHANNELS;
175 		channels = AD193X_8_CHANNELS;
178 		channels = AD193X_16_CHANNELS;
181 		return -EINVAL;
184 	regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL1,
185 		AD193X_DAC_CHAN_MASK, channels << AD193X_DAC_CHAN_SHFT);
187 		regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL2,
189 				   channels << AD193X_ADC_CHAN_SHFT);
197 	struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(codec_dai->component);
203 	/* At present, the driver only support AUX ADC mode(SND_SOC_DAIFMT_I2S
204 	 * with TDM), ADC&DAC TDM mode(SND_SOC_DAIFMT_DSP_A) and DAC I2S mode
218 			return -EINVAL;
239 		return -EINVAL;
264 		return -EINVAL;
268 		regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL1,
270 		regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL2,
273 	regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL0,
275 	regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL1,
284 	struct snd_soc_component *component = codec_dai->component;
291 			return -EINVAL;
293 		regmap_update_bits(ad193x->regmap, AD193X_PLL_CLK_CTRL1,
306 		ad193x->sysclk = freq;
309 	return -EINVAL;
317 	struct snd_soc_component *component = dai->component;
319 	bool is_playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
322 	dev_dbg(dai->dev, "%s() rate=%u format=%#x width=%u channels=%u\n",
341 	switch (ad193x->sysclk) {
368 			dev_err(dai->dev, "invalid sampling rate: %d\n", params_rate(params));
369 			return -EINVAL;
372 		regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL0, AD193X_DAC_SR_MASK, dacc0);
375 	regmap_update_bits(ad193x->regmap, AD193X_PLL_CLK_CTRL0,
378 	regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL2,
383 		regmap_update_bits(ad193x->regmap, AD193X_ADC_CTRL1,
392 	return snd_pcm_hw_constraint_list(substream->runtime, 0,
409 	.name = "ad193x-hifi",
431 	.name = "ad193x-hifi",
448 		{  1, 0x04 },	/* PLL_CLK_CTRL1: no on-chip Vref */
451 		{  4, 0x1A },	/* DAC_CTRL2: 48kHz de-emphasis, unmute dac */
452 		{  5, 0x00 },	/* DAC_CHNL_MUTE: unmute DAC channels */
463 		{ 14, 0x03 },	/* ADC_CTRL0: high-pass filter enable */
464 		{ 15, 0x43 },	/* ADC_CTRL1: sata delay=1, adc aux mode */
468 	regmap_multi_reg_write(ad193x->regmap, reg_init, ARRAY_SIZE(reg_init));
471 		regmap_multi_reg_write(ad193x->regmap, reg_adc_init,
485 	/* adc only */
487 		/* add adc controls */
495 		/* add adc widgets */
503 		/* add adc routes */
529 	.max_register = AD193X_NUM_REGS - 1,
543 		return -ENOMEM;
545 	ad193x->regmap = regmap;
546 	ad193x->type = type;