Lines Matching +full:xs +full:- +full:phy
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
57 #include <linux/dma-mapping.h>
75 static int max_queue_depth = -1;
79 static int max_sgl_entries = -1;
83 static int msix_disable = -1;
91 static int max_msix_vectors = -1;
96 static int irqpoll_weight = -1;
103 " enable detection of firmware fault and halt firmware - (default=0)");
105 static int perf_mode = -1;
109 "0 - balanced: high iops mode is enabled &\n\t\t"
111 "1 - iops: high iops mode is disabled &\n\t\t"
113 "2 - latency: high iops mode is disabled &\n\t\t"
115 "\t\tdefault - default perf_mode is 'balanced'"
127 MPT_PERF_MODE_DEFAULT = -1,
145 * mpt3sas_base_check_cmd_timeout - Function
173 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
192 ioc->fwfault_debug = mpt3sas_fwfault_debug; in _scsih_set_fwfault_debug()
200 * _base_readl_aero - retry readl for max three times.
240 * _base_clone_reply_to_sys_mem - copies reply to reply free iomem
256 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_clone_reply_to_sys_mem()
257 void __iomem *reply_free_iomem = (void __iomem *)ioc->chip + in _base_clone_reply_to_sys_mem()
259 (cmd_credit * ioc->request_sz) + (index * sizeof(u32)); in _base_clone_reply_to_sys_mem()
265 * _base_clone_mpi_to_sys_mem - Writes/copies MPI frames
284 * _base_clone_to_sys_mem - Writes/copies data to system/BAR0 region
302 * _base_get_chain - Calculates and Returns virtual chain address
316 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_chain()
318 base_chain = (void __iomem *)ioc->chip + MPI_FRAME_START_OFFSET + in _base_get_chain()
319 (cmd_credit * ioc->request_sz) + in _base_get_chain()
321 chain_virt = base_chain + (smid * ioc->facts.MaxChainDepth * in _base_get_chain()
322 ioc->request_sz) + (sge_chain_count * ioc->request_sz); in _base_get_chain()
327 * _base_get_chain_phys - Calculates and Returns physical address
342 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_chain_phys()
344 base_chain_phys = ioc->chip_phys + MPI_FRAME_START_OFFSET + in _base_get_chain_phys()
345 (cmd_credit * ioc->request_sz) + in _base_get_chain_phys()
347 chain_phys = base_chain_phys + (smid * ioc->facts.MaxChainDepth * in _base_get_chain_phys()
348 ioc->request_sz) + (sge_chain_count * ioc->request_sz); in _base_get_chain_phys()
353 * _base_get_buffer_bar0 - Calculates and Returns BAR0 mapped Host
366 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_buffer_bar0()
370 ioc->facts.MaxChainDepth); in _base_get_buffer_bar0()
375 * _base_get_buffer_phys_bar0 - Calculates and Returns BAR0 mapped
387 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_buffer_phys_bar0()
390 ioc->facts.MaxChainDepth); in _base_get_buffer_phys_bar0()
395 * _base_get_chain_buffer_dma_to_chain_buffer - Iterates chain
412 for (index = 0; index < ioc->scsiio_depth; index++) { in _base_get_chain_buffer_dma_to_chain_buffer()
413 for (j = 0; j < ioc->chains_needed_per_io; j++) { in _base_get_chain_buffer_dma_to_chain_buffer()
414 ct = &ioc->chain_lookup[index].chains_per_smid[j]; in _base_get_chain_buffer_dma_to_chain_buffer()
415 if (ct && ct->chain_buffer_dma == chain_buffer_dma) in _base_get_chain_buffer_dma_to_chain_buffer()
416 return ct->chain_buffer; in _base_get_chain_buffer_dma_to_chain_buffer()
424 * _clone_sg_entries - MPI EP's scsiio and config requests
454 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST) { in _clone_sg_entries()
457 sgel = (Mpi2SGESimple32_t *) &scsiio_request->SGL; in _clone_sg_entries()
459 } else if (request_hdr->Function == MPI2_FUNCTION_CONFIG) { in _clone_sg_entries()
462 sgel = (Mpi2SGESimple32_t *) &config_req->PageBufferSGE; in _clone_sg_entries()
468 * address associated with sgel->Address. in _clone_sg_entries()
484 * 0 - 255 System register in _clone_sg_entries()
485 * 256 - 4352 MPI Frame. (This is based on maxCredit 32) in _clone_sg_entries()
486 * 4352 - 4864 Reply_free pool (512 byte is reserved in _clone_sg_entries()
490 * 4864 - 17152 SGE chain element. (32cmd * 3 chain of in _clone_sg_entries()
492 * 17152 - x Host buffer mapped with smid. in _clone_sg_entries()
505 if (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
509 for (i = 0; i < MPT_MIN_PHYS_SEGMENTS + ioc->facts.MaxChainDepth; i++) { in _clone_sg_entries()
512 (le32_to_cpu(sgel->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT); in _clone_sg_entries()
519 * the virtual address for sgel->Address in _clone_sg_entries()
523 le32_to_cpu(sgel->Address)); in _clone_sg_entries()
538 sgel->Address = in _clone_sg_entries()
548 (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
554 sgel->Address = in _clone_sg_entries()
558 ioc->config_vaddr, in _clone_sg_entries()
559 (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
561 sgel->Address = in _clone_sg_entries()
565 buff_ptr += (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
567 buff_ptr_phys += (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
569 if ((le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
596 src_chain_addr[i], ioc->request_sz); in _clone_sg_entries()
601 * mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
606 * -1 for other case.
614 return -1; in mpt3sas_remove_dead_ioc_func()
616 pdev = ioc->pdev; in mpt3sas_remove_dead_ioc_func()
618 return -1; in mpt3sas_remove_dead_ioc_func()
624 * _base_sync_drv_fw_timestamp - Sync Drive-Fw TimeStamp.
638 mutex_lock(&ioc->scsih_cmds.mutex); in _base_sync_drv_fw_timestamp()
639 if (ioc->scsih_cmds.status != MPT3_CMD_NOT_USED) { in _base_sync_drv_fw_timestamp()
643 ioc->scsih_cmds.status = MPT3_CMD_PENDING; in _base_sync_drv_fw_timestamp()
644 smid = mpt3sas_base_get_smid(ioc, ioc->scsih_cb_idx); in _base_sync_drv_fw_timestamp()
647 ioc->scsih_cmds.status = MPT3_CMD_NOT_USED; in _base_sync_drv_fw_timestamp()
651 ioc->scsih_cmds.smid = smid; in _base_sync_drv_fw_timestamp()
653 mpi_request->Function = MPI2_FUNCTION_IO_UNIT_CONTROL; in _base_sync_drv_fw_timestamp()
654 mpi_request->Operation = MPI26_CTRL_OP_SET_IOC_PARAMETER; in _base_sync_drv_fw_timestamp()
655 mpi_request->IOCParameter = MPI26_SET_IOC_PARAMETER_SYNC_TIMESTAMP; in _base_sync_drv_fw_timestamp()
658 mpi_request->Reserved7 = cpu_to_le32(TimeStamp >> 32); in _base_sync_drv_fw_timestamp()
659 mpi_request->IOCParameterValue = cpu_to_le32(TimeStamp & 0xFFFFFFFF); in _base_sync_drv_fw_timestamp()
660 init_completion(&ioc->scsih_cmds.done); in _base_sync_drv_fw_timestamp()
661 ioc->put_smid_default(ioc, smid); in _base_sync_drv_fw_timestamp()
665 wait_for_completion_timeout(&ioc->scsih_cmds.done, in _base_sync_drv_fw_timestamp()
667 if (!(ioc->scsih_cmds.status & MPT3_CMD_COMPLETE)) { in _base_sync_drv_fw_timestamp()
669 ioc->scsih_cmds.status, mpi_request, in _base_sync_drv_fw_timestamp()
673 if (ioc->scsih_cmds.status & MPT3_CMD_REPLY_VALID) { in _base_sync_drv_fw_timestamp()
674 mpi_reply = ioc->scsih_cmds.reply; in _base_sync_drv_fw_timestamp()
677 le16_to_cpu(mpi_reply->IOCStatus), in _base_sync_drv_fw_timestamp()
678 le32_to_cpu(mpi_reply->IOCLogInfo))); in _base_sync_drv_fw_timestamp()
683 ioc->scsih_cmds.status = MPT3_CMD_NOT_USED; in _base_sync_drv_fw_timestamp()
685 mutex_unlock(&ioc->scsih_cmds.mutex); in _base_sync_drv_fw_timestamp()
689 * _base_fault_reset_work - workq handling ioc fault conditions
705 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
706 if ((ioc->shost_recovery && (ioc->ioc_coredump_loop == 0)) || in _base_fault_reset_work()
707 ioc->pci_error_recovery) in _base_fault_reset_work()
709 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
713 ioc_err(ioc, "SAS host is non-operational !!!!\n"); in _base_fault_reset_work()
717 * by considering controller is in a non-operational state. So in _base_fault_reset_work()
720 * controller to non-operational state and remove the dead ioc in _base_fault_reset_work()
723 if (ioc->non_operational_loop++ < 5) { in _base_fault_reset_work()
724 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, in _base_fault_reset_work()
737 ioc->schedule_dead_ioc_flush_running_cmds(ioc); in _base_fault_reset_work()
742 ioc->remove_host = 1; in _base_fault_reset_work()
745 "%s_dead_ioc_%d", ioc->driver_name, ioc->id); in _base_fault_reset_work()
756 u8 timeout = (ioc->manu_pg11.CoreDumpTOSec) ? in _base_fault_reset_work()
757 ioc->manu_pg11.CoreDumpTOSec : in _base_fault_reset_work()
762 if (ioc->ioc_coredump_loop == 0) { in _base_fault_reset_work()
767 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
768 ioc->shost_recovery = 1; in _base_fault_reset_work()
770 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
777 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
780 if (ioc->ioc_coredump_loop++ < timeout) { in _base_fault_reset_work()
782 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
787 if (ioc->ioc_coredump_loop) { in _base_fault_reset_work()
790 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
793 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
794 ioc->ioc_coredump_loop = MPT3SAS_COREDUMP_LOOP_DONE; in _base_fault_reset_work()
796 ioc->non_operational_loop = 0; in _base_fault_reset_work()
813 ioc->ioc_coredump_loop = 0; in _base_fault_reset_work()
814 if (ioc->time_sync_interval && in _base_fault_reset_work()
815 ++ioc->timestamp_update_count >= ioc->time_sync_interval) { in _base_fault_reset_work()
816 ioc->timestamp_update_count = 0; in _base_fault_reset_work()
819 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
821 if (ioc->fault_reset_work_q) in _base_fault_reset_work()
822 queue_delayed_work(ioc->fault_reset_work_q, in _base_fault_reset_work()
823 &ioc->fault_reset_work, in _base_fault_reset_work()
825 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
829 * mpt3sas_base_start_watchdog - start the fault_reset_work_q
839 if (ioc->fault_reset_work_q) in mpt3sas_base_start_watchdog()
842 ioc->timestamp_update_count = 0; in mpt3sas_base_start_watchdog()
845 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); in mpt3sas_base_start_watchdog()
846 snprintf(ioc->fault_reset_work_q_name, in mpt3sas_base_start_watchdog()
847 sizeof(ioc->fault_reset_work_q_name), "poll_%s%d_status", in mpt3sas_base_start_watchdog()
848 ioc->driver_name, ioc->id); in mpt3sas_base_start_watchdog()
849 ioc->fault_reset_work_q = alloc_ordered_workqueue( in mpt3sas_base_start_watchdog()
850 "%s", WQ_MEM_RECLAIM, ioc->fault_reset_work_q_name); in mpt3sas_base_start_watchdog()
851 if (!ioc->fault_reset_work_q) { in mpt3sas_base_start_watchdog()
855 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_start_watchdog()
856 if (ioc->fault_reset_work_q) in mpt3sas_base_start_watchdog()
857 queue_delayed_work(ioc->fault_reset_work_q, in mpt3sas_base_start_watchdog()
858 &ioc->fault_reset_work, in mpt3sas_base_start_watchdog()
860 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_start_watchdog()
864 * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
875 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_stop_watchdog()
876 wq = ioc->fault_reset_work_q; in mpt3sas_base_stop_watchdog()
877 ioc->fault_reset_work_q = NULL; in mpt3sas_base_stop_watchdog()
878 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_stop_watchdog()
880 if (!cancel_delayed_work_sync(&ioc->fault_reset_work)) in mpt3sas_base_stop_watchdog()
887 * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
898 * mpt3sas_base_coredump_info - verbose translation of firmware CoreDump state
911 * mpt3sas_base_wait_for_coredump_completion - Wait until coredump
916 * Return: 0 for success, non-zero for failure.
922 u8 timeout = (ioc->manu_pg11.CoreDumpTOSec) ? in mpt3sas_base_wait_for_coredump_completion()
923 ioc->manu_pg11.CoreDumpTOSec : in mpt3sas_base_wait_for_coredump_completion()
942 * mpt3sas_halt_firmware - halt's mpt controller firmware
955 if (!ioc->fwfault_debug) in mpt3sas_halt_firmware()
960 doorbell = ioc->base_readl_ext_retry(&ioc->chip->Doorbell); in mpt3sas_halt_firmware()
969 writel(0xC0FFEE00, &ioc->chip->Doorbell); in mpt3sas_halt_firmware()
973 if (ioc->fwfault_debug == 2) in mpt3sas_halt_firmware()
981 * _base_sas_ioc_info - verbose translation of the ioc status
990 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & in _base_sas_ioc_info()
997 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || in _base_sas_ioc_info()
998 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || in _base_sas_ioc_info()
999 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) in _base_sas_ioc_info()
1009 if (request_hdr->Function == MPI2_FUNCTION_CONFIG) { in _base_sas_ioc_info()
1012 if ((rqst->ExtPageType == in _base_sas_ioc_info()
1014 !(ioc->logging_level & MPT_DEBUG_CONFIG)) { in _base_sas_ioc_info()
1098 * For use by SCSI Initiator and SCSI Target end-to-end data protection in _base_sas_ioc_info()
1171 switch (request_hdr->Function) { in _base_sas_ioc_info()
1173 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; in _base_sas_ioc_info()
1197 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; in _base_sas_ioc_info()
1202 ioc->sge_size; in _base_sas_ioc_info()
1218 * _base_display_event_data - verbose translation of firmware asyn events
1229 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) in _base_display_event_data()
1232 event = le16_to_cpu(mpi_reply->Event); in _base_display_event_data()
1251 if (!ioc->hide_ir_msg) in _base_display_event_data()
1257 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData; in _base_display_event_data()
1259 event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED ? in _base_display_event_data()
1261 if (event_data->DiscoveryStatus) in _base_display_event_data()
1263 le32_to_cpu(event_data->DiscoveryStatus)); in _base_display_event_data()
1283 if (!ioc->hide_ir_msg) in _base_display_event_data()
1287 if (!ioc->hide_ir_msg) in _base_display_event_data()
1291 if (!ioc->hide_ir_msg) in _base_display_event_data()
1295 if (!ioc->hide_ir_msg) in _base_display_event_data()
1313 (Mpi26EventDataPCIeEnumeration_t *)mpi_reply->EventData; in _base_display_event_data()
1315 event_data->ReasonCode == MPI26_EVENT_PCIE_ENUM_RC_STARTED ? in _base_display_event_data()
1317 if (event_data->EnumerationStatus) in _base_display_event_data()
1319 le32_to_cpu(event_data->EnumerationStatus)); in _base_display_event_data()
1335 * _base_sas_log_info - verbose translation of firmware log info
1363 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info == in _base_sas_log_info()
1375 if (!ioc->hide_ir_msg) in _base_sas_log_info()
1388 * _base_display_reply_info - handle reply descriptors depending on IOC Status
1408 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); in _base_display_reply_info()
1411 (ioc->logging_level & MPT_DEBUG_REPLY)) { in _base_display_reply_info()
1417 loginfo = le32_to_cpu(mpi_reply->IOCLogInfo); in _base_display_reply_info()
1428 * mpt3sas_base_done - base internal command completion routine
1445 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) in mpt3sas_base_done()
1448 if (ioc->base_cmds.status == MPT3_CMD_NOT_USED) in mpt3sas_base_done()
1451 ioc->base_cmds.status |= MPT3_CMD_COMPLETE; in mpt3sas_base_done()
1453 ioc->base_cmds.status |= MPT3_CMD_REPLY_VALID; in mpt3sas_base_done()
1454 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); in mpt3sas_base_done()
1456 ioc->base_cmds.status &= ~MPT3_CMD_PENDING; in mpt3sas_base_done()
1458 complete(&ioc->base_cmds.done); in mpt3sas_base_done()
1463 * _base_async_event - main callback handler for firmware asyn events
1483 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) in _base_async_event()
1488 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) in _base_async_event()
1490 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_async_event()
1496 INIT_LIST_HEAD(&delayed_event_ack->list); in _base_async_event()
1497 delayed_event_ack->Event = mpi_reply->Event; in _base_async_event()
1498 delayed_event_ack->EventContext = mpi_reply->EventContext; in _base_async_event()
1499 list_add_tail(&delayed_event_ack->list, in _base_async_event()
1500 &ioc->delayed_event_ack_list); in _base_async_event()
1503 le16_to_cpu(mpi_reply->Event))); in _base_async_event()
1509 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; in _base_async_event()
1510 ack_request->Event = mpi_reply->Event; in _base_async_event()
1511 ack_request->EventContext = mpi_reply->EventContext; in _base_async_event()
1512 ack_request->VF_ID = 0; /* TODO */ in _base_async_event()
1513 ack_request->VP_ID = 0; in _base_async_event()
1514 ioc->put_smid_default(ioc, smid); in _base_async_event()
1533 WARN_ON(smid >= ioc->hi_priority_smid)) in _get_st_from_smid()
1544 * _base_get_cb_idx - obtain the callback index
1554 u16 ctl_smid = ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT + 1; in _base_get_cb_idx()
1557 if (smid < ioc->hi_priority_smid) { in _base_get_cb_idx()
1563 cb_idx = st->cb_idx; in _base_get_cb_idx()
1565 cb_idx = ioc->ctl_cb_idx; in _base_get_cb_idx()
1566 } else if (smid < ioc->internal_smid) { in _base_get_cb_idx()
1567 i = smid - ioc->hi_priority_smid; in _base_get_cb_idx()
1568 cb_idx = ioc->hpr_lookup[i].cb_idx; in _base_get_cb_idx()
1569 } else if (smid <= ioc->hba_queue_depth) { in _base_get_cb_idx()
1570 i = smid - ioc->internal_smid; in _base_get_cb_idx()
1571 cb_idx = ioc->internal_lookup[i].cb_idx; in _base_get_cb_idx()
1577 * mpt3sas_base_pause_mq_polling - pause polling on the mq poll queues
1591 ioc->reply_queue_count - ioc->iopoll_q_start_index; in mpt3sas_base_pause_mq_polling()
1595 atomic_set(&ioc->io_uring_poll_queues[qid].pause, 1); in mpt3sas_base_pause_mq_polling()
1601 while (atomic_read(&ioc->io_uring_poll_queues[qid].busy)) { in mpt3sas_base_pause_mq_polling()
1609 * mpt3sas_base_resume_mq_polling - Resume polling on mq poll queues.
1618 ioc->reply_queue_count - ioc->iopoll_q_start_index; in mpt3sas_base_resume_mq_polling()
1622 atomic_set(&ioc->io_uring_poll_queues[qid].pause, 0); in mpt3sas_base_resume_mq_polling()
1626 * mpt3sas_base_mask_interrupts - disable interrupts
1636 ioc->mask_interrupts = 1; in mpt3sas_base_mask_interrupts()
1637 him_register = ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1639 writel(him_register, &ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1640 ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1644 * mpt3sas_base_unmask_interrupts - enable interrupts
1654 him_register = ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_unmask_interrupts()
1656 writel(him_register, &ioc->chip->HostInterruptMask); in mpt3sas_base_unmask_interrupts()
1657 ioc->mask_interrupts = 0; in mpt3sas_base_unmask_interrupts()
1679 * _base_process_reply_queue - Process reply descriptors from reply
1695 u8 msix_index = reply_q->msix_index; in _base_process_reply_queue()
1696 struct MPT3SAS_ADAPTER *ioc = reply_q->ioc; in _base_process_reply_queue()
1701 if (!atomic_add_unless(&reply_q->busy, 1, 1)) in _base_process_reply_queue()
1704 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index]; in _base_process_reply_queue()
1705 request_descript_type = rpf->Default.ReplyFlags in _base_process_reply_queue()
1708 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1714 rd.word = le64_to_cpu(rpf->Words); in _base_process_reply_queue()
1718 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1); in _base_process_reply_queue()
1736 rpf->AddressReply.ReplyFrameAddress); in _base_process_reply_queue()
1737 if (reply > ioc->reply_dma_max_address || in _base_process_reply_queue()
1738 reply < ioc->reply_dma_min_address) in _base_process_reply_queue()
1759 ioc->reply_free_host_index = in _base_process_reply_queue()
1760 (ioc->reply_free_host_index == in _base_process_reply_queue()
1761 (ioc->reply_free_queue_depth - 1)) ? in _base_process_reply_queue()
1762 0 : ioc->reply_free_host_index + 1; in _base_process_reply_queue()
1763 ioc->reply_free[ioc->reply_free_host_index] = in _base_process_reply_queue()
1765 if (ioc->is_mcpu_endpoint) in _base_process_reply_queue()
1768 ioc->reply_free_host_index); in _base_process_reply_queue()
1769 writel(ioc->reply_free_host_index, in _base_process_reply_queue()
1770 &ioc->chip->ReplyFreeHostIndex); in _base_process_reply_queue()
1774 rpf->Words = cpu_to_le64(ULLONG_MAX); in _base_process_reply_queue()
1775 reply_q->reply_post_host_index = in _base_process_reply_queue()
1776 (reply_q->reply_post_host_index == in _base_process_reply_queue()
1777 (ioc->reply_post_queue_depth - 1)) ? 0 : in _base_process_reply_queue()
1778 reply_q->reply_post_host_index + 1; in _base_process_reply_queue()
1780 reply_q->reply_post_free[reply_q->reply_post_host_index]. in _base_process_reply_queue()
1788 if (completed_cmds >= ioc->thresh_hold) { in _base_process_reply_queue()
1789 if (ioc->combined_reply_queue) { in _base_process_reply_queue()
1790 writel(reply_q->reply_post_host_index | in _base_process_reply_queue()
1793 ioc->replyPostRegisterIndex[msix_index/8]); in _base_process_reply_queue()
1795 writel(reply_q->reply_post_host_index | in _base_process_reply_queue()
1798 &ioc->chip->ReplyPostHostIndex); in _base_process_reply_queue()
1800 if (!reply_q->is_iouring_poll_q && in _base_process_reply_queue()
1801 !reply_q->irq_poll_scheduled) { in _base_process_reply_queue()
1802 reply_q->irq_poll_scheduled = true; in _base_process_reply_queue()
1803 irq_poll_sched(&reply_q->irqpoll); in _base_process_reply_queue()
1805 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1810 if (!reply_q->reply_post_host_index) in _base_process_reply_queue()
1811 rpf = reply_q->reply_post_free; in _base_process_reply_queue()
1819 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1823 if (ioc->is_warpdrive) { in _base_process_reply_queue()
1824 writel(reply_q->reply_post_host_index, in _base_process_reply_queue()
1825 ioc->reply_post_host_index[msix_index]); in _base_process_reply_queue()
1826 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1839 * Host Index Register supports 8 MSI-X vectors. in _base_process_reply_queue()
1845 if (ioc->combined_reply_queue) in _base_process_reply_queue()
1846 writel(reply_q->reply_post_host_index | ((msix_index & 7) << in _base_process_reply_queue()
1848 ioc->replyPostRegisterIndex[msix_index/8]); in _base_process_reply_queue()
1850 writel(reply_q->reply_post_host_index | (msix_index << in _base_process_reply_queue()
1852 &ioc->chip->ReplyPostHostIndex); in _base_process_reply_queue()
1853 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1858 * mpt3sas_blk_mq_poll - poll the blk mq poll queue
1867 (struct MPT3SAS_ADAPTER *)shost->hostdata; in mpt3sas_blk_mq_poll()
1870 int qid = queue_num - ioc->iopoll_q_start_index; in mpt3sas_blk_mq_poll()
1872 if (atomic_read(&ioc->io_uring_poll_queues[qid].pause) || in mpt3sas_blk_mq_poll()
1873 !atomic_add_unless(&ioc->io_uring_poll_queues[qid].busy, 1, 1)) in mpt3sas_blk_mq_poll()
1876 reply_q = ioc->io_uring_poll_queues[qid].reply_q; in mpt3sas_blk_mq_poll()
1879 atomic_dec(&ioc->io_uring_poll_queues[qid].busy); in mpt3sas_blk_mq_poll()
1885 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
1895 struct MPT3SAS_ADAPTER *ioc = reply_q->ioc; in _base_interrupt()
1897 if (ioc->mask_interrupts) in _base_interrupt()
1899 if (reply_q->irq_poll_scheduled) in _base_interrupt()
1906 * _base_irqpoll - IRQ poll callback handler
1920 if (reply_q->irq_line_enable) { in _base_irqpoll()
1921 disable_irq_nosync(reply_q->os_irq); in _base_irqpoll()
1922 reply_q->irq_line_enable = false; in _base_irqpoll()
1927 reply_q->irq_poll_scheduled = false; in _base_irqpoll()
1928 reply_q->irq_line_enable = true; in _base_irqpoll()
1929 enable_irq(reply_q->os_irq); in _base_irqpoll()
1943 * _base_init_irqpolls - initliaze IRQ polls
1953 if (list_empty(&ioc->reply_queue_list)) in _base_init_irqpolls()
1956 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { in _base_init_irqpolls()
1957 if (reply_q->is_iouring_poll_q) in _base_init_irqpolls()
1959 irq_poll_init(&reply_q->irqpoll, in _base_init_irqpolls()
1960 ioc->hba_queue_depth/4, _base_irqpoll); in _base_init_irqpolls()
1961 reply_q->irq_poll_scheduled = false; in _base_init_irqpolls()
1962 reply_q->irq_line_enable = true; in _base_init_irqpolls()
1963 reply_q->os_irq = pci_irq_vector(ioc->pdev, in _base_init_irqpolls()
1964 reply_q->msix_index); in _base_init_irqpolls()
1969 * _base_is_controller_msix_enabled - is controller support muli-reply queues
1977 return (ioc->facts.IOCCapabilities & in _base_is_controller_msix_enabled()
1978 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable; in _base_is_controller_msix_enabled()
1982 * mpt3sas_base_sync_reply_irqs - flush pending MSIX interrupts
1985 * timed-out SCSI command got delayed
1986 * Context: non-ISR context
1996 * then multi-queues are not enabled in mpt3sas_base_sync_reply_irqs()
2001 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in mpt3sas_base_sync_reply_irqs()
2002 if (ioc->shost_recovery || ioc->remove_host || in mpt3sas_base_sync_reply_irqs()
2003 ioc->pci_error_recovery) in mpt3sas_base_sync_reply_irqs()
2006 if (reply_q->msix_index == 0) in mpt3sas_base_sync_reply_irqs()
2009 if (reply_q->is_iouring_poll_q) { in mpt3sas_base_sync_reply_irqs()
2014 synchronize_irq(pci_irq_vector(ioc->pdev, reply_q->msix_index)); in mpt3sas_base_sync_reply_irqs()
2015 if (reply_q->irq_poll_scheduled) { in mpt3sas_base_sync_reply_irqs()
2019 irq_poll_disable(&reply_q->irqpoll); in mpt3sas_base_sync_reply_irqs()
2020 irq_poll_enable(&reply_q->irqpoll); in mpt3sas_base_sync_reply_irqs()
2024 if (reply_q->irq_poll_scheduled) { in mpt3sas_base_sync_reply_irqs()
2025 reply_q->irq_poll_scheduled = false; in mpt3sas_base_sync_reply_irqs()
2026 reply_q->irq_line_enable = true; in mpt3sas_base_sync_reply_irqs()
2027 enable_irq(reply_q->os_irq); in mpt3sas_base_sync_reply_irqs()
2037 * mpt3sas_base_release_callback_handler - clear interrupt callback handler
2047 * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
2057 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) in mpt3sas_base_register_callback_handler()
2066 * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
2079 * _base_build_zero_len_sge - build zero length sg entry
2094 ioc->base_add_sg_single(paddr, flags_length, -1); in _base_build_zero_len_sge()
2098 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
2110 sgel->FlagsLength = cpu_to_le32(flags_length); in _base_add_sg_single_32()
2111 sgel->Address = cpu_to_le32(dma_addr); in _base_add_sg_single_32()
2116 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
2128 sgel->FlagsLength = cpu_to_le32(flags_length); in _base_add_sg_single_64()
2129 sgel->Address = cpu_to_le64(dma_addr); in _base_add_sg_single_64()
2133 * _base_get_chain_buffer_tracker - obtain chain tracker
2146 u16 smid = st->smid; in _base_get_chain_buffer_tracker()
2148 atomic_read(&ioc->chain_lookup[smid - 1].chain_offset); in _base_get_chain_buffer_tracker()
2150 if (chain_offset == ioc->chains_needed_per_io) in _base_get_chain_buffer_tracker()
2153 chain_req = &ioc->chain_lookup[smid - 1].chains_per_smid[chain_offset]; in _base_get_chain_buffer_tracker()
2154 atomic_inc(&ioc->chain_lookup[smid - 1].chain_offset); in _base_get_chain_buffer_tracker()
2160 * _base_build_sg - build generic sg
2185 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2189 psge += ioc->sge_size; in _base_build_sg()
2196 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2203 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2210 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2218 * _base_build_nvme_prp - This function is called for NVMe end devices to build
2242 * non-contiguous SGL into a PRP in this case. All PRPs will describe
2254 * Each 64-bit PRP entry comprises an address and an offset field. The address
2257 * first element in a PRP list may contain a non-zero offset, implying that all
2262 * by the list begins at a non-zero offset within the first 4KB page, then the
2263 * first PRP element will contain a non-zero offset indicating where the region
2286 (void *)nvme_encap_request->NVMe_Command; in _base_build_nvme_prp()
2294 prp1_entry = &nvme_cmd->prp1; in _base_build_nvme_prp()
2295 prp2_entry = &nvme_cmd->prp2; in _base_build_nvme_prp()
2308 page_mask = ioc->page_size - 1; in _base_build_nvme_prp()
2335 * page boundary - prp_size (8 bytes). in _base_build_nvme_prp()
2342 * - bump the current memory pointer to the next in _base_build_nvme_prp()
2344 * - set the PRP Entry to point to that page. This in _base_build_nvme_prp()
2346 * - bump the PRP Entry pointer the start of the in _base_build_nvme_prp()
2348 * contiguous, no need to get a new page - it's in _base_build_nvme_prp()
2358 entry_len = ioc->page_size - offset; in _base_build_nvme_prp()
2378 if (length > ioc->page_size) { in _base_build_nvme_prp()
2422 length -= entry_len; in _base_build_nvme_prp()
2427 * base_make_prp_nvme - Prepare PRPs (Physical Region Page) -
2431 * @scmd: SCSI command from the mid-layer
2455 nvme_pg_size = max_t(u32, ioc->page_size, NVME_PRP_PAGE_SIZE); in base_make_prp_nvme()
2468 page_mask = nvme_pg_size - 1; in base_make_prp_nvme()
2480 main_chain_element = (pMpi25IeeeSgeChain64_t)&mpi_request->SGL; in base_make_prp_nvme()
2497 main_chain_element->Address = cpu_to_le64(msg_dma); in base_make_prp_nvme()
2498 main_chain_element->NextChainOffset = 0; in base_make_prp_nvme()
2499 main_chain_element->Flags = MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT | in base_make_prp_nvme()
2504 ptr_first_sgl = (pMpi25IeeeSgeChain64_t)&mpi_request->SGL; in base_make_prp_nvme()
2510 first_prp_len = nvme_pg_size - offset; in base_make_prp_nvme()
2512 ptr_first_sgl->Address = cpu_to_le64(sge_addr); in base_make_prp_nvme()
2513 ptr_first_sgl->Length = cpu_to_le32(first_prp_len); in base_make_prp_nvme()
2515 data_len -= first_prp_len; in base_make_prp_nvme()
2519 sge_len -= first_prp_len; in base_make_prp_nvme()
2547 sge_len -= nvme_pg_size; in base_make_prp_nvme()
2548 data_len -= nvme_pg_size; in base_make_prp_nvme()
2561 main_chain_element->Length = in base_make_prp_nvme()
2575 (mpt3sas_scsih_is_pcie_scsi_device(pcie_device->device_info))) { in base_is_prp_possible()
2590 * _base_check_pcie_native_sgl - This function is called for PCIe end devices to
2636 * _base_add_sg_single_ieee - add sg element for IEEE format
2649 sgel->Flags = flags; in _base_add_sg_single_ieee()
2650 sgel->NextChainOffset = chain_offset; in _base_add_sg_single_ieee()
2651 sgel->Length = cpu_to_le32(length); in _base_add_sg_single_ieee()
2652 sgel->Address = cpu_to_le64(dma_addr); in _base_add_sg_single_ieee()
2656 * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
2671 _base_add_sg_single_ieee(paddr, sgl_flags, 0, 0, -1); in _base_build_zero_len_sge_ieee()
2677 * Some firmware versions byte-swap the REPORT ZONES command reply from in _base_scsi_dma_map()
2678 * ATA-ZAC devices by directly accessing in the host buffer. This does in _base_scsi_dma_map()
2682 * mapping bi-directional. in _base_scsi_dma_map()
2684 if (cmd->cmnd[0] == ZBC_IN && cmd->cmnd[1] == ZI_REPORT_ZONES) in _base_scsi_dma_map()
2685 cmd->sc_data_direction = DMA_BIDIRECTIONAL; in _base_scsi_dma_map()
2691 * _base_build_sg_scmd - main sg creation routine
2726 if (scmd->sc_data_direction == DMA_TO_DEVICE) in _base_build_sg_scmd()
2738 return -ENOMEM; in _base_build_sg_scmd()
2740 sg_local = &mpi_request->SGL; in _base_build_sg_scmd()
2741 sges_in_segment = ioc->max_sges_in_main_message; in _base_build_sg_scmd()
2745 mpi_request->ChainOffset = (offsetof(Mpi2SCSIIORequest_t, SGL) + in _base_build_sg_scmd()
2746 (sges_in_segment * ioc->sge_size))/4; in _base_build_sg_scmd()
2751 ioc->base_add_sg_single(sg_local, in _base_build_sg_scmd()
2755 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2758 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2759 sges_left--; in _base_build_sg_scmd()
2760 sges_in_segment--; in _base_build_sg_scmd()
2767 return -1; in _base_build_sg_scmd()
2768 chain = chain_req->chain_buffer; in _base_build_sg_scmd()
2769 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd()
2772 ioc->max_sges_in_chain_message) ? sges_left : in _base_build_sg_scmd()
2773 ioc->max_sges_in_chain_message; in _base_build_sg_scmd()
2775 0 : (sges_in_segment * ioc->sge_size)/4; in _base_build_sg_scmd()
2776 chain_length = sges_in_segment * ioc->sge_size; in _base_build_sg_scmd()
2780 chain_length += ioc->sge_size; in _base_build_sg_scmd()
2782 ioc->base_add_sg_single(sg_local, chain_flags | chain_offset | in _base_build_sg_scmd()
2791 ioc->base_add_sg_single(sg_local, in _base_build_sg_scmd()
2796 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2800 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2801 sges_left--; in _base_build_sg_scmd()
2802 sges_in_segment--; in _base_build_sg_scmd()
2807 return -1; in _base_build_sg_scmd()
2808 chain = chain_req->chain_buffer; in _base_build_sg_scmd()
2809 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd()
2818 ioc->base_add_sg_single(sg_local, sgl_flags_end_buffer | in _base_build_sg_scmd()
2821 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2824 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2825 sges_left--; in _base_build_sg_scmd()
2832 * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
2882 return -ENOMEM; in _base_build_sg_scmd_ieee()
2884 sg_local = &mpi_request->SGL; in _base_build_sg_scmd_ieee()
2885 sges_in_segment = (ioc->request_sz - in _base_build_sg_scmd_ieee()
2886 offsetof(Mpi25SCSIIORequest_t, SGL))/ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2890 mpi_request->ChainOffset = (sges_in_segment - 1 /* chain element */) + in _base_build_sg_scmd_ieee()
2891 (offsetof(Mpi25SCSIIORequest_t, SGL)/ioc->sge_size_ieee); in _base_build_sg_scmd_ieee()
2898 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2899 sges_left--; in _base_build_sg_scmd_ieee()
2900 sges_in_segment--; in _base_build_sg_scmd_ieee()
2906 return -1; in _base_build_sg_scmd_ieee()
2907 chain = chain_req->chain_buffer; in _base_build_sg_scmd_ieee()
2908 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd_ieee()
2911 ioc->max_sges_in_chain_message) ? sges_left : in _base_build_sg_scmd_ieee()
2912 ioc->max_sges_in_chain_message; in _base_build_sg_scmd_ieee()
2915 chain_length = sges_in_segment * ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2917 chain_length += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2930 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2931 sges_left--; in _base_build_sg_scmd_ieee()
2932 sges_in_segment--; in _base_build_sg_scmd_ieee()
2937 return -1; in _base_build_sg_scmd_ieee()
2938 chain = chain_req->chain_buffer; in _base_build_sg_scmd_ieee()
2939 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd_ieee()
2955 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2956 sges_left--; in _base_build_sg_scmd_ieee()
2963 * _base_build_sg_ieee - build generic sg for IEEE format
2991 psge += ioc->sge_size_ieee; in _base_build_sg_ieee()
3012 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
3015 * _base_config_dma_addressing - set dma addressing
3019 * Return: 0 for success, non-zero for failure.
3027 if (ioc->is_mcpu_endpoint || sizeof(dma_addr_t) == 4) { in _base_config_dma_addressing()
3028 ioc->dma_mask = 32; in _base_config_dma_addressing()
3031 } else if (ioc->hba_mpi_version_belonged > MPI2_VERSION) { in _base_config_dma_addressing()
3032 ioc->dma_mask = 63; in _base_config_dma_addressing()
3035 ioc->dma_mask = 64; in _base_config_dma_addressing()
3039 if (ioc->use_32bit_dma) in _base_config_dma_addressing()
3042 if (dma_set_mask(&pdev->dev, dma_mask) || in _base_config_dma_addressing()
3043 dma_set_coherent_mask(&pdev->dev, coherent_dma_mask)) in _base_config_dma_addressing()
3044 return -ENODEV; in _base_config_dma_addressing()
3046 if (ioc->dma_mask > 32) { in _base_config_dma_addressing()
3047 ioc->base_add_sg_single = &_base_add_sg_single_64; in _base_config_dma_addressing()
3048 ioc->sge_size = sizeof(Mpi2SGESimple64_t); in _base_config_dma_addressing()
3050 ioc->base_add_sg_single = &_base_add_sg_single_32; in _base_config_dma_addressing()
3051 ioc->sge_size = sizeof(Mpi2SGESimple32_t); in _base_config_dma_addressing()
3056 ioc->dma_mask, convert_to_kb(s.totalram)); in _base_config_dma_addressing()
3062 * _base_check_enable_msix - checks MSIX capabable.
3075 * if it is SAS2008 B0 controller use IO-APIC instead of MSIX in _base_check_enable_msix()
3077 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 && in _base_check_enable_msix()
3078 ioc->pdev->revision == SAS2_PCI_DEVICE_B0_REVISION) { in _base_check_enable_msix()
3079 return -EINVAL; in _base_check_enable_msix()
3082 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); in _base_check_enable_msix()
3085 return -EINVAL; in _base_check_enable_msix()
3090 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 || in _base_check_enable_msix()
3091 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 || in _base_check_enable_msix()
3092 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 || in _base_check_enable_msix()
3093 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 || in _base_check_enable_msix()
3094 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 || in _base_check_enable_msix()
3095 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 || in _base_check_enable_msix()
3096 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2) in _base_check_enable_msix()
3097 ioc->msix_vector_count = 1; in _base_check_enable_msix()
3099 pci_read_config_word(ioc->pdev, base + 2, &message_control); in _base_check_enable_msix()
3100 ioc->msix_vector_count = (message_control & 0x3FF) + 1; in _base_check_enable_msix()
3103 ioc->msix_vector_count)); in _base_check_enable_msix()
3108 * mpt3sas_base_free_irq - free irq
3119 if (list_empty(&ioc->reply_queue_list)) in mpt3sas_base_free_irq()
3122 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { in mpt3sas_base_free_irq()
3123 list_del(&reply_q->list); in mpt3sas_base_free_irq()
3124 if (reply_q->is_iouring_poll_q) { in mpt3sas_base_free_irq()
3129 if (ioc->smp_affinity_enable) { in mpt3sas_base_free_irq()
3130 irq = pci_irq_vector(ioc->pdev, reply_q->msix_index); in mpt3sas_base_free_irq()
3133 free_irq(pci_irq_vector(ioc->pdev, reply_q->msix_index), in mpt3sas_base_free_irq()
3140 * _base_request_irq - request irq
3149 struct pci_dev *pdev = ioc->pdev; in _base_request_irq()
3157 return -ENOMEM; in _base_request_irq()
3159 reply_q->ioc = ioc; in _base_request_irq()
3160 reply_q->msix_index = index; in _base_request_irq()
3162 atomic_set(&reply_q->busy, 0); in _base_request_irq()
3164 if (index >= ioc->iopoll_q_start_index) { in _base_request_irq()
3165 qid = index - ioc->iopoll_q_start_index; in _base_request_irq()
3166 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-mq-poll%d", in _base_request_irq()
3167 ioc->driver_name, ioc->id, qid); in _base_request_irq()
3168 reply_q->is_iouring_poll_q = 1; in _base_request_irq()
3169 ioc->io_uring_poll_queues[qid].reply_q = reply_q; in _base_request_irq()
3174 if (ioc->msix_enable) in _base_request_irq()
3175 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d", in _base_request_irq()
3176 ioc->driver_name, ioc->id, index); in _base_request_irq()
3178 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d", in _base_request_irq()
3179 ioc->driver_name, ioc->id); in _base_request_irq()
3181 IRQF_SHARED, reply_q->name, reply_q); in _base_request_irq()
3184 reply_q->name, pci_irq_vector(pdev, index)); in _base_request_irq()
3186 return -EBUSY; in _base_request_irq()
3189 INIT_LIST_HEAD(&reply_q->list); in _base_request_irq()
3190 list_add_tail(&reply_q->list, &ioc->reply_queue_list); in _base_request_irq()
3195 * _base_assign_reply_queues - assigning msix index for each cpu
3205 int iopoll_q_count = ioc->reply_queue_count - in _base_assign_reply_queues()
3206 ioc->iopoll_q_start_index; in _base_assign_reply_queues()
3212 if (ioc->msix_load_balance) in _base_assign_reply_queues()
3215 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz); in _base_assign_reply_queues()
3218 nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count, in _base_assign_reply_queues()
3219 ioc->facts.MaxMSIxVectors); in _base_assign_reply_queues()
3223 if (ioc->smp_affinity_enable) { in _base_assign_reply_queues()
3229 if (ioc->high_iops_queues) { in _base_assign_reply_queues()
3230 mask = cpumask_of_node(dev_to_node(&ioc->pdev->dev)); in _base_assign_reply_queues()
3231 for (index = 0; index < ioc->high_iops_queues; in _base_assign_reply_queues()
3233 irq = pci_irq_vector(ioc->pdev, index); in _base_assign_reply_queues()
3238 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_assign_reply_queues()
3241 if (reply_q->msix_index < ioc->high_iops_queues || in _base_assign_reply_queues()
3242 reply_q->msix_index >= ioc->iopoll_q_start_index) in _base_assign_reply_queues()
3245 mask = pci_irq_get_affinity(ioc->pdev, in _base_assign_reply_queues()
3246 reply_q->msix_index); in _base_assign_reply_queues()
3249 reply_q->msix_index); in _base_assign_reply_queues()
3254 if (cpu >= ioc->cpu_msix_table_sz) in _base_assign_reply_queues()
3256 ioc->cpu_msix_table[cpu] = reply_q->msix_index; in _base_assign_reply_queues()
3264 nr_msix -= (ioc->high_iops_queues - iopoll_q_count); in _base_assign_reply_queues()
3267 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_assign_reply_queues()
3270 if (reply_q->msix_index < ioc->high_iops_queues || in _base_assign_reply_queues()
3271 reply_q->msix_index >= ioc->iopoll_q_start_index) in _base_assign_reply_queues()
3281 ioc->cpu_msix_table[cpu] = reply_q->msix_index; in _base_assign_reply_queues()
3289 * _base_check_and_enable_high_iops_queues - enable high iops mode
3294 * - HBA is a SEA/AERO controller and
3295 * - MSI-Xs vector supported by the HBA is 128 and
3296 * - total CPU count in the system >=16 and
3297 * - loaded driver with default max_msix_vectors module parameter and
3298 * - system booted in non kdump mode
3313 ioc->io_uring_poll_queues) { in _base_check_and_enable_high_iops_queues()
3314 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3320 pcie_capability_read_word(ioc->pdev, PCI_EXP_LNKSTA, &lnksta); in _base_check_and_enable_high_iops_queues()
3324 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3329 if (!reset_devices && ioc->is_aero_ioc && in _base_check_and_enable_high_iops_queues()
3332 max_msix_vectors == -1) in _base_check_and_enable_high_iops_queues()
3333 ioc->high_iops_queues = MPT3SAS_HIGH_IOPS_REPLY_QUEUES; in _base_check_and_enable_high_iops_queues()
3335 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3339 * mpt3sas_base_disable_msix - disables msix
3346 if (!ioc->msix_enable) in mpt3sas_base_disable_msix()
3348 pci_free_irq_vectors(ioc->pdev); in mpt3sas_base_disable_msix()
3349 ioc->msix_enable = 0; in mpt3sas_base_disable_msix()
3350 kfree(ioc->io_uring_poll_queues); in mpt3sas_base_disable_msix()
3354 * _base_alloc_irq_vectors - allocate msix vectors
3362 struct irq_affinity desc = { .pre_vectors = ioc->high_iops_queues }; in _base_alloc_irq_vectors()
3368 int nr_msix_vectors = ioc->iopoll_q_start_index; in _base_alloc_irq_vectors()
3371 if (ioc->smp_affinity_enable) in _base_alloc_irq_vectors()
3376 ioc_info(ioc, " %d %d %d\n", ioc->high_iops_queues, in _base_alloc_irq_vectors()
3377 ioc->reply_queue_count, nr_msix_vectors); in _base_alloc_irq_vectors()
3379 i = pci_alloc_irq_vectors_affinity(ioc->pdev, in _base_alloc_irq_vectors()
3380 ioc->high_iops_queues, in _base_alloc_irq_vectors()
3387 * _base_enable_msix - enables msix, failback to io_apic
3399 ioc->msix_load_balance = false; in _base_enable_msix()
3401 if (msix_disable == -1 || msix_disable == 0) in _base_enable_msix()
3410 ioc_info(ioc, "MSI-X vectors supported: %d\n", ioc->msix_vector_count); in _base_enable_msix()
3412 ioc->cpu_count, max_msix_vectors); in _base_enable_msix()
3414 ioc->reply_queue_count = in _base_enable_msix()
3415 min_t(int, ioc->cpu_count, ioc->msix_vector_count); in _base_enable_msix()
3417 if (!ioc->rdpq_array_enable && max_msix_vectors == -1) in _base_enable_msix()
3429 if (!ioc->combined_reply_queue && in _base_enable_msix()
3430 ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_enable_msix()
3433 ioc->msix_load_balance = true; in _base_enable_msix()
3440 if (ioc->msix_load_balance) in _base_enable_msix()
3441 ioc->smp_affinity_enable = 0; in _base_enable_msix()
3443 if (!ioc->smp_affinity_enable || ioc->reply_queue_count <= 1) in _base_enable_msix()
3444 ioc->shost->host_tagset = 0; in _base_enable_msix()
3449 if (ioc->shost->host_tagset) in _base_enable_msix()
3453 ioc->io_uring_poll_queues = kcalloc(iopoll_q_count, in _base_enable_msix()
3455 if (!ioc->io_uring_poll_queues) in _base_enable_msix()
3459 if (ioc->is_aero_ioc) in _base_enable_msix()
3461 ioc->msix_vector_count); in _base_enable_msix()
3467 ioc->reply_queue_count = min_t(int, in _base_enable_msix()
3468 ioc->reply_queue_count + ioc->high_iops_queues, in _base_enable_msix()
3469 ioc->msix_vector_count); in _base_enable_msix()
3476 ioc->reply_queue_count = min_t(int, local_max_msix_vectors, in _base_enable_msix()
3477 ioc->reply_queue_count); in _base_enable_msix()
3483 if (ioc->reply_queue_count < (iopoll_q_count + MPT3_MIN_IRQS)) in _base_enable_msix()
3485 ioc->reply_queue_count = min_t(int, in _base_enable_msix()
3486 ioc->reply_queue_count + iopoll_q_count, in _base_enable_msix()
3487 ioc->msix_vector_count); in _base_enable_msix()
3493 ioc->iopoll_q_start_index = in _base_enable_msix()
3494 ioc->reply_queue_count - iopoll_q_count; in _base_enable_msix()
3507 if (r < ioc->iopoll_q_start_index) { in _base_enable_msix()
3508 ioc->reply_queue_count = r + iopoll_q_count; in _base_enable_msix()
3509 ioc->iopoll_q_start_index = in _base_enable_msix()
3510 ioc->reply_queue_count - iopoll_q_count; in _base_enable_msix()
3513 ioc->msix_enable = 1; in _base_enable_msix()
3514 for (i = 0; i < ioc->reply_queue_count; i++) { in _base_enable_msix()
3524 ioc->high_iops_queues ? "enabled" : "disabled"); in _base_enable_msix()
3530 ioc->high_iops_queues = 0; in _base_enable_msix()
3532 ioc->reply_queue_count = 1; in _base_enable_msix()
3533 ioc->iopoll_q_start_index = ioc->reply_queue_count - 0; in _base_enable_msix()
3534 r = pci_alloc_irq_vectors(ioc->pdev, 1, 1, PCI_IRQ_INTX); in _base_enable_msix()
3546 * mpt3sas_base_unmap_resources - free controller resources
3552 struct pci_dev *pdev = ioc->pdev; in mpt3sas_base_unmap_resources()
3559 kfree(ioc->replyPostRegisterIndex); in mpt3sas_base_unmap_resources()
3560 ioc->replyPostRegisterIndex = NULL; in mpt3sas_base_unmap_resources()
3563 if (ioc->chip_phys) { in mpt3sas_base_unmap_resources()
3564 iounmap(ioc->chip); in mpt3sas_base_unmap_resources()
3565 ioc->chip_phys = 0; in mpt3sas_base_unmap_resources()
3569 pci_release_selected_regions(ioc->pdev, ioc->bars); in mpt3sas_base_unmap_resources()
3578 * mpt3sas_base_check_for_fault_and_issue_reset - check if IOC is in fault state
3582 * Return: 0 for success, non-zero for failure.
3588 int rc = -EFAULT; in mpt3sas_base_check_for_fault_and_issue_reset()
3591 if (ioc->pci_error_recovery) in mpt3sas_base_check_for_fault_and_issue_reset()
3614 * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
3617 * Return: 0 for success, non-zero for failure.
3622 struct pci_dev *pdev = ioc->pdev; in mpt3sas_base_map_resources()
3633 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); in mpt3sas_base_map_resources()
3636 ioc->bars = 0; in mpt3sas_base_map_resources()
3637 return -ENODEV; in mpt3sas_base_map_resources()
3641 if (pci_request_selected_regions(pdev, ioc->bars, in mpt3sas_base_map_resources()
3642 ioc->driver_name)) { in mpt3sas_base_map_resources()
3644 ioc->bars = 0; in mpt3sas_base_map_resources()
3645 r = -ENODEV; in mpt3sas_base_map_resources()
3654 r = -ENODEV; in mpt3sas_base_map_resources()
3668 ioc->chip_phys = pci_resource_start(pdev, i); in mpt3sas_base_map_resources()
3669 chip_phys = ioc->chip_phys; in mpt3sas_base_map_resources()
3671 ioc->chip = ioremap(ioc->chip_phys, memap_sz); in mpt3sas_base_map_resources()
3675 if (ioc->chip == NULL) { in mpt3sas_base_map_resources()
3678 r = -EINVAL; in mpt3sas_base_map_resources()
3691 if (!ioc->rdpq_array_enable_assigned) { in mpt3sas_base_map_resources()
3692 ioc->rdpq_array_enable = ioc->rdpq_array_capable; in mpt3sas_base_map_resources()
3693 ioc->rdpq_array_enable_assigned = 1; in mpt3sas_base_map_resources()
3700 iopoll_q_count = ioc->reply_queue_count - ioc->iopoll_q_start_index; in mpt3sas_base_map_resources()
3702 atomic_set(&ioc->io_uring_poll_queues[i].busy, 0); in mpt3sas_base_map_resources()
3703 atomic_set(&ioc->io_uring_poll_queues[i].pause, 0); in mpt3sas_base_map_resources()
3706 if (!ioc->is_driver_loading) in mpt3sas_base_map_resources()
3711 if (ioc->combined_reply_queue) { in mpt3sas_base_map_resources()
3718 ioc->replyPostRegisterIndex = kcalloc( in mpt3sas_base_map_resources()
3719 ioc->combined_reply_index_count, in mpt3sas_base_map_resources()
3721 if (!ioc->replyPostRegisterIndex) { in mpt3sas_base_map_resources()
3724 r = -ENOMEM; in mpt3sas_base_map_resources()
3728 for (i = 0; i < ioc->combined_reply_index_count; i++) { in mpt3sas_base_map_resources()
3729 ioc->replyPostRegisterIndex[i] = in mpt3sas_base_map_resources()
3731 ((u8 __force *)&ioc->chip->Doorbell + in mpt3sas_base_map_resources()
3737 if (ioc->is_warpdrive) { in mpt3sas_base_map_resources()
3738 ioc->reply_post_host_index[0] = (resource_size_t __iomem *) in mpt3sas_base_map_resources()
3739 &ioc->chip->ReplyPostHostIndex; in mpt3sas_base_map_resources()
3741 for (i = 1; i < ioc->cpu_msix_table_sz; i++) in mpt3sas_base_map_resources()
3742 ioc->reply_post_host_index[i] = in mpt3sas_base_map_resources()
3744 ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1) in mpt3sas_base_map_resources()
3748 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in mpt3sas_base_map_resources()
3749 if (reply_q->msix_index >= ioc->iopoll_q_start_index) { in mpt3sas_base_map_resources()
3751 reply_q->name, reply_q->msix_index); in mpt3sas_base_map_resources()
3756 reply_q->name, in mpt3sas_base_map_resources()
3757 ioc->msix_enable ? "PCI-MSI-X" : "IO-APIC", in mpt3sas_base_map_resources()
3758 pci_irq_vector(ioc->pdev, reply_q->msix_index)); in mpt3sas_base_map_resources()
3762 &chip_phys, ioc->chip, memap_sz); in mpt3sas_base_map_resources()
3776 * mpt3sas_base_get_msg_frame - obtain request mf pointer
3785 return (void *)(ioc->request + (smid * ioc->request_sz)); in mpt3sas_base_get_msg_frame()
3789 * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
3798 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); in mpt3sas_base_get_sense_buffer()
3802 * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
3811 return cpu_to_le32(ioc->sense_dma + ((smid - 1) * in mpt3sas_base_get_sense_buffer_dma()
3816 * mpt3sas_base_get_pcie_sgl - obtain a PCIe SGL virt addr
3825 return (void *)(ioc->pcie_sg_lookup[smid - 1].pcie_sgl); in mpt3sas_base_get_pcie_sgl()
3829 * mpt3sas_base_get_pcie_sgl_dma - obtain a PCIe SGL dma addr
3838 return ioc->pcie_sg_lookup[smid - 1].pcie_sgl_dma; in mpt3sas_base_get_pcie_sgl_dma()
3842 * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
3853 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); in mpt3sas_base_get_reply_virt_addr()
3857 * _base_get_msix_index - get the msix index
3870 if (ioc->msix_load_balance) in _base_get_msix_index()
3871 return ioc->reply_queue_count ? in _base_get_msix_index()
3873 &ioc->total_io_cnt), ioc->reply_queue_count) : 0; in _base_get_msix_index()
3875 if (scmd && ioc->shost->nr_hw_queues > 1) { in _base_get_msix_index()
3879 ioc->high_iops_queues; in _base_get_msix_index()
3882 return ioc->cpu_msix_table[raw_smp_processor_id()]; in _base_get_msix_index()
3886 * _base_get_high_iops_msix_index - get the msix index of
3905 if (scsi_device_busy(scmd->device) > MPT3SAS_DEVICE_HIGH_IOPS_DEPTH) in _base_get_high_iops_msix_index()
3907 atomic64_add_return(1, &ioc->high_iops_outstanding) / in _base_get_high_iops_msix_index()
3915 * mpt3sas_base_get_smid - obtain a free smid from internal queue
3928 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3929 if (list_empty(&ioc->internal_free_list)) { in mpt3sas_base_get_smid()
3930 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3935 request = list_entry(ioc->internal_free_list.next, in mpt3sas_base_get_smid()
3937 request->cb_idx = cb_idx; in mpt3sas_base_get_smid()
3938 smid = request->smid; in mpt3sas_base_get_smid()
3939 list_del(&request->tracker_list); in mpt3sas_base_get_smid()
3940 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3945 * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
3970 * tag = smid - 1; in mpt3sas_base_get_smid_scsiio()
3971 * unique_tag = ioc->io_queue_num[tag] << BLK_MQ_UNIQUE_TAG_BITS | tag; in mpt3sas_base_get_smid_scsiio()
3973 ioc->io_queue_num[tag] = blk_mq_unique_tag_to_hwq(unique_tag); in mpt3sas_base_get_smid_scsiio()
3976 request->cb_idx = cb_idx; in mpt3sas_base_get_smid_scsiio()
3977 request->smid = smid; in mpt3sas_base_get_smid_scsiio()
3978 request->scmd = scmd; in mpt3sas_base_get_smid_scsiio()
3979 INIT_LIST_HEAD(&request->chain_list); in mpt3sas_base_get_smid_scsiio()
3984 * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
3997 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
3998 if (list_empty(&ioc->hpr_free_list)) { in mpt3sas_base_get_smid_hpr()
3999 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
4003 request = list_entry(ioc->hpr_free_list.next, in mpt3sas_base_get_smid_hpr()
4005 request->cb_idx = cb_idx; in mpt3sas_base_get_smid_hpr()
4006 smid = request->smid; in mpt3sas_base_get_smid_hpr()
4007 list_del(&request->tracker_list); in mpt3sas_base_get_smid_hpr()
4008 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
4018 if (ioc->shost_recovery && ioc->pending_io_count) { in _base_recovery_check()
4019 ioc->pending_io_count = scsi_host_busy(ioc->shost); in _base_recovery_check()
4020 if (ioc->pending_io_count == 0) in _base_recovery_check()
4021 wake_up(&ioc->reset_wq); in _base_recovery_check()
4028 if (WARN_ON(st->smid == 0)) in mpt3sas_base_clear_st()
4030 st->cb_idx = 0xFF; in mpt3sas_base_clear_st()
4031 st->direct_io = 0; in mpt3sas_base_clear_st()
4032 st->scmd = NULL; in mpt3sas_base_clear_st()
4033 atomic_set(&ioc->chain_lookup[st->smid - 1].chain_offset, 0); in mpt3sas_base_clear_st()
4034 st->smid = 0; in mpt3sas_base_clear_st()
4038 * mpt3sas_base_free_smid - put smid back on free_list
4048 if (smid < ioc->hi_priority_smid) { in mpt3sas_base_free_smid()
4060 memset(request, 0, ioc->request_sz); in mpt3sas_base_free_smid()
4064 ioc->io_queue_num[smid - 1] = 0; in mpt3sas_base_free_smid()
4068 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_free_smid()
4069 if (smid < ioc->internal_smid) { in mpt3sas_base_free_smid()
4070 /* hi-priority */ in mpt3sas_base_free_smid()
4071 i = smid - ioc->hi_priority_smid; in mpt3sas_base_free_smid()
4072 ioc->hpr_lookup[i].cb_idx = 0xFF; in mpt3sas_base_free_smid()
4073 list_add(&ioc->hpr_lookup[i].tracker_list, &ioc->hpr_free_list); in mpt3sas_base_free_smid()
4074 } else if (smid <= ioc->hba_queue_depth) { in mpt3sas_base_free_smid()
4076 i = smid - ioc->internal_smid; in mpt3sas_base_free_smid()
4077 ioc->internal_lookup[i].cb_idx = 0xFF; in mpt3sas_base_free_smid()
4078 list_add(&ioc->internal_lookup[i].tracker_list, in mpt3sas_base_free_smid()
4079 &ioc->internal_free_list); in mpt3sas_base_free_smid()
4081 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_free_smid()
4085 * _base_mpi_ep_writeq - 32 bit write to MMIO
4107 * _base_writeq - 64 bit write to MMIO
4133 * _base_set_and_get_msix_index - get the msix index and assign to msix_io
4145 if (smid < ioc->hi_priority_smid) in _base_set_and_get_msix_index()
4151 st->msix_io = ioc->get_msix_index_for_smlio(ioc, st->scmd); in _base_set_and_get_msix_index()
4152 return st->msix_io; in _base_set_and_get_msix_index()
4156 * _base_put_smid_mpi_ep_scsi_io - send SCSI_IO request to firmware
4171 mpi_req_iomem = (void __force *)ioc->chip + in _base_put_smid_mpi_ep_scsi_io()
4172 MPI_FRAME_START_OFFSET + (smid * ioc->request_sz); in _base_put_smid_mpi_ep_scsi_io()
4174 ioc->request_sz); in _base_put_smid_mpi_ep_scsi_io()
4180 _base_mpi_ep_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_mpi_ep_scsi_io()
4181 &ioc->scsi_lookup_lock); in _base_put_smid_mpi_ep_scsi_io()
4185 * _base_put_smid_scsi_io - send SCSI_IO request to firmware
4202 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_scsi_io()
4203 &ioc->scsi_lookup_lock); in _base_put_smid_scsi_io()
4207 * _base_put_smid_fast_path - send fast path request to firmware
4225 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_fast_path()
4226 &ioc->scsi_lookup_lock); in _base_put_smid_fast_path()
4230 * _base_put_smid_hi_priority - send Task Management request to firmware
4243 if (ioc->is_mcpu_endpoint) { in _base_put_smid_hi_priority()
4247 mpi_req_iomem = (void __force *)ioc->chip in _base_put_smid_hi_priority()
4249 + (smid * ioc->request_sz); in _base_put_smid_hi_priority()
4251 ioc->request_sz); in _base_put_smid_hi_priority()
4262 if (ioc->is_mcpu_endpoint) in _base_put_smid_hi_priority()
4264 &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_hi_priority()
4265 &ioc->scsi_lookup_lock); in _base_put_smid_hi_priority()
4267 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_hi_priority()
4268 &ioc->scsi_lookup_lock); in _base_put_smid_hi_priority()
4272 * mpt3sas_base_put_smid_nvme_encap - send NVMe encapsulated request to
4289 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in mpt3sas_base_put_smid_nvme_encap()
4290 &ioc->scsi_lookup_lock); in mpt3sas_base_put_smid_nvme_encap()
4294 * _base_put_smid_default - Default, primarily used for config pages
4305 if (ioc->is_mcpu_endpoint) { in _base_put_smid_default()
4310 mpi_req_iomem = (void __force *)ioc->chip + in _base_put_smid_default()
4311 MPI_FRAME_START_OFFSET + (smid * ioc->request_sz); in _base_put_smid_default()
4313 ioc->request_sz); in _base_put_smid_default()
4321 if (ioc->is_mcpu_endpoint) in _base_put_smid_default()
4323 &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_default()
4324 &ioc->scsi_lookup_lock); in _base_put_smid_default()
4326 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_default()
4327 &ioc->scsi_lookup_lock); in _base_put_smid_default()
4331 * _base_put_smid_scsi_io_atomic - send SCSI_IO request to firmware using
4350 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_scsi_io_atomic()
4354 * _base_put_smid_fast_path_atomic - send fast path request to firmware
4372 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_fast_path_atomic()
4376 * _base_put_smid_hi_priority_atomic - send Task Management request to
4395 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_hi_priority_atomic()
4399 * _base_put_smid_default_atomic - Default, primarily used for config pages
4416 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_default_atomic()
4420 * _base_display_OEMs_branding - Display branding string
4426 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL) in _base_display_OEMs_branding()
4429 switch (ioc->pdev->subsystem_vendor) { in _base_display_OEMs_branding()
4431 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4433 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4448 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4453 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4484 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4489 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4509 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4515 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4520 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4522 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4553 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4558 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4565 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4571 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4576 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4578 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4593 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4598 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4609 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4615 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4620 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4622 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4629 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4634 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4653 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4659 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4669 * _base_display_fwpkg_version - sends FWUpload request to pull FWPkg
4673 * Return: 0 for success, non-zero for failure.
4691 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_display_fwpkg_version()
4693 return -EAGAIN; in _base_display_fwpkg_version()
4697 fwpkg_data = dma_alloc_coherent(&ioc->pdev->dev, data_length, in _base_display_fwpkg_version()
4703 return -ENOMEM; in _base_display_fwpkg_version()
4706 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_display_fwpkg_version()
4709 r = -EAGAIN; in _base_display_fwpkg_version()
4713 ioc->base_cmds.status = MPT3_CMD_PENDING; in _base_display_fwpkg_version()
4715 ioc->base_cmds.smid = smid; in _base_display_fwpkg_version()
4717 mpi_request->Function = MPI2_FUNCTION_FW_UPLOAD; in _base_display_fwpkg_version()
4718 mpi_request->ImageType = MPI2_FW_UPLOAD_ITYPE_FW_FLASH; in _base_display_fwpkg_version()
4719 mpi_request->ImageSize = cpu_to_le32(data_length); in _base_display_fwpkg_version()
4720 ioc->build_sg(ioc, &mpi_request->SGL, 0, 0, fwpkg_data_dma, in _base_display_fwpkg_version()
4722 init_completion(&ioc->base_cmds.done); in _base_display_fwpkg_version()
4723 ioc->put_smid_default(ioc, smid); in _base_display_fwpkg_version()
4725 wait_for_completion_timeout(&ioc->base_cmds.done, in _base_display_fwpkg_version()
4728 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in _base_display_fwpkg_version()
4735 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) { in _base_display_fwpkg_version()
4736 memcpy(&mpi_reply, ioc->base_cmds.reply, in _base_display_fwpkg_version()
4742 if (le32_to_cpu(fw_img_hdr->Signature) == in _base_display_fwpkg_version()
4749 cmp_img_hdr->ApplicationSpecific); in _base_display_fwpkg_version()
4753 fw_img_hdr->PackageVersion.Word); in _base_display_fwpkg_version()
4767 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in _base_display_fwpkg_version()
4770 dma_free_coherent(&ioc->pdev->dev, data_length, fwpkg_data, in _base_display_fwpkg_version()
4773 if (ioc->drv_internal_flags & MPT_DRV_INTERNAL_FIRST_PE_ISSUED) in _base_display_fwpkg_version()
4774 return -EFAULT; in _base_display_fwpkg_version()
4776 return -EFAULT; in _base_display_fwpkg_version()
4777 r = -EAGAIN; in _base_display_fwpkg_version()
4783 * _base_display_ioc_capabilities - Display IOC's capabilities.
4793 memtostr(desc, ioc->manu_pg0.ChipName); in _base_display_ioc_capabilities()
4796 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, in _base_display_ioc_capabilities()
4797 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, in _base_display_ioc_capabilities()
4798 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, in _base_display_ioc_capabilities()
4799 ioc->facts.FWVersion.Word & 0x000000FF, in _base_display_ioc_capabilities()
4800 ioc->pdev->revision); in _base_display_ioc_capabilities()
4804 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES) { in _base_display_ioc_capabilities()
4811 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { in _base_display_ioc_capabilities()
4816 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { in _base_display_ioc_capabilities()
4824 if (!ioc->hide_ir_msg) { in _base_display_ioc_capabilities()
4825 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4832 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { in _base_display_ioc_capabilities()
4837 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { in _base_display_ioc_capabilities()
4842 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4848 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { in _base_display_ioc_capabilities()
4853 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4859 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4865 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4871 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4877 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); in _base_display_ioc_capabilities()
4887 * mpt3sas_base_update_missing_delay - change the missing delay timers
4934 dmd = sas_iounit_pg1->ReportDeviceMissingDelay; in mpt3sas_base_update_missing_delay()
4947 sas_iounit_pg1->ReportDeviceMissingDelay = dmd; in mpt3sas_base_update_missing_delay()
4950 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay; in mpt3sas_base_update_missing_delay()
4951 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay; in mpt3sas_base_update_missing_delay()
4966 ioc->device_missing_delay = dmd_new; in mpt3sas_base_update_missing_delay()
4967 ioc->io_missing_delay = io_missing_delay; in mpt3sas_base_update_missing_delay()
4975 * _base_update_ioc_page1_inlinewith_perf_mode - Update IOC Page1 fields
4989 rc = mpt3sas_config_get_ioc_pg1(ioc, &mpi_reply, &ioc->ioc_pg1_copy); in _base_update_ioc_page1_inlinewith_perf_mode()
4992 memcpy(&ioc_pg1, &ioc->ioc_pg1_copy, sizeof(Mpi2IOCPage1_t)); in _base_update_ioc_page1_inlinewith_perf_mode()
4997 if (ioc->high_iops_queues) { in _base_update_ioc_page1_inlinewith_perf_mode()
5012 ((1 << MPT3SAS_HIGH_IOPS_REPLY_QUEUES/8) - 1)); in _base_update_ioc_page1_inlinewith_perf_mode()
5051 * _base_get_event_diag_triggers - get event diag trigger values from
5086 ioc->diag_trigger_event.ValidEntries = count; in _base_get_event_diag_triggers()
5088 event_tg = &ioc->diag_trigger_event.EventTriggerEntry[0]; in _base_get_event_diag_triggers()
5091 event_tg->EventValue = le16_to_cpu( in _base_get_event_diag_triggers()
5092 mpi_event_tg->MPIEventCode); in _base_get_event_diag_triggers()
5093 event_tg->LogEntryQualifier = le16_to_cpu( in _base_get_event_diag_triggers()
5094 mpi_event_tg->MPIEventCodeSpecific); in _base_get_event_diag_triggers()
5103 * _base_get_scsi_diag_triggers - get scsi diag trigger values from
5138 ioc->diag_trigger_scsi.ValidEntries = count; in _base_get_scsi_diag_triggers()
5140 scsi_tg = &ioc->diag_trigger_scsi.SCSITriggerEntry[0]; in _base_get_scsi_diag_triggers()
5143 scsi_tg->ASCQ = mpi_scsi_tg->ASCQ; in _base_get_scsi_diag_triggers()
5144 scsi_tg->ASC = mpi_scsi_tg->ASC; in _base_get_scsi_diag_triggers()
5145 scsi_tg->SenseKey = mpi_scsi_tg->SenseKey; in _base_get_scsi_diag_triggers()
5155 * _base_get_mpi_diag_triggers - get mpi diag trigger values from
5190 ioc->diag_trigger_mpi.ValidEntries = count; in _base_get_mpi_diag_triggers()
5192 status_tg = &ioc->diag_trigger_mpi.MPITriggerEntry[0]; in _base_get_mpi_diag_triggers()
5196 status_tg->IOCStatus = le16_to_cpu( in _base_get_mpi_diag_triggers()
5197 mpi_status_tg->IOCStatus); in _base_get_mpi_diag_triggers()
5198 status_tg->IocLogInfo = le32_to_cpu( in _base_get_mpi_diag_triggers()
5199 mpi_status_tg->LogInfo); in _base_get_mpi_diag_triggers()
5209 * _base_get_master_diag_triggers - get master diag trigger values from
5239 ioc->diag_trigger_master.MasterData |= in _base_get_master_diag_triggers()
5246 * _base_check_for_trigger_pages_support - checks whether HBA FW supports
5252 * otherwise returns %-EFAULT if driver trigger pages are not supported by FW or
5273 return -EFAULT; in _base_check_for_trigger_pages_support()
5280 * _base_get_diag_triggers - Retrieve diag trigger values from
5296 ioc->diag_trigger_master.MasterData = in _base_get_diag_triggers()
5301 if (r == -EAGAIN) in _base_get_diag_triggers()
5310 ioc->supports_trigger_pages = 1; in _base_get_diag_triggers()
5358 * _base_update_diag_trigger_pages - Update the driver trigger pages after
5369 if (ioc->diag_trigger_master.MasterData) in _base_update_diag_trigger_pages()
5371 &ioc->diag_trigger_master, 1); in _base_update_diag_trigger_pages()
5373 if (ioc->diag_trigger_event.ValidEntries) in _base_update_diag_trigger_pages()
5375 &ioc->diag_trigger_event, 1); in _base_update_diag_trigger_pages()
5377 if (ioc->diag_trigger_scsi.ValidEntries) in _base_update_diag_trigger_pages()
5379 &ioc->diag_trigger_scsi, 1); in _base_update_diag_trigger_pages()
5381 if (ioc->diag_trigger_mpi.ValidEntries) in _base_update_diag_trigger_pages()
5383 &ioc->diag_trigger_mpi, 1); in _base_update_diag_trigger_pages()
5387 * _base_assign_fw_reported_qd - Get FW reported QD for SAS/SATA devices.
5388 * - On failure set default QD values.
5391 * Returns 0 for success, non-zero for failure.
5402 ioc->max_wideport_qd = MPT3SAS_SAS_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5403 ioc->max_narrowport_qd = MPT3SAS_SAS_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5404 ioc->max_sata_qd = MPT3SAS_SATA_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5405 ioc->max_nvme_qd = MPT3SAS_NVME_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5406 if (!ioc->is_gen35_ioc) in _base_assign_fw_reported_qd()
5413 ioc->name, __FILE__, __LINE__, __func__); in _base_assign_fw_reported_qd()
5418 ioc->max_wideport_qd = (depth ? depth : MPT3SAS_SAS_QUEUE_DEPTH); in _base_assign_fw_reported_qd()
5421 ioc->max_narrowport_qd = (depth ? depth : MPT3SAS_SAS_QUEUE_DEPTH); in _base_assign_fw_reported_qd()
5424 ioc->max_sata_qd = (depth ? depth : MPT3SAS_SATA_QUEUE_DEPTH); in _base_assign_fw_reported_qd()
5431 ioc->name, __FILE__, __LINE__, __func__); in _base_assign_fw_reported_qd()
5434 ioc->max_nvme_qd = (le16_to_cpu(pcie_iounit_pg1.NVMeMaxQueueDepth)) ? in _base_assign_fw_reported_qd()
5440 ioc->max_wideport_qd, ioc->max_narrowport_qd, in _base_assign_fw_reported_qd()
5441 ioc->max_sata_qd, ioc->max_nvme_qd)); in _base_assign_fw_reported_qd()
5446 * mpt3sas_atto_validate_nvram - validate the ATTO nvram read from mfg pg1
5450 * Return: 0 for success, non-zero for failure.
5456 int r = -EINVAL; in mpt3sas_atto_validate_nvram()
5467 while (len--) in mpt3sas_atto_validate_nvram()
5475 s1 = (union ATTO_SAS_ADDRESS *) n->SasAddr; in mpt3sas_atto_validate_nvram()
5477 if (n->Signature[0] != 'E' in mpt3sas_atto_validate_nvram()
5478 || n->Signature[1] != 'S' in mpt3sas_atto_validate_nvram()
5479 || n->Signature[2] != 'A' in mpt3sas_atto_validate_nvram()
5480 || n->Signature[3] != 'S') in mpt3sas_atto_validate_nvram()
5482 else if (n->Version > ATTO_SASNVR_VERSION) in mpt3sas_atto_validate_nvram()
5484 else if ((n->SasAddr[7] & (ATTO_SAS_ADDR_ALIGN - 1)) in mpt3sas_atto_validate_nvram()
5485 || s1->b[0] != 0x50 in mpt3sas_atto_validate_nvram()
5486 || s1->b[1] != 0x01 in mpt3sas_atto_validate_nvram()
5487 || s1->b[2] != 0x08 in mpt3sas_atto_validate_nvram()
5488 || (s1->b[3] & 0xF0) != 0x60 in mpt3sas_atto_validate_nvram()
5489 || ((s1->b[3] & 0x0F) | le32_to_cpu(s1->d[1])) == 0) { in mpt3sas_atto_validate_nvram()
5497 * mpt3sas_atto_get_sas_addr - get the ATTO SAS address from mfg page 1
5501 * Return: 0 for success, non-zero for failure.
5524 addr = *((__be64 *) nvram->SasAddr); in mpt3sas_atto_get_sas_addr()
5525 sas_addr->q = cpu_to_le64(be64_to_cpu(addr)); in mpt3sas_atto_get_sas_addr()
5530 * mpt3sas_atto_init - perform initializaion for ATTO branded
5534 * Return: 0 for success, non-zero for failure.
5563 return -ENOMEM; in mpt3sas_atto_init()
5577 for (ix = 0; ix < bios_pg4->NumPhys; ix++) { in mpt3sas_atto_init()
5580 bios_pg4->Phy[ix].ReassignmentWWID = temp.q; in mpt3sas_atto_init()
5581 bios_pg4->Phy[ix].ReassignmentDeviceName = bias.q; in mpt3sas_atto_init()
5591 * _base_static_config_pages - static start of day config pages
5602 ioc->nvme_abort_timeout = 30; in _base_static_config_pages()
5605 &ioc->manu_pg0); in _base_static_config_pages()
5608 if (ioc->ir_firmware) { in _base_static_config_pages()
5610 &ioc->manu_pg10); in _base_static_config_pages()
5615 if (ioc->pdev->vendor == MPI2_MFGPAGE_VENDORID_ATTO) { in _base_static_config_pages()
5626 &ioc->manu_pg11); in _base_static_config_pages()
5629 if (!ioc->is_gen35_ioc && ioc->manu_pg11.EEDPTagMode == 0) { in _base_static_config_pages()
5631 ioc->name); in _base_static_config_pages()
5632 ioc->manu_pg11.EEDPTagMode &= ~0x3; in _base_static_config_pages()
5633 ioc->manu_pg11.EEDPTagMode |= 0x1; in _base_static_config_pages()
5635 &ioc->manu_pg11); in _base_static_config_pages()
5637 if (ioc->manu_pg11.AddlFlags2 & NVME_TASK_MNGT_CUSTOM_MASK) in _base_static_config_pages()
5638 ioc->tm_custom_handling = 1; in _base_static_config_pages()
5640 ioc->tm_custom_handling = 0; in _base_static_config_pages()
5641 if (ioc->manu_pg11.NVMeAbortTO < NVME_TASK_ABORT_MIN_TIMEOUT) in _base_static_config_pages()
5642 ioc->nvme_abort_timeout = NVME_TASK_ABORT_MIN_TIMEOUT; in _base_static_config_pages()
5643 else if (ioc->manu_pg11.NVMeAbortTO > in _base_static_config_pages()
5645 ioc->nvme_abort_timeout = NVME_TASK_ABORT_MAX_TIMEOUT; in _base_static_config_pages()
5647 ioc->nvme_abort_timeout = ioc->manu_pg11.NVMeAbortTO; in _base_static_config_pages()
5649 ioc->time_sync_interval = in _base_static_config_pages()
5650 ioc->manu_pg11.TimeSyncInterval & MPT3SAS_TIMESYNC_MASK; in _base_static_config_pages()
5651 if (ioc->time_sync_interval) { in _base_static_config_pages()
5652 if (ioc->manu_pg11.TimeSyncInterval & MPT3SAS_TIMESYNC_UNIT_MASK) in _base_static_config_pages()
5653 ioc->time_sync_interval = in _base_static_config_pages()
5654 ioc->time_sync_interval * SECONDS_PER_HOUR; in _base_static_config_pages()
5656 ioc->time_sync_interval = in _base_static_config_pages()
5657 ioc->time_sync_interval * SECONDS_PER_MIN; in _base_static_config_pages()
5659 "Driver-FW TimeSync interval is %d seconds. ManuPg11 TimeSync Unit is in %s\n", in _base_static_config_pages()
5660 ioc->time_sync_interval, (ioc->manu_pg11.TimeSyncInterval & in _base_static_config_pages()
5663 if (ioc->is_gen35_ioc) in _base_static_config_pages()
5665 "TimeSync Interval in Manuf page-11 is not enabled. Periodic Time-Sync will be disabled\n"); in _base_static_config_pages()
5674 if (ioc->pdev->vendor == MPI2_MFGPAGE_VENDORID_ATTO) in _base_static_config_pages()
5675 ioc->bios_pg3.BiosVersion = 0; in _base_static_config_pages()
5677 rc = mpt3sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); in _base_static_config_pages()
5680 rc = mpt3sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); in _base_static_config_pages()
5685 rc = mpt3sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); in _base_static_config_pages()
5688 rc = mpt3sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); in _base_static_config_pages()
5691 rc = mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); in _base_static_config_pages()
5703 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); in _base_static_config_pages()
5704 if ((ioc->facts.IOCCapabilities & in _base_static_config_pages()
5711 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); in _base_static_config_pages()
5712 rc = mpt3sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); in _base_static_config_pages()
5717 ioc->temp_sensors_count = iounit_pg8.NumSensors; in _base_static_config_pages()
5718 if (ioc->is_aero_ioc) { in _base_static_config_pages()
5723 if (ioc->is_gen35_ioc) { in _base_static_config_pages()
5724 if (ioc->is_driver_loading) { in _base_static_config_pages()
5733 * - If previous FW has not supported driver trigger in _base_static_config_pages()
5736 * - If previous FW has supported driver trigger pages in _base_static_config_pages()
5741 if (!ioc->supports_trigger_pages && tg_flags != -EFAULT) in _base_static_config_pages()
5743 else if (ioc->supports_trigger_pages && in _base_static_config_pages()
5744 tg_flags == -EFAULT) in _base_static_config_pages()
5745 ioc->supports_trigger_pages = 0; in _base_static_config_pages()
5752 * mpt3sas_free_enclosure_list - release memory
5764 enclosure_dev_next, &ioc->enclosure_list, list) { in mpt3sas_free_enclosure_list()
5765 list_del(&enclosure_dev->list); in mpt3sas_free_enclosure_list()
5771 * _base_release_memory_pools - release memory
5783 int count = ioc->rdpq_array_enable ? ioc->reply_queue_count : 1; in _base_release_memory_pools()
5787 if (ioc->request) { in _base_release_memory_pools()
5788 dma_free_coherent(&ioc->pdev->dev, ioc->request_dma_sz, in _base_release_memory_pools()
5789 ioc->request, ioc->request_dma); in _base_release_memory_pools()
5792 ioc->request)); in _base_release_memory_pools()
5793 ioc->request = NULL; in _base_release_memory_pools()
5796 if (ioc->sense) { in _base_release_memory_pools()
5797 dma_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); in _base_release_memory_pools()
5798 dma_pool_destroy(ioc->sense_dma_pool); in _base_release_memory_pools()
5801 ioc->sense)); in _base_release_memory_pools()
5802 ioc->sense = NULL; in _base_release_memory_pools()
5805 if (ioc->reply) { in _base_release_memory_pools()
5806 dma_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); in _base_release_memory_pools()
5807 dma_pool_destroy(ioc->reply_dma_pool); in _base_release_memory_pools()
5810 ioc->reply)); in _base_release_memory_pools()
5811 ioc->reply = NULL; in _base_release_memory_pools()
5814 if (ioc->reply_free) { in _base_release_memory_pools()
5815 dma_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, in _base_release_memory_pools()
5816 ioc->reply_free_dma); in _base_release_memory_pools()
5817 dma_pool_destroy(ioc->reply_free_dma_pool); in _base_release_memory_pools()
5820 ioc->reply_free)); in _base_release_memory_pools()
5821 ioc->reply_free = NULL; in _base_release_memory_pools()
5824 if (ioc->reply_post) { in _base_release_memory_pools()
5830 if (ioc->reply_post[i].reply_post_free) { in _base_release_memory_pools()
5832 ioc->reply_post_free_dma_pool, in _base_release_memory_pools()
5833 ioc->reply_post[i].reply_post_free, in _base_release_memory_pools()
5834 ioc->reply_post[i].reply_post_free_dma); in _base_release_memory_pools()
5837 ioc->reply_post[i].reply_post_free)); in _base_release_memory_pools()
5838 ioc->reply_post[i].reply_post_free = in _base_release_memory_pools()
5841 --dma_alloc_count; in _base_release_memory_pools()
5844 dma_pool_destroy(ioc->reply_post_free_dma_pool); in _base_release_memory_pools()
5845 if (ioc->reply_post_free_array && in _base_release_memory_pools()
5846 ioc->rdpq_array_enable) { in _base_release_memory_pools()
5847 dma_pool_free(ioc->reply_post_free_array_dma_pool, in _base_release_memory_pools()
5848 ioc->reply_post_free_array, in _base_release_memory_pools()
5849 ioc->reply_post_free_array_dma); in _base_release_memory_pools()
5850 ioc->reply_post_free_array = NULL; in _base_release_memory_pools()
5852 dma_pool_destroy(ioc->reply_post_free_array_dma_pool); in _base_release_memory_pools()
5853 kfree(ioc->reply_post); in _base_release_memory_pools()
5856 if (ioc->pcie_sgl_dma_pool) { in _base_release_memory_pools()
5857 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_release_memory_pools()
5858 dma_pool_free(ioc->pcie_sgl_dma_pool, in _base_release_memory_pools()
5859 ioc->pcie_sg_lookup[i].pcie_sgl, in _base_release_memory_pools()
5860 ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_release_memory_pools()
5861 ioc->pcie_sg_lookup[i].pcie_sgl = NULL; in _base_release_memory_pools()
5863 dma_pool_destroy(ioc->pcie_sgl_dma_pool); in _base_release_memory_pools()
5865 kfree(ioc->pcie_sg_lookup); in _base_release_memory_pools()
5866 ioc->pcie_sg_lookup = NULL; in _base_release_memory_pools()
5868 if (ioc->config_page) { in _base_release_memory_pools()
5871 ioc->config_page)); in _base_release_memory_pools()
5872 dma_free_coherent(&ioc->pdev->dev, ioc->config_page_sz, in _base_release_memory_pools()
5873 ioc->config_page, ioc->config_page_dma); in _base_release_memory_pools()
5876 kfree(ioc->hpr_lookup); in _base_release_memory_pools()
5877 ioc->hpr_lookup = NULL; in _base_release_memory_pools()
5878 kfree(ioc->internal_lookup); in _base_release_memory_pools()
5879 ioc->internal_lookup = NULL; in _base_release_memory_pools()
5880 if (ioc->chain_lookup) { in _base_release_memory_pools()
5881 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_release_memory_pools()
5882 for (j = ioc->chains_per_prp_buffer; in _base_release_memory_pools()
5883 j < ioc->chains_needed_per_io; j++) { in _base_release_memory_pools()
5884 ct = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_release_memory_pools()
5885 if (ct && ct->chain_buffer) in _base_release_memory_pools()
5886 dma_pool_free(ioc->chain_dma_pool, in _base_release_memory_pools()
5887 ct->chain_buffer, in _base_release_memory_pools()
5888 ct->chain_buffer_dma); in _base_release_memory_pools()
5890 kfree(ioc->chain_lookup[i].chains_per_smid); in _base_release_memory_pools()
5892 dma_pool_destroy(ioc->chain_dma_pool); in _base_release_memory_pools()
5893 kfree(ioc->chain_lookup); in _base_release_memory_pools()
5894 ioc->chain_lookup = NULL; in _base_release_memory_pools()
5897 kfree(ioc->io_queue_num); in _base_release_memory_pools()
5898 ioc->io_queue_num = NULL; in _base_release_memory_pools()
5902 * mpt3sas_check_same_4gb_region - checks whether all reply queues in a set are
5915 end_address = start_address + pool_sz - 1; in mpt3sas_check_same_4gb_region()
5924 * _base_reduce_hba_queue_depth- Retry with reduced queue depth
5927 * Return: 0 for success, non-zero for failure.
5934 if ((ioc->hba_queue_depth - reduce_sz) > in _base_reduce_hba_queue_depth()
5935 (ioc->internal_depth + INTERNAL_SCSIIO_CMDS_COUNT)) { in _base_reduce_hba_queue_depth()
5936 ioc->hba_queue_depth -= reduce_sz; in _base_reduce_hba_queue_depth()
5939 return -ENOMEM; in _base_reduce_hba_queue_depth()
5943 * _base_allocate_pcie_sgl_pool - Allocating DMA'able memory
5948 * Return: 0 for success, non-zero for failure.
5957 ioc->pcie_sgl_dma_pool = in _base_allocate_pcie_sgl_pool()
5958 dma_pool_create("PCIe SGL pool", &ioc->pdev->dev, sz, in _base_allocate_pcie_sgl_pool()
5959 ioc->page_size, 0); in _base_allocate_pcie_sgl_pool()
5960 if (!ioc->pcie_sgl_dma_pool) { in _base_allocate_pcie_sgl_pool()
5962 return -ENOMEM; in _base_allocate_pcie_sgl_pool()
5965 ioc->chains_per_prp_buffer = sz/ioc->chain_segment_sz; in _base_allocate_pcie_sgl_pool()
5966 ioc->chains_per_prp_buffer = in _base_allocate_pcie_sgl_pool()
5967 min(ioc->chains_per_prp_buffer, ioc->chains_needed_per_io); in _base_allocate_pcie_sgl_pool()
5968 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_pcie_sgl_pool()
5969 ioc->pcie_sg_lookup[i].pcie_sgl = in _base_allocate_pcie_sgl_pool()
5970 dma_pool_alloc(ioc->pcie_sgl_dma_pool, GFP_KERNEL, in _base_allocate_pcie_sgl_pool()
5971 &ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_allocate_pcie_sgl_pool()
5972 if (!ioc->pcie_sg_lookup[i].pcie_sgl) { in _base_allocate_pcie_sgl_pool()
5974 return -EAGAIN; in _base_allocate_pcie_sgl_pool()
5978 ioc->pcie_sg_lookup[i].pcie_sgl_dma, sz)) { in _base_allocate_pcie_sgl_pool()
5980 ioc->pcie_sg_lookup[i].pcie_sgl, in _base_allocate_pcie_sgl_pool()
5982 ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_allocate_pcie_sgl_pool()
5983 ioc->use_32bit_dma = true; in _base_allocate_pcie_sgl_pool()
5984 return -EAGAIN; in _base_allocate_pcie_sgl_pool()
5987 for (j = 0; j < ioc->chains_per_prp_buffer; j++) { in _base_allocate_pcie_sgl_pool()
5988 ct = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_allocate_pcie_sgl_pool()
5989 ct->chain_buffer = in _base_allocate_pcie_sgl_pool()
5990 ioc->pcie_sg_lookup[i].pcie_sgl + in _base_allocate_pcie_sgl_pool()
5991 (j * ioc->chain_segment_sz); in _base_allocate_pcie_sgl_pool()
5992 ct->chain_buffer_dma = in _base_allocate_pcie_sgl_pool()
5993 ioc->pcie_sg_lookup[i].pcie_sgl_dma + in _base_allocate_pcie_sgl_pool()
5994 (j * ioc->chain_segment_sz); in _base_allocate_pcie_sgl_pool()
5999 ioc->scsiio_depth, sz, (sz * ioc->scsiio_depth)/1024)); in _base_allocate_pcie_sgl_pool()
6002 ioc->chains_per_prp_buffer)); in _base_allocate_pcie_sgl_pool()
6007 * _base_allocate_chain_dma_pool - Allocating DMA'able memory
6012 * Return: 0 for success, non-zero for failure.
6020 ioc->chain_dma_pool = dma_pool_create("chain pool", &ioc->pdev->dev, in _base_allocate_chain_dma_pool()
6021 ioc->chain_segment_sz, 16, 0); in _base_allocate_chain_dma_pool()
6022 if (!ioc->chain_dma_pool) in _base_allocate_chain_dma_pool()
6023 return -ENOMEM; in _base_allocate_chain_dma_pool()
6025 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_chain_dma_pool()
6026 for (j = ioc->chains_per_prp_buffer; in _base_allocate_chain_dma_pool()
6027 j < ioc->chains_needed_per_io; j++) { in _base_allocate_chain_dma_pool()
6028 ctr = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_allocate_chain_dma_pool()
6029 ctr->chain_buffer = dma_pool_alloc(ioc->chain_dma_pool, in _base_allocate_chain_dma_pool()
6030 GFP_KERNEL, &ctr->chain_buffer_dma); in _base_allocate_chain_dma_pool()
6031 if (!ctr->chain_buffer) in _base_allocate_chain_dma_pool()
6032 return -EAGAIN; in _base_allocate_chain_dma_pool()
6034 ctr->chain_buffer_dma, ioc->chain_segment_sz)) { in _base_allocate_chain_dma_pool()
6037 ctr->chain_buffer, in _base_allocate_chain_dma_pool()
6038 (unsigned long long)ctr->chain_buffer_dma); in _base_allocate_chain_dma_pool()
6039 ioc->use_32bit_dma = true; in _base_allocate_chain_dma_pool()
6040 return -EAGAIN; in _base_allocate_chain_dma_pool()
6046 ioc->scsiio_depth, ioc->chain_segment_sz, ((ioc->scsiio_depth * in _base_allocate_chain_dma_pool()
6047 (ioc->chains_needed_per_io - ioc->chains_per_prp_buffer) * in _base_allocate_chain_dma_pool()
6048 ioc->chain_segment_sz))/1024)); in _base_allocate_chain_dma_pool()
6053 * _base_allocate_sense_dma_pool - Allocating DMA'able memory
6057 * Return: 0 for success, non-zero for failure.
6062 ioc->sense_dma_pool = in _base_allocate_sense_dma_pool()
6063 dma_pool_create("sense pool", &ioc->pdev->dev, sz, 4, 0); in _base_allocate_sense_dma_pool()
6064 if (!ioc->sense_dma_pool) in _base_allocate_sense_dma_pool()
6065 return -ENOMEM; in _base_allocate_sense_dma_pool()
6066 ioc->sense = dma_pool_alloc(ioc->sense_dma_pool, in _base_allocate_sense_dma_pool()
6067 GFP_KERNEL, &ioc->sense_dma); in _base_allocate_sense_dma_pool()
6068 if (!ioc->sense) in _base_allocate_sense_dma_pool()
6069 return -EAGAIN; in _base_allocate_sense_dma_pool()
6070 if (!mpt3sas_check_same_4gb_region(ioc->sense_dma, sz)) { in _base_allocate_sense_dma_pool()
6073 ioc->sense, (unsigned long long) ioc->sense_dma)); in _base_allocate_sense_dma_pool()
6074 ioc->use_32bit_dma = true; in _base_allocate_sense_dma_pool()
6075 return -EAGAIN; in _base_allocate_sense_dma_pool()
6078 "sense pool(0x%p) - dma(0x%llx): depth(%d), element_size(%d), pool_size (%d kB)\n", in _base_allocate_sense_dma_pool()
6079 ioc->sense, (unsigned long long)ioc->sense_dma, in _base_allocate_sense_dma_pool()
6080 ioc->scsiio_depth, SCSI_SENSE_BUFFERSIZE, sz/1024); in _base_allocate_sense_dma_pool()
6085 * _base_allocate_reply_pool - Allocating DMA'able memory
6089 * Return: 0 for success, non-zero for failure.
6095 ioc->reply_dma_pool = dma_pool_create("reply pool", in _base_allocate_reply_pool()
6096 &ioc->pdev->dev, sz, 4, 0); in _base_allocate_reply_pool()
6097 if (!ioc->reply_dma_pool) in _base_allocate_reply_pool()
6098 return -ENOMEM; in _base_allocate_reply_pool()
6099 ioc->reply = dma_pool_alloc(ioc->reply_dma_pool, GFP_KERNEL, in _base_allocate_reply_pool()
6100 &ioc->reply_dma); in _base_allocate_reply_pool()
6101 if (!ioc->reply) in _base_allocate_reply_pool()
6102 return -EAGAIN; in _base_allocate_reply_pool()
6103 if (!mpt3sas_check_same_4gb_region(ioc->reply_dma, sz)) { in _base_allocate_reply_pool()
6106 ioc->reply, (unsigned long long) ioc->reply_dma)); in _base_allocate_reply_pool()
6107 ioc->use_32bit_dma = true; in _base_allocate_reply_pool()
6108 return -EAGAIN; in _base_allocate_reply_pool()
6110 ioc->reply_dma_min_address = (u32)(ioc->reply_dma); in _base_allocate_reply_pool()
6111 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz; in _base_allocate_reply_pool()
6113 "reply pool(0x%p) - dma(0x%llx): depth(%d), frame_size(%d), pool_size(%d kB)\n", in _base_allocate_reply_pool()
6114 ioc->reply, (unsigned long long)ioc->reply_dma, in _base_allocate_reply_pool()
6115 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024); in _base_allocate_reply_pool()
6120 * _base_allocate_reply_free_dma_pool - Allocating DMA'able memory
6124 * Return: 0 for success, non-zero for failure.
6130 ioc->reply_free_dma_pool = dma_pool_create( in _base_allocate_reply_free_dma_pool()
6131 "reply_free pool", &ioc->pdev->dev, sz, 16, 0); in _base_allocate_reply_free_dma_pool()
6132 if (!ioc->reply_free_dma_pool) in _base_allocate_reply_free_dma_pool()
6133 return -ENOMEM; in _base_allocate_reply_free_dma_pool()
6134 ioc->reply_free = dma_pool_alloc(ioc->reply_free_dma_pool, in _base_allocate_reply_free_dma_pool()
6135 GFP_KERNEL, &ioc->reply_free_dma); in _base_allocate_reply_free_dma_pool()
6136 if (!ioc->reply_free) in _base_allocate_reply_free_dma_pool()
6137 return -EAGAIN; in _base_allocate_reply_free_dma_pool()
6138 if (!mpt3sas_check_same_4gb_region(ioc->reply_free_dma, sz)) { in _base_allocate_reply_free_dma_pool()
6141 ioc->reply_free, (unsigned long long) ioc->reply_free_dma)); in _base_allocate_reply_free_dma_pool()
6142 ioc->use_32bit_dma = true; in _base_allocate_reply_free_dma_pool()
6143 return -EAGAIN; in _base_allocate_reply_free_dma_pool()
6145 memset(ioc->reply_free, 0, sz); in _base_allocate_reply_free_dma_pool()
6148 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); in _base_allocate_reply_free_dma_pool()
6151 (unsigned long long)ioc->reply_free_dma)); in _base_allocate_reply_free_dma_pool()
6156 * _base_allocate_reply_post_free_array - Allocating DMA'able memory
6160 * Return: 0 for success, non-zero for failure.
6167 ioc->reply_post_free_array_dma_pool = in _base_allocate_reply_post_free_array()
6169 &ioc->pdev->dev, reply_post_free_array_sz, 16, 0); in _base_allocate_reply_post_free_array()
6170 if (!ioc->reply_post_free_array_dma_pool) in _base_allocate_reply_post_free_array()
6171 return -ENOMEM; in _base_allocate_reply_post_free_array()
6172 ioc->reply_post_free_array = in _base_allocate_reply_post_free_array()
6173 dma_pool_alloc(ioc->reply_post_free_array_dma_pool, in _base_allocate_reply_post_free_array()
6174 GFP_KERNEL, &ioc->reply_post_free_array_dma); in _base_allocate_reply_post_free_array()
6175 if (!ioc->reply_post_free_array) in _base_allocate_reply_post_free_array()
6176 return -EAGAIN; in _base_allocate_reply_post_free_array()
6177 if (!mpt3sas_check_same_4gb_region(ioc->reply_post_free_array_dma, in _base_allocate_reply_post_free_array()
6181 ioc->reply_free, in _base_allocate_reply_post_free_array()
6182 (unsigned long long) ioc->reply_free_dma)); in _base_allocate_reply_post_free_array()
6183 ioc->use_32bit_dma = true; in _base_allocate_reply_post_free_array()
6184 return -EAGAIN; in _base_allocate_reply_post_free_array()
6189 * base_alloc_rdpq_dma_pool - Allocating DMA'able memory
6193 * Return: 0 for success, non-zero for failure.
6200 int reply_post_free_sz = ioc->reply_post_queue_depth * in base_alloc_rdpq_dma_pool()
6202 int count = ioc->rdpq_array_enable ? ioc->reply_queue_count : 1; in base_alloc_rdpq_dma_pool()
6204 ioc->reply_post = kcalloc(count, sizeof(struct reply_post_struct), in base_alloc_rdpq_dma_pool()
6206 if (!ioc->reply_post) in base_alloc_rdpq_dma_pool()
6207 return -ENOMEM; in base_alloc_rdpq_dma_pool()
6209 * For INVADER_SERIES each set of 8 reply queues(0-7, 8-15, ..) and in base_alloc_rdpq_dma_pool()
6210 * VENTURA_SERIES each set of 16 reply queues(0-15, 16-31, ..) should in base_alloc_rdpq_dma_pool()
6212 * upper 32-bits in their memory address. so here driver is allocating in base_alloc_rdpq_dma_pool()
6219 ioc->reply_post_free_dma_pool = in base_alloc_rdpq_dma_pool()
6221 &ioc->pdev->dev, sz, 16, 0); in base_alloc_rdpq_dma_pool()
6222 if (!ioc->reply_post_free_dma_pool) in base_alloc_rdpq_dma_pool()
6223 return -ENOMEM; in base_alloc_rdpq_dma_pool()
6226 ioc->reply_post[i].reply_post_free = in base_alloc_rdpq_dma_pool()
6227 dma_pool_zalloc(ioc->reply_post_free_dma_pool, in base_alloc_rdpq_dma_pool()
6229 &ioc->reply_post[i].reply_post_free_dma); in base_alloc_rdpq_dma_pool()
6230 if (!ioc->reply_post[i].reply_post_free) in base_alloc_rdpq_dma_pool()
6231 return -ENOMEM; in base_alloc_rdpq_dma_pool()
6242 ioc->reply_post[i].reply_post_free_dma, sz)) { in base_alloc_rdpq_dma_pool()
6246 ioc->reply_post[i].reply_post_free, in base_alloc_rdpq_dma_pool()
6248 ioc->reply_post[i].reply_post_free_dma)); in base_alloc_rdpq_dma_pool()
6249 return -EAGAIN; in base_alloc_rdpq_dma_pool()
6251 dma_alloc_count--; in base_alloc_rdpq_dma_pool()
6254 ioc->reply_post[i].reply_post_free = in base_alloc_rdpq_dma_pool()
6256 ((long)ioc->reply_post[i-1].reply_post_free in base_alloc_rdpq_dma_pool()
6258 ioc->reply_post[i].reply_post_free_dma = in base_alloc_rdpq_dma_pool()
6260 (ioc->reply_post[i-1].reply_post_free_dma + in base_alloc_rdpq_dma_pool()
6268 * _base_allocate_memory_pools - allocate start of day memory pools
6292 facts = &ioc->facts; in _base_allocate_memory_pools()
6295 if (max_sgl_entries != -1) in _base_allocate_memory_pools()
6298 if (ioc->hba_mpi_version_belonged == MPI2_VERSION) in _base_allocate_memory_pools()
6309 if (ioc->is_mcpu_endpoint) in _base_allocate_memory_pools()
6310 ioc->shost->sg_tablesize = MPT_MIN_PHYS_SEGMENTS; in _base_allocate_memory_pools()
6320 ioc->shost->sg_tablesize = sg_tablesize; in _base_allocate_memory_pools()
6323 ioc->internal_depth = min_t(int, (facts->HighPriorityCredit + (5)), in _base_allocate_memory_pools()
6324 (facts->RequestCredit / 4)); in _base_allocate_memory_pools()
6325 if (ioc->internal_depth < INTERNAL_CMDS_COUNT) { in _base_allocate_memory_pools()
6326 if (facts->RequestCredit <= (INTERNAL_CMDS_COUNT + in _base_allocate_memory_pools()
6329 facts->RequestCredit); in _base_allocate_memory_pools()
6330 return -ENOMEM; in _base_allocate_memory_pools()
6332 ioc->internal_depth = 10; in _base_allocate_memory_pools()
6335 ioc->hi_priority_depth = ioc->internal_depth - (5); in _base_allocate_memory_pools()
6337 if (max_queue_depth != -1 && max_queue_depth != 0) { in _base_allocate_memory_pools()
6339 ioc->internal_depth, facts->RequestCredit); in _base_allocate_memory_pools()
6343 max_request_credit = min_t(u16, facts->RequestCredit, in _base_allocate_memory_pools()
6344 (MPT3SAS_KDUMP_SCSI_IO_DEPTH + ioc->internal_depth)); in _base_allocate_memory_pools()
6346 max_request_credit = min_t(u16, facts->RequestCredit, in _base_allocate_memory_pools()
6349 /* Firmware maintains additional facts->HighPriorityCredit number of in _base_allocate_memory_pools()
6353 ioc->hba_queue_depth = max_request_credit + ioc->hi_priority_depth; in _base_allocate_memory_pools()
6356 ioc->request_sz = facts->IOCRequestFrameSize * 4; in _base_allocate_memory_pools()
6359 ioc->reply_sz = facts->ReplyFrameSize * 4; in _base_allocate_memory_pools()
6362 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_allocate_memory_pools()
6363 if (facts->IOCMaxChainSegmentSize) in _base_allocate_memory_pools()
6364 ioc->chain_segment_sz = in _base_allocate_memory_pools()
6365 facts->IOCMaxChainSegmentSize * in _base_allocate_memory_pools()
6369 ioc->chain_segment_sz = DEFAULT_NUM_FWCHAIN_ELEMTS * in _base_allocate_memory_pools()
6372 ioc->chain_segment_sz = ioc->request_sz; in _base_allocate_memory_pools()
6375 sge_size = max_t(u16, ioc->sge_size, ioc->sge_size_ieee); in _base_allocate_memory_pools()
6380 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - in _base_allocate_memory_pools()
6382 ioc->max_sges_in_main_message = max_sge_elements/sge_size; in _base_allocate_memory_pools()
6385 max_sge_elements = ioc->chain_segment_sz - sge_size; in _base_allocate_memory_pools()
6386 ioc->max_sges_in_chain_message = max_sge_elements/sge_size; in _base_allocate_memory_pools()
6391 chains_needed_per_io = ((ioc->shost->sg_tablesize - in _base_allocate_memory_pools()
6392 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) in _base_allocate_memory_pools()
6394 if (chains_needed_per_io > facts->MaxChainDepth) { in _base_allocate_memory_pools()
6395 chains_needed_per_io = facts->MaxChainDepth; in _base_allocate_memory_pools()
6396 ioc->shost->sg_tablesize = min_t(u16, in _base_allocate_memory_pools()
6397 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message in _base_allocate_memory_pools()
6398 * chains_needed_per_io), ioc->shost->sg_tablesize); in _base_allocate_memory_pools()
6400 ioc->chains_needed_per_io = chains_needed_per_io; in _base_allocate_memory_pools()
6402 /* reply free queue sizing - taking into account for 64 FW events */ in _base_allocate_memory_pools()
6403 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; in _base_allocate_memory_pools()
6406 if (ioc->is_mcpu_endpoint) in _base_allocate_memory_pools()
6407 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth; in _base_allocate_memory_pools()
6410 ioc->reply_post_queue_depth = ioc->hba_queue_depth + in _base_allocate_memory_pools()
6411 ioc->reply_free_queue_depth + 1; in _base_allocate_memory_pools()
6413 if (ioc->reply_post_queue_depth % 16) in _base_allocate_memory_pools()
6414 ioc->reply_post_queue_depth += 16 - in _base_allocate_memory_pools()
6415 (ioc->reply_post_queue_depth % 16); in _base_allocate_memory_pools()
6418 if (ioc->reply_post_queue_depth > in _base_allocate_memory_pools()
6419 facts->MaxReplyDescriptorPostQueueDepth) { in _base_allocate_memory_pools()
6420 ioc->reply_post_queue_depth = in _base_allocate_memory_pools()
6421 facts->MaxReplyDescriptorPostQueueDepth - in _base_allocate_memory_pools()
6422 (facts->MaxReplyDescriptorPostQueueDepth % 16); in _base_allocate_memory_pools()
6423 ioc->hba_queue_depth = in _base_allocate_memory_pools()
6424 ((ioc->reply_post_queue_depth - 64) / 2) - 1; in _base_allocate_memory_pools()
6425 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; in _base_allocate_memory_pools()
6431 ioc->max_sges_in_main_message, in _base_allocate_memory_pools()
6432 ioc->max_sges_in_chain_message, in _base_allocate_memory_pools()
6433 ioc->shost->sg_tablesize, in _base_allocate_memory_pools()
6434 ioc->chains_needed_per_io); in _base_allocate_memory_pools()
6437 reply_post_free_sz = ioc->reply_post_queue_depth * in _base_allocate_memory_pools()
6440 if ((_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable) in _base_allocate_memory_pools()
6441 || (ioc->reply_queue_count < RDPQ_MAX_INDEX_IN_ONE_CHUNK)) in _base_allocate_memory_pools()
6442 rdpq_sz = reply_post_free_sz * ioc->reply_queue_count; in _base_allocate_memory_pools()
6444 if (ret == -EAGAIN) { in _base_allocate_memory_pools()
6450 ioc->use_32bit_dma = true; in _base_allocate_memory_pools()
6451 if (_base_config_dma_addressing(ioc, ioc->pdev) != 0) { in _base_allocate_memory_pools()
6453 "32 DMA mask failed %s\n", pci_name(ioc->pdev)); in _base_allocate_memory_pools()
6454 return -ENODEV; in _base_allocate_memory_pools()
6457 return -ENOMEM; in _base_allocate_memory_pools()
6458 } else if (ret == -ENOMEM) in _base_allocate_memory_pools()
6459 return -ENOMEM; in _base_allocate_memory_pools()
6460 total_sz = rdpq_sz * (!ioc->rdpq_array_enable ? 1 : in _base_allocate_memory_pools()
6461 DIV_ROUND_UP(ioc->reply_queue_count, RDPQ_MAX_INDEX_IN_ONE_CHUNK)); in _base_allocate_memory_pools()
6462 ioc->scsiio_depth = ioc->hba_queue_depth - in _base_allocate_memory_pools()
6463 ioc->hi_priority_depth - ioc->internal_depth; in _base_allocate_memory_pools()
6468 ioc->shost->can_queue = ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT; in _base_allocate_memory_pools()
6471 ioc->shost->can_queue)); in _base_allocate_memory_pools()
6476 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; in _base_allocate_memory_pools()
6477 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz); in _base_allocate_memory_pools()
6479 /* hi-priority queue */ in _base_allocate_memory_pools()
6480 sz += (ioc->hi_priority_depth * ioc->request_sz); in _base_allocate_memory_pools()
6483 sz += (ioc->internal_depth * ioc->request_sz); in _base_allocate_memory_pools()
6485 ioc->request_dma_sz = sz; in _base_allocate_memory_pools()
6486 ioc->request = dma_alloc_coherent(&ioc->pdev->dev, sz, in _base_allocate_memory_pools()
6487 &ioc->request_dma, GFP_KERNEL); in _base_allocate_memory_pools()
6488 if (!ioc->request) { in _base_allocate_memory_pools()
6490 ioc->hba_queue_depth, ioc->chains_needed_per_io, in _base_allocate_memory_pools()
6491 ioc->request_sz, sz / 1024); in _base_allocate_memory_pools()
6492 if (ioc->scsiio_depth < MPT3SAS_SAS_QUEUE_DEPTH) in _base_allocate_memory_pools()
6495 ioc->hba_queue_depth -= retry_sz; in _base_allocate_memory_pools()
6502 ioc->hba_queue_depth, ioc->chains_needed_per_io, in _base_allocate_memory_pools()
6503 ioc->request_sz, sz / 1024); in _base_allocate_memory_pools()
6505 /* hi-priority queue */ in _base_allocate_memory_pools()
6506 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * in _base_allocate_memory_pools()
6507 ioc->request_sz); in _base_allocate_memory_pools()
6508 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * in _base_allocate_memory_pools()
6509 ioc->request_sz); in _base_allocate_memory_pools()
6512 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * in _base_allocate_memory_pools()
6513 ioc->request_sz); in _base_allocate_memory_pools()
6514 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * in _base_allocate_memory_pools()
6515 ioc->request_sz); in _base_allocate_memory_pools()
6518 "request pool(0x%p) - dma(0x%llx): " in _base_allocate_memory_pools()
6520 ioc->request, (unsigned long long) ioc->request_dma, in _base_allocate_memory_pools()
6521 ioc->hba_queue_depth, ioc->request_sz, in _base_allocate_memory_pools()
6522 (ioc->hba_queue_depth * ioc->request_sz) / 1024); in _base_allocate_memory_pools()
6528 ioc->request, ioc->scsiio_depth)); in _base_allocate_memory_pools()
6530 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH); in _base_allocate_memory_pools()
6531 sz = ioc->scsiio_depth * sizeof(struct chain_lookup); in _base_allocate_memory_pools()
6532 ioc->chain_lookup = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
6533 if (!ioc->chain_lookup) { in _base_allocate_memory_pools()
6538 sz = ioc->chains_needed_per_io * sizeof(struct chain_tracker); in _base_allocate_memory_pools()
6539 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_memory_pools()
6540 ioc->chain_lookup[i].chains_per_smid = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
6541 if (!ioc->chain_lookup[i].chains_per_smid) { in _base_allocate_memory_pools()
6547 /* initialize hi-priority queue smid's */ in _base_allocate_memory_pools()
6548 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, in _base_allocate_memory_pools()
6550 if (!ioc->hpr_lookup) { in _base_allocate_memory_pools()
6554 ioc->hi_priority_smid = ioc->scsiio_depth + 1; in _base_allocate_memory_pools()
6557 ioc->hi_priority, in _base_allocate_memory_pools()
6558 ioc->hi_priority_depth, ioc->hi_priority_smid)); in _base_allocate_memory_pools()
6561 ioc->internal_lookup = kcalloc(ioc->internal_depth, in _base_allocate_memory_pools()
6563 if (!ioc->internal_lookup) { in _base_allocate_memory_pools()
6567 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; in _base_allocate_memory_pools()
6570 ioc->internal, in _base_allocate_memory_pools()
6571 ioc->internal_depth, ioc->internal_smid)); in _base_allocate_memory_pools()
6573 ioc->io_queue_num = kcalloc(ioc->scsiio_depth, in _base_allocate_memory_pools()
6575 if (!ioc->io_queue_num) in _base_allocate_memory_pools()
6579 * (((sg_tablesize * 8) - 1) / (page_size - 8)) + 1 in _base_allocate_memory_pools()
6580 * ((sg_tablesize * 8) - 1) is the max PRP's minus the first PRP entry in _base_allocate_memory_pools()
6591 ioc->chains_per_prp_buffer = 0; in _base_allocate_memory_pools()
6592 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES) { in _base_allocate_memory_pools()
6594 (ioc->shost->sg_tablesize * NVME_PRP_SIZE) - 1; in _base_allocate_memory_pools()
6595 nvme_blocks_needed /= (ioc->page_size - NVME_PRP_SIZE); in _base_allocate_memory_pools()
6598 sz = sizeof(struct pcie_sg_list) * ioc->scsiio_depth; in _base_allocate_memory_pools()
6599 ioc->pcie_sg_lookup = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
6600 if (!ioc->pcie_sg_lookup) { in _base_allocate_memory_pools()
6604 sz = nvme_blocks_needed * ioc->page_size; in _base_allocate_memory_pools()
6606 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6607 return -ENOMEM; in _base_allocate_memory_pools()
6608 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6610 total_sz += sz * ioc->scsiio_depth; in _base_allocate_memory_pools()
6613 rc = _base_allocate_chain_dma_pool(ioc, ioc->chain_segment_sz); in _base_allocate_memory_pools()
6614 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6615 return -ENOMEM; in _base_allocate_memory_pools()
6616 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6618 total_sz += ioc->chain_segment_sz * ((ioc->chains_needed_per_io - in _base_allocate_memory_pools()
6619 ioc->chains_per_prp_buffer) * ioc->scsiio_depth); in _base_allocate_memory_pools()
6622 ioc->chain_depth, ioc->chain_segment_sz, in _base_allocate_memory_pools()
6623 (ioc->chain_depth * ioc->chain_segment_sz) / 1024)); in _base_allocate_memory_pools()
6625 sense_sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; in _base_allocate_memory_pools()
6627 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6628 return -ENOMEM; in _base_allocate_memory_pools()
6629 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6633 sz = ioc->reply_free_queue_depth * ioc->reply_sz; in _base_allocate_memory_pools()
6635 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6636 return -ENOMEM; in _base_allocate_memory_pools()
6637 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6642 sz = ioc->reply_free_queue_depth * 4; in _base_allocate_memory_pools()
6644 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6645 return -ENOMEM; in _base_allocate_memory_pools()
6646 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6650 (unsigned long long)ioc->reply_free_dma)); in _base_allocate_memory_pools()
6652 if (ioc->rdpq_array_enable) { in _base_allocate_memory_pools()
6653 reply_post_free_array_sz = ioc->reply_queue_count * in _base_allocate_memory_pools()
6657 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6658 return -ENOMEM; in _base_allocate_memory_pools()
6659 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6662 ioc->config_page_sz = 512; in _base_allocate_memory_pools()
6663 ioc->config_page = dma_alloc_coherent(&ioc->pdev->dev, in _base_allocate_memory_pools()
6664 ioc->config_page_sz, &ioc->config_page_dma, GFP_KERNEL); in _base_allocate_memory_pools()
6665 if (!ioc->config_page) { in _base_allocate_memory_pools()
6670 ioc_info(ioc, "config page(0x%p) - dma(0x%llx): size(%d)\n", in _base_allocate_memory_pools()
6671 ioc->config_page, (unsigned long long)ioc->config_page_dma, in _base_allocate_memory_pools()
6672 ioc->config_page_sz); in _base_allocate_memory_pools()
6673 total_sz += ioc->config_page_sz; in _base_allocate_memory_pools()
6678 ioc->shost->can_queue, facts->RequestCredit); in _base_allocate_memory_pools()
6680 ioc->shost->sg_tablesize); in _base_allocate_memory_pools()
6685 if (ioc->use_32bit_dma && (ioc->dma_mask > 32)) { in _base_allocate_memory_pools()
6687 if (_base_config_dma_addressing(ioc, ioc->pdev) != 0) { in _base_allocate_memory_pools()
6689 pci_name(ioc->pdev)); in _base_allocate_memory_pools()
6690 return -ENODEV; in _base_allocate_memory_pools()
6693 return -ENOMEM; in _base_allocate_memory_pools()
6697 return -ENOMEM; in _base_allocate_memory_pools()
6701 * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
6713 s = ioc->base_readl_ext_retry(&ioc->chip->Doorbell); in mpt3sas_base_get_iocstate()
6719 * _base_wait_on_iocstate - waiting on a particular ioc state
6724 * Return: 0 for success, non-zero for failure.
6745 } while (--cntdn); in _base_wait_on_iocstate()
6751 * _base_dump_reg_set - This function will print hexdump of register set.
6760 u32 __iomem *reg = (u32 __iomem *)ioc->chip; in _base_dump_reg_set()
6768 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
6773 * Return: 0 for success, non-zero for failure.
6775 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
6787 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_wait_for_doorbell_int()
6797 } while (--cntdn); in _base_wait_for_doorbell_int()
6801 return -EFAULT; in _base_wait_for_doorbell_int()
6813 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_spin_on_doorbell_int()
6823 } while (--cntdn); in _base_spin_on_doorbell_int()
6827 return -EFAULT; in _base_spin_on_doorbell_int()
6832 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
6836 * Return: 0 for success, non-zero for failure.
6838 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
6851 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_wait_for_doorbell_ack()
6858 doorbell = ioc->base_readl_ext_retry(&ioc->chip->Doorbell); in _base_wait_for_doorbell_ack()
6862 return -EFAULT; in _base_wait_for_doorbell_ack()
6867 return -EFAULT; in _base_wait_for_doorbell_ack()
6874 } while (--cntdn); in _base_wait_for_doorbell_ack()
6879 return -EFAULT; in _base_wait_for_doorbell_ack()
6883 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
6887 * Return: 0 for success, non-zero for failure.
6898 doorbell_reg = ioc->base_readl_ext_retry(&ioc->chip->Doorbell); in _base_wait_for_doorbell_not_used()
6908 } while (--cntdn); in _base_wait_for_doorbell_not_used()
6912 return -EFAULT; in _base_wait_for_doorbell_not_used()
6916 * _base_send_ioc_reset - send doorbell reset
6921 * Return: 0 for success, non-zero for failure.
6932 return -EFAULT; in _base_send_ioc_reset()
6935 if (!(ioc->facts.IOCCapabilities & in _base_send_ioc_reset()
6937 return -EFAULT; in _base_send_ioc_reset()
6942 &ioc->chip->Doorbell); in _base_send_ioc_reset()
6944 r = -EFAULT; in _base_send_ioc_reset()
6952 r = -EFAULT; in _base_send_ioc_reset()
6958 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6964 MPI2_IOC_STATE_COREDUMP && (ioc->is_driver_loading == 1 || in _base_send_ioc_reset()
6965 ioc->fault_reset_work_q == NULL)) { in _base_send_ioc_reset()
6967 &ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6972 &ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6974 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6982 * mpt3sas_wait_for_ioc - IOC's operational state is checked here.
6988 * and operational; otherwise returns %-EFAULT.
7009 if (ioc->is_driver_loading) in mpt3sas_wait_for_ioc()
7010 return -ETIME; in mpt3sas_wait_for_ioc()
7015 } while (--timeout); in mpt3sas_wait_for_ioc()
7018 return -EFAULT; in mpt3sas_wait_for_ioc()
7026 * _base_handshake_req_reply_wait - send request thru doorbell interface
7034 * Return: 0 for success, non-zero for failure.
7047 if ((ioc->base_readl_ext_retry(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { in _base_handshake_req_reply_wait()
7053 if (ioc->base_readl(&ioc->chip->HostInterruptStatus) & in _base_handshake_req_reply_wait()
7055 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7060 &ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
7065 return -EFAULT; in _base_handshake_req_reply_wait()
7067 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7072 return -EFAULT; in _base_handshake_req_reply_wait()
7075 /* send message 32-bits at a time */ in _base_handshake_req_reply_wait()
7077 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
7085 return -EFAULT; in _base_handshake_req_reply_wait()
7092 return -EFAULT; in _base_handshake_req_reply_wait()
7095 /* read the first two 16-bits, it gives the total length of the reply */ in _base_handshake_req_reply_wait()
7096 reply[0] = le16_to_cpu(ioc->base_readl_ext_retry(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
7098 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7102 return -EFAULT; in _base_handshake_req_reply_wait()
7104 reply[1] = le16_to_cpu(ioc->base_readl_ext_retry(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
7106 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7108 for (i = 2; i < default_reply->MsgLength * 2; i++) { in _base_handshake_req_reply_wait()
7112 return -EFAULT; in _base_handshake_req_reply_wait()
7115 ioc->base_readl_ext_retry(&ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
7118 ioc->base_readl_ext_retry(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
7120 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7129 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7131 if (ioc->logging_level & MPT_DEBUG_INIT) { in _base_handshake_req_reply_wait()
7146 * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
7151 * The SAS IO Unit Control Request message allows the host to perform low-level
7157 * Return: 0 for success, non-zero for failure.
7171 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_sas_iounit_control()
7173 if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) { in mpt3sas_base_sas_iounit_control()
7175 rc = -EAGAIN; in mpt3sas_base_sas_iounit_control()
7183 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in mpt3sas_base_sas_iounit_control()
7186 rc = -EAGAIN; in mpt3sas_base_sas_iounit_control()
7191 ioc->base_cmds.status = MPT3_CMD_PENDING; in mpt3sas_base_sas_iounit_control()
7193 ioc->base_cmds.smid = smid; in mpt3sas_base_sas_iounit_control()
7195 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || in mpt3sas_base_sas_iounit_control()
7196 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) in mpt3sas_base_sas_iounit_control()
7197 ioc->ioc_link_reset_in_progress = 1; in mpt3sas_base_sas_iounit_control()
7198 init_completion(&ioc->base_cmds.done); in mpt3sas_base_sas_iounit_control()
7199 ioc->put_smid_default(ioc, smid); in mpt3sas_base_sas_iounit_control()
7200 wait_for_completion_timeout(&ioc->base_cmds.done, in mpt3sas_base_sas_iounit_control()
7202 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || in mpt3sas_base_sas_iounit_control()
7203 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && in mpt3sas_base_sas_iounit_control()
7204 ioc->ioc_link_reset_in_progress) in mpt3sas_base_sas_iounit_control()
7205 ioc->ioc_link_reset_in_progress = 0; in mpt3sas_base_sas_iounit_control()
7206 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in mpt3sas_base_sas_iounit_control()
7207 mpt3sas_check_cmd_timeout(ioc, ioc->base_cmds.status, in mpt3sas_base_sas_iounit_control()
7212 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) in mpt3sas_base_sas_iounit_control()
7213 memcpy(mpi_reply, ioc->base_cmds.reply, in mpt3sas_base_sas_iounit_control()
7217 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_sas_iounit_control()
7223 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_sas_iounit_control()
7224 rc = -EFAULT; in mpt3sas_base_sas_iounit_control()
7226 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_sas_iounit_control()
7231 * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
7239 * Return: 0 for success, non-zero for failure.
7252 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_scsi_enclosure_processor()
7254 if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) { in mpt3sas_base_scsi_enclosure_processor()
7256 rc = -EAGAIN; in mpt3sas_base_scsi_enclosure_processor()
7264 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in mpt3sas_base_scsi_enclosure_processor()
7267 rc = -EAGAIN; in mpt3sas_base_scsi_enclosure_processor()
7272 ioc->base_cmds.status = MPT3_CMD_PENDING; in mpt3sas_base_scsi_enclosure_processor()
7274 ioc->base_cmds.smid = smid; in mpt3sas_base_scsi_enclosure_processor()
7275 memset(request, 0, ioc->request_sz); in mpt3sas_base_scsi_enclosure_processor()
7277 init_completion(&ioc->base_cmds.done); in mpt3sas_base_scsi_enclosure_processor()
7278 ioc->put_smid_default(ioc, smid); in mpt3sas_base_scsi_enclosure_processor()
7279 wait_for_completion_timeout(&ioc->base_cmds.done, in mpt3sas_base_scsi_enclosure_processor()
7281 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in mpt3sas_base_scsi_enclosure_processor()
7283 ioc->base_cmds.status, mpi_request, in mpt3sas_base_scsi_enclosure_processor()
7287 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) in mpt3sas_base_scsi_enclosure_processor()
7288 memcpy(mpi_reply, ioc->base_cmds.reply, in mpt3sas_base_scsi_enclosure_processor()
7292 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_scsi_enclosure_processor()
7298 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_scsi_enclosure_processor()
7299 rc = -EFAULT; in mpt3sas_base_scsi_enclosure_processor()
7301 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_scsi_enclosure_processor()
7306 * _base_get_port_facts - obtain port facts reply and save in ioc
7310 * Return: 0 for success, non-zero for failure.
7335 pfacts = &ioc->pfacts[port]; in _base_get_port_facts()
7337 pfacts->PortNumber = mpi_reply.PortNumber; in _base_get_port_facts()
7338 pfacts->VP_ID = mpi_reply.VP_ID; in _base_get_port_facts()
7339 pfacts->VF_ID = mpi_reply.VF_ID; in _base_get_port_facts()
7340 pfacts->MaxPostedCmdBuffers = in _base_get_port_facts()
7347 * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
7351 * Return: 0 for success, non-zero for failure.
7361 if (ioc->pci_error_recovery) { in _base_wait_for_iocstate()
7365 return -EFAULT; in _base_wait_for_iocstate()
7391 return -EFAULT; in _base_wait_for_iocstate()
7399 return -EFAULT; in _base_wait_for_iocstate()
7410 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
7413 * Return: 0 for success, non-zero for failure.
7444 facts = &ioc->facts; in _base_get_ioc_facts()
7446 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); in _base_get_ioc_facts()
7447 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); in _base_get_ioc_facts()
7448 facts->VP_ID = mpi_reply.VP_ID; in _base_get_ioc_facts()
7449 facts->VF_ID = mpi_reply.VF_ID; in _base_get_ioc_facts()
7450 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); in _base_get_ioc_facts()
7451 facts->MaxChainDepth = mpi_reply.MaxChainDepth; in _base_get_ioc_facts()
7452 facts->WhoInit = mpi_reply.WhoInit; in _base_get_ioc_facts()
7453 facts->NumberOfPorts = mpi_reply.NumberOfPorts; in _base_get_ioc_facts()
7454 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors; in _base_get_ioc_facts()
7455 if (ioc->msix_enable && (facts->MaxMSIxVectors <= in _base_get_ioc_facts()
7456 MAX_COMBINED_MSIX_VECTORS(ioc->is_gen35_ioc))) in _base_get_ioc_facts()
7457 ioc->combined_reply_queue = 0; in _base_get_ioc_facts()
7458 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); in _base_get_ioc_facts()
7459 facts->MaxReplyDescriptorPostQueueDepth = in _base_get_ioc_facts()
7461 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); in _base_get_ioc_facts()
7462 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); in _base_get_ioc_facts()
7463 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) in _base_get_ioc_facts()
7464 ioc->ir_firmware = 1; in _base_get_ioc_facts()
7465 if ((facts->IOCCapabilities & in _base_get_ioc_facts()
7467 ioc->rdpq_array_capable = 1; in _base_get_ioc_facts()
7468 if ((facts->IOCCapabilities & MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ) in _base_get_ioc_facts()
7469 && ioc->is_aero_ioc) in _base_get_ioc_facts()
7470 ioc->atomic_desc_capable = 1; in _base_get_ioc_facts()
7471 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); in _base_get_ioc_facts()
7472 facts->IOCRequestFrameSize = in _base_get_ioc_facts()
7474 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_get_ioc_facts()
7475 facts->IOCMaxChainSegmentSize = in _base_get_ioc_facts()
7478 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); in _base_get_ioc_facts()
7479 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); in _base_get_ioc_facts()
7480 ioc->shost->max_id = -1; in _base_get_ioc_facts()
7481 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); in _base_get_ioc_facts()
7482 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); in _base_get_ioc_facts()
7483 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); in _base_get_ioc_facts()
7484 facts->HighPriorityCredit = in _base_get_ioc_facts()
7486 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; in _base_get_ioc_facts()
7487 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); in _base_get_ioc_facts()
7488 facts->CurrentHostPageSize = mpi_reply.CurrentHostPageSize; in _base_get_ioc_facts()
7493 ioc->page_size = 1 << facts->CurrentHostPageSize; in _base_get_ioc_facts()
7494 if (ioc->page_size == 1) { in _base_get_ioc_facts()
7496 ioc->page_size = 1 << MPT3SAS_HOST_PAGE_SIZE_4K; in _base_get_ioc_facts()
7500 facts->CurrentHostPageSize)); in _base_get_ioc_facts()
7504 facts->RequestCredit, facts->MaxChainDepth)); in _base_get_ioc_facts()
7507 facts->IOCRequestFrameSize * 4, in _base_get_ioc_facts()
7508 facts->ReplyFrameSize * 4)); in _base_get_ioc_facts()
7513 * _base_send_ioc_init - send ioc_init to firmware
7516 * Return: 0 for success, non-zero for failure.
7535 mpi_request.MsgVersion = cpu_to_le16(ioc->hba_mpi_version_belonged); in _base_send_ioc_init()
7540 mpi_request.HostMSIxVectors = ioc->reply_queue_count; in _base_send_ioc_init()
7541 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); in _base_send_ioc_init()
7543 cpu_to_le16(ioc->reply_post_queue_depth); in _base_send_ioc_init()
7545 cpu_to_le16(ioc->reply_free_queue_depth); in _base_send_ioc_init()
7548 cpu_to_le32((u64)ioc->sense_dma >> 32); in _base_send_ioc_init()
7550 cpu_to_le32((u64)ioc->reply_dma >> 32); in _base_send_ioc_init()
7552 cpu_to_le64((u64)ioc->request_dma); in _base_send_ioc_init()
7554 cpu_to_le64((u64)ioc->reply_free_dma); in _base_send_ioc_init()
7556 if (ioc->rdpq_array_enable) { in _base_send_ioc_init()
7557 reply_post_free_array_sz = ioc->reply_queue_count * in _base_send_ioc_init()
7559 memset(ioc->reply_post_free_array, 0, reply_post_free_array_sz); in _base_send_ioc_init()
7560 for (i = 0; i < ioc->reply_queue_count; i++) in _base_send_ioc_init()
7561 ioc->reply_post_free_array[i].RDPQBaseAddress = in _base_send_ioc_init()
7563 (u64)ioc->reply_post[i].reply_post_free_dma); in _base_send_ioc_init()
7566 cpu_to_le64((u64)ioc->reply_post_free_array_dma); in _base_send_ioc_init()
7569 cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma); in _base_send_ioc_init()
7584 if (ioc->logging_level & MPT_DEBUG_INIT) { in _base_send_ioc_init()
7608 r = -EIO; in _base_send_ioc_init()
7612 ioc->timestamp_update_count = 0; in _base_send_ioc_init()
7617 * mpt3sas_port_enable_done - command completion routine for port enable
7633 if (ioc->port_enable_cmds.status == MPT3_CMD_NOT_USED) in mpt3sas_port_enable_done()
7640 if (mpi_reply->Function != MPI2_FUNCTION_PORT_ENABLE) in mpt3sas_port_enable_done()
7643 ioc->port_enable_cmds.status &= ~MPT3_CMD_PENDING; in mpt3sas_port_enable_done()
7644 ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE; in mpt3sas_port_enable_done()
7645 ioc->port_enable_cmds.status |= MPT3_CMD_REPLY_VALID; in mpt3sas_port_enable_done()
7646 memcpy(ioc->port_enable_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); in mpt3sas_port_enable_done()
7647 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK; in mpt3sas_port_enable_done()
7649 ioc->port_enable_failed = 1; in mpt3sas_port_enable_done()
7651 if (ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE_ASYNC) { in mpt3sas_port_enable_done()
7652 ioc->port_enable_cmds.status &= ~MPT3_CMD_COMPLETE_ASYNC; in mpt3sas_port_enable_done()
7657 ioc->start_scan_failed = ioc_status; in mpt3sas_port_enable_done()
7658 ioc->start_scan = 0; in mpt3sas_port_enable_done()
7662 complete(&ioc->port_enable_cmds.done); in mpt3sas_port_enable_done()
7667 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
7670 * Return: 0 for success, non-zero for failure.
7683 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in _base_send_port_enable()
7685 return -EAGAIN; in _base_send_port_enable()
7688 smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx); in _base_send_port_enable()
7691 return -EAGAIN; in _base_send_port_enable()
7694 ioc->port_enable_cmds.status = MPT3_CMD_PENDING; in _base_send_port_enable()
7696 ioc->port_enable_cmds.smid = smid; in _base_send_port_enable()
7698 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; in _base_send_port_enable()
7700 init_completion(&ioc->port_enable_cmds.done); in _base_send_port_enable()
7701 ioc->put_smid_default(ioc, smid); in _base_send_port_enable()
7702 wait_for_completion_timeout(&ioc->port_enable_cmds.done, 300*HZ); in _base_send_port_enable()
7703 if (!(ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE)) { in _base_send_port_enable()
7707 if (ioc->port_enable_cmds.status & MPT3_CMD_RESET) in _base_send_port_enable()
7708 r = -EFAULT; in _base_send_port_enable()
7710 r = -ETIME; in _base_send_port_enable()
7714 mpi_reply = ioc->port_enable_cmds.reply; in _base_send_port_enable()
7715 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK; in _base_send_port_enable()
7719 r = -EFAULT; in _base_send_port_enable()
7724 ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED; in _base_send_port_enable()
7730 * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
7733 * Return: 0 for success, non-zero for failure.
7743 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in mpt3sas_port_enable()
7745 return -EAGAIN; in mpt3sas_port_enable()
7748 smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx); in mpt3sas_port_enable()
7751 return -EAGAIN; in mpt3sas_port_enable()
7753 ioc->drv_internal_flags |= MPT_DRV_INTERNAL_FIRST_PE_ISSUED; in mpt3sas_port_enable()
7754 ioc->port_enable_cmds.status = MPT3_CMD_PENDING; in mpt3sas_port_enable()
7755 ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE_ASYNC; in mpt3sas_port_enable()
7757 ioc->port_enable_cmds.smid = smid; in mpt3sas_port_enable()
7759 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; in mpt3sas_port_enable()
7761 ioc->put_smid_default(ioc, smid); in mpt3sas_port_enable()
7766 * _base_determine_wait_on_discovery - desposition
7779 * turn on the bit in ioc->pd_handles to indicate PD in _base_determine_wait_on_discovery()
7783 if (ioc->ir_firmware) in _base_determine_wait_on_discovery()
7787 if (!ioc->bios_pg3.BiosVersion) in _base_determine_wait_on_discovery()
7797 if ((ioc->bios_pg2.CurrentBootDeviceForm & in _base_determine_wait_on_discovery()
7801 (ioc->bios_pg2.ReqBootDeviceForm & in _base_determine_wait_on_discovery()
7805 (ioc->bios_pg2.ReqAltBootDeviceForm & in _base_determine_wait_on_discovery()
7814 * _base_unmask_events - turn on notification for this event
7818 * The mask is stored in ioc->event_masks.
7831 ioc->event_masks[0] &= ~desired_event; in _base_unmask_events()
7833 ioc->event_masks[1] &= ~desired_event; in _base_unmask_events()
7835 ioc->event_masks[2] &= ~desired_event; in _base_unmask_events()
7837 ioc->event_masks[3] &= ~desired_event; in _base_unmask_events()
7841 * _base_event_notification - send event notification
7844 * Return: 0 for success, non-zero for failure.
7856 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_event_notification()
7858 return -EAGAIN; in _base_event_notification()
7861 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_event_notification()
7864 return -EAGAIN; in _base_event_notification()
7866 ioc->base_cmds.status = MPT3_CMD_PENDING; in _base_event_notification()
7868 ioc->base_cmds.smid = smid; in _base_event_notification()
7870 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; in _base_event_notification()
7871 mpi_request->VF_ID = 0; /* TODO */ in _base_event_notification()
7872 mpi_request->VP_ID = 0; in _base_event_notification()
7874 mpi_request->EventMasks[i] = in _base_event_notification()
7875 cpu_to_le32(ioc->event_masks[i]); in _base_event_notification()
7876 init_completion(&ioc->base_cmds.done); in _base_event_notification()
7877 ioc->put_smid_default(ioc, smid); in _base_event_notification()
7878 wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); in _base_event_notification()
7879 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in _base_event_notification()
7883 if (ioc->base_cmds.status & MPT3_CMD_RESET) in _base_event_notification()
7884 r = -EFAULT; in _base_event_notification()
7890 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in _base_event_notification()
7893 if (ioc->drv_internal_flags & MPT_DRV_INTERNAL_FIRST_PE_ISSUED) in _base_event_notification()
7894 return -EFAULT; in _base_event_notification()
7896 return -EFAULT; in _base_event_notification()
7897 r = -EAGAIN; in _base_event_notification()
7903 * mpt3sas_base_validate_event_type - validating event types
7923 (ioc->event_masks[i] & desired_event)) { in mpt3sas_base_validate_event_type()
7924 ioc->event_masks[i] &= ~desired_event; in mpt3sas_base_validate_event_type()
7934 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_validate_event_type()
7936 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_validate_event_type()
7940 * mpt3sas_base_unlock_and_get_host_diagnostic- enable Host Diagnostic Register writes
7944 * Return: 0 for success, non-zero for failure.
7961 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7962 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7963 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7964 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7965 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7966 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7967 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7976 return -EFAULT; in mpt3sas_base_unlock_and_get_host_diagnostic()
7979 *host_diagnostic = ioc->base_readl_ext_retry(&ioc->chip->HostDiagnostic); in mpt3sas_base_unlock_and_get_host_diagnostic()
7997 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_lock_host_diagnostic()
8001 * _base_diag_reset - the "big hammer" start of day reset
8004 * Return: 0 for success, non-zero for failure.
8016 pci_cfg_access_lock(ioc->pdev); in _base_diag_reset()
8020 mutex_lock(&ioc->hostdiag_unlock_mutex); in _base_diag_reset()
8024 hcb_size = ioc->base_readl(&ioc->chip->HCBSize); in _base_diag_reset()
8027 &ioc->chip->HostDiagnostic); in _base_diag_reset()
8036 host_diagnostic = ioc->base_readl_ext_retry(&ioc->chip->HostDiagnostic); in _base_diag_reset()
8058 writel(host_diagnostic, &ioc->chip->HostDiagnostic); in _base_diag_reset()
8060 drsprintk(ioc, ioc_info(ioc, "re-enable the HCDW\n")); in _base_diag_reset()
8062 &ioc->chip->HCBSize); in _base_diag_reset()
8067 &ioc->chip->HostDiagnostic); in _base_diag_reset()
8070 mutex_unlock(&ioc->hostdiag_unlock_mutex); in _base_diag_reset()
8081 pci_cfg_access_unlock(ioc->pdev); in _base_diag_reset()
8086 pci_cfg_access_unlock(ioc->pdev); in _base_diag_reset()
8088 mutex_unlock(&ioc->hostdiag_unlock_mutex); in _base_diag_reset()
8089 return -EFAULT; in _base_diag_reset()
8093 * mpt3sas_base_make_ioc_ready - put controller in READY state
8097 * Return: 0 for success, non-zero for failure.
8108 if (ioc->pci_error_recovery) in mpt3sas_base_make_ioc_ready()
8124 return -EFAULT; in mpt3sas_base_make_ioc_ready()
8153 if (ioc->ioc_coredump_loop != MPT3SAS_COREDUMP_LOOP_DONE) { in mpt3sas_base_make_ioc_ready()
8177 * _base_make_ioc_operational - put controller in OPERATIONAL state
8180 * Return: 0 for success, non-zero for failure.
8200 &ioc->delayed_tr_list, list) { in _base_make_ioc_operational()
8201 list_del(&delayed_tr->list); in _base_make_ioc_operational()
8207 &ioc->delayed_tr_volume_list, list) { in _base_make_ioc_operational()
8208 list_del(&delayed_tr->list); in _base_make_ioc_operational()
8213 &ioc->delayed_sc_list, list) { in _base_make_ioc_operational()
8214 list_del(&delayed_sc->list); in _base_make_ioc_operational()
8219 &ioc->delayed_event_ack_list, list) { in _base_make_ioc_operational()
8220 list_del(&delayed_event_ack->list); in _base_make_ioc_operational()
8224 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in _base_make_ioc_operational()
8226 /* hi-priority queue */ in _base_make_ioc_operational()
8227 INIT_LIST_HEAD(&ioc->hpr_free_list); in _base_make_ioc_operational()
8228 smid = ioc->hi_priority_smid; in _base_make_ioc_operational()
8229 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { in _base_make_ioc_operational()
8230 ioc->hpr_lookup[i].cb_idx = 0xFF; in _base_make_ioc_operational()
8231 ioc->hpr_lookup[i].smid = smid; in _base_make_ioc_operational()
8232 list_add_tail(&ioc->hpr_lookup[i].tracker_list, in _base_make_ioc_operational()
8233 &ioc->hpr_free_list); in _base_make_ioc_operational()
8237 INIT_LIST_HEAD(&ioc->internal_free_list); in _base_make_ioc_operational()
8238 smid = ioc->internal_smid; in _base_make_ioc_operational()
8239 for (i = 0; i < ioc->internal_depth; i++, smid++) { in _base_make_ioc_operational()
8240 ioc->internal_lookup[i].cb_idx = 0xFF; in _base_make_ioc_operational()
8241 ioc->internal_lookup[i].smid = smid; in _base_make_ioc_operational()
8242 list_add_tail(&ioc->internal_lookup[i].tracker_list, in _base_make_ioc_operational()
8243 &ioc->internal_free_list); in _base_make_ioc_operational()
8246 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in _base_make_ioc_operational()
8249 for (i = 0, reply_address = (u32)ioc->reply_dma ; in _base_make_ioc_operational()
8250 i < ioc->reply_free_queue_depth ; i++, reply_address += in _base_make_ioc_operational()
8251 ioc->reply_sz) { in _base_make_ioc_operational()
8252 ioc->reply_free[i] = cpu_to_le32(reply_address); in _base_make_ioc_operational()
8253 if (ioc->is_mcpu_endpoint) in _base_make_ioc_operational()
8259 if (ioc->is_driver_loading) in _base_make_ioc_operational()
8264 reply_post_free_contig = ioc->reply_post[0].reply_post_free; in _base_make_ioc_operational()
8265 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_make_ioc_operational()
8270 if (ioc->rdpq_array_enable) { in _base_make_ioc_operational()
8271 reply_q->reply_post_free = in _base_make_ioc_operational()
8272 ioc->reply_post[index++].reply_post_free; in _base_make_ioc_operational()
8274 reply_q->reply_post_free = reply_post_free_contig; in _base_make_ioc_operational()
8275 reply_post_free_contig += ioc->reply_post_queue_depth; in _base_make_ioc_operational()
8278 reply_q->reply_post_host_index = 0; in _base_make_ioc_operational()
8279 for (i = 0; i < ioc->reply_post_queue_depth; i++) in _base_make_ioc_operational()
8280 reply_q->reply_post_free[i].Words = in _base_make_ioc_operational()
8294 if (!ioc->is_driver_loading) in _base_make_ioc_operational()
8303 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; in _base_make_ioc_operational()
8304 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); in _base_make_ioc_operational()
8307 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_make_ioc_operational()
8308 if (ioc->combined_reply_queue) in _base_make_ioc_operational()
8309 writel((reply_q->msix_index & 7)<< in _base_make_ioc_operational()
8311 ioc->replyPostRegisterIndex[reply_q->msix_index/8]); in _base_make_ioc_operational()
8313 writel(reply_q->msix_index << in _base_make_ioc_operational()
8315 &ioc->chip->ReplyPostHostIndex); in _base_make_ioc_operational()
8325 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_make_ioc_operational()
8339 if (!ioc->shost_recovery) { in _base_make_ioc_operational()
8341 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier in _base_make_ioc_operational()
8344 le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) & in _base_make_ioc_operational()
8347 ioc->mfg_pg10_hide_flag = hide_flag; in _base_make_ioc_operational()
8350 ioc->wait_for_discovery_to_complete = in _base_make_ioc_operational()
8364 * mpt3sas_base_free_resources - free resources controller resources
8373 mutex_lock(&ioc->pci_access_mutex); in mpt3sas_base_free_resources()
8374 if (ioc->chip_phys && ioc->chip) { in mpt3sas_base_free_resources()
8376 ioc->shost_recovery = 1; in mpt3sas_base_free_resources()
8378 ioc->shost_recovery = 0; in mpt3sas_base_free_resources()
8382 mutex_unlock(&ioc->pci_access_mutex); in mpt3sas_base_free_resources()
8387 * mpt3sas_base_attach - attach controller instance
8390 * Return: 0 for success, non-zero for failure.
8401 ioc->cpu_count = num_online_cpus(); in mpt3sas_base_attach()
8404 ioc->cpu_msix_table_sz = last_cpu_id + 1; in mpt3sas_base_attach()
8405 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL); in mpt3sas_base_attach()
8406 ioc->reply_queue_count = 1; in mpt3sas_base_attach()
8407 if (!ioc->cpu_msix_table) { in mpt3sas_base_attach()
8409 r = -ENOMEM; in mpt3sas_base_attach()
8413 if (ioc->is_warpdrive) { in mpt3sas_base_attach()
8414 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz, in mpt3sas_base_attach()
8416 if (!ioc->reply_post_host_index) { in mpt3sas_base_attach()
8418 r = -ENOMEM; in mpt3sas_base_attach()
8423 ioc->smp_affinity_enable = smp_affinity_enable; in mpt3sas_base_attach()
8425 ioc->rdpq_array_enable_assigned = 0; in mpt3sas_base_attach()
8426 ioc->use_32bit_dma = false; in mpt3sas_base_attach()
8427 ioc->dma_mask = 64; in mpt3sas_base_attach()
8428 if (ioc->is_aero_ioc) { in mpt3sas_base_attach()
8429 ioc->base_readl = &_base_readl_aero; in mpt3sas_base_attach()
8430 ioc->base_readl_ext_retry = &_base_readl_ext_retry; in mpt3sas_base_attach()
8432 ioc->base_readl = &_base_readl; in mpt3sas_base_attach()
8433 ioc->base_readl_ext_retry = &_base_readl; in mpt3sas_base_attach()
8439 pci_set_drvdata(ioc->pdev, ioc->shost); in mpt3sas_base_attach()
8447 switch (ioc->hba_mpi_version_belonged) { in mpt3sas_base_attach()
8449 ioc->build_sg_scmd = &_base_build_sg_scmd; in mpt3sas_base_attach()
8450 ioc->build_sg = &_base_build_sg; in mpt3sas_base_attach()
8451 ioc->build_zero_len_sge = &_base_build_zero_len_sge; in mpt3sas_base_attach()
8452 ioc->get_msix_index_for_smlio = &_base_get_msix_index; in mpt3sas_base_attach()
8459 * Target Status - all require the IEEE formatted scatter gather in mpt3sas_base_attach()
8462 ioc->build_sg_scmd = &_base_build_sg_scmd_ieee; in mpt3sas_base_attach()
8463 ioc->build_sg = &_base_build_sg_ieee; in mpt3sas_base_attach()
8464 ioc->build_nvme_prp = &_base_build_nvme_prp; in mpt3sas_base_attach()
8465 ioc->build_zero_len_sge = &_base_build_zero_len_sge_ieee; in mpt3sas_base_attach()
8466 ioc->sge_size_ieee = sizeof(Mpi2IeeeSgeSimple64_t); in mpt3sas_base_attach()
8467 if (ioc->high_iops_queues) in mpt3sas_base_attach()
8468 ioc->get_msix_index_for_smlio = in mpt3sas_base_attach()
8471 ioc->get_msix_index_for_smlio = &_base_get_msix_index; in mpt3sas_base_attach()
8474 if (ioc->atomic_desc_capable) { in mpt3sas_base_attach()
8475 ioc->put_smid_default = &_base_put_smid_default_atomic; in mpt3sas_base_attach()
8476 ioc->put_smid_scsi_io = &_base_put_smid_scsi_io_atomic; in mpt3sas_base_attach()
8477 ioc->put_smid_fast_path = in mpt3sas_base_attach()
8479 ioc->put_smid_hi_priority = in mpt3sas_base_attach()
8482 ioc->put_smid_default = &_base_put_smid_default; in mpt3sas_base_attach()
8483 ioc->put_smid_fast_path = &_base_put_smid_fast_path; in mpt3sas_base_attach()
8484 ioc->put_smid_hi_priority = &_base_put_smid_hi_priority; in mpt3sas_base_attach()
8485 if (ioc->is_mcpu_endpoint) in mpt3sas_base_attach()
8486 ioc->put_smid_scsi_io = in mpt3sas_base_attach()
8489 ioc->put_smid_scsi_io = &_base_put_smid_scsi_io; in mpt3sas_base_attach()
8497 ioc->build_sg_mpi = &_base_build_sg; in mpt3sas_base_attach()
8498 ioc->build_zero_len_sge_mpi = &_base_build_zero_len_sge; in mpt3sas_base_attach()
8504 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, in mpt3sas_base_attach()
8506 if (!ioc->pfacts) { in mpt3sas_base_attach()
8507 r = -ENOMEM; in mpt3sas_base_attach()
8511 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { in mpt3sas_base_attach()
8525 ioc->thresh_hold = irqpoll_weight; in mpt3sas_base_attach()
8527 ioc->thresh_hold = ioc->hba_queue_depth/4; in mpt3sas_base_attach()
8530 init_waitqueue_head(&ioc->reset_wq); in mpt3sas_base_attach()
8533 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8); in mpt3sas_base_attach()
8534 if (ioc->facts.MaxDevHandle % 8) in mpt3sas_base_attach()
8535 ioc->pd_handles_sz++; in mpt3sas_base_attach()
8538 * set_bit()/test_bit(), otherwise out-of-memory touch may occur. in mpt3sas_base_attach()
8540 ioc->pd_handles_sz = ALIGN(ioc->pd_handles_sz, sizeof(unsigned long)); in mpt3sas_base_attach()
8542 ioc->pd_handles = kzalloc(ioc->pd_handles_sz, in mpt3sas_base_attach()
8544 if (!ioc->pd_handles) { in mpt3sas_base_attach()
8545 r = -ENOMEM; in mpt3sas_base_attach()
8548 ioc->blocking_handles = kzalloc(ioc->pd_handles_sz, in mpt3sas_base_attach()
8550 if (!ioc->blocking_handles) { in mpt3sas_base_attach()
8551 r = -ENOMEM; in mpt3sas_base_attach()
8556 ioc->pend_os_device_add_sz = (ioc->facts.MaxDevHandle / 8); in mpt3sas_base_attach()
8557 if (ioc->facts.MaxDevHandle % 8) in mpt3sas_base_attach()
8558 ioc->pend_os_device_add_sz++; in mpt3sas_base_attach()
8562 * set_bit()/test_bit(), otherwise out-of-memory may occur. in mpt3sas_base_attach()
8564 ioc->pend_os_device_add_sz = ALIGN(ioc->pend_os_device_add_sz, in mpt3sas_base_attach()
8566 ioc->pend_os_device_add = kzalloc(ioc->pend_os_device_add_sz, in mpt3sas_base_attach()
8568 if (!ioc->pend_os_device_add) { in mpt3sas_base_attach()
8569 r = -ENOMEM; in mpt3sas_base_attach()
8573 ioc->device_remove_in_progress_sz = ioc->pend_os_device_add_sz; in mpt3sas_base_attach()
8574 ioc->device_remove_in_progress = in mpt3sas_base_attach()
8575 kzalloc(ioc->device_remove_in_progress_sz, GFP_KERNEL); in mpt3sas_base_attach()
8576 if (!ioc->device_remove_in_progress) { in mpt3sas_base_attach()
8577 r = -ENOMEM; in mpt3sas_base_attach()
8581 ioc->fwfault_debug = mpt3sas_fwfault_debug; in mpt3sas_base_attach()
8584 mutex_init(&ioc->base_cmds.mutex); in mpt3sas_base_attach()
8585 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8586 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8589 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8590 ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8593 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8594 ioc->transport_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8595 mutex_init(&ioc->transport_cmds.mutex); in mpt3sas_base_attach()
8598 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8599 ioc->scsih_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8600 mutex_init(&ioc->scsih_cmds.mutex); in mpt3sas_base_attach()
8603 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8604 ioc->tm_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8605 mutex_init(&ioc->tm_cmds.mutex); in mpt3sas_base_attach()
8608 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8609 ioc->config_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8610 mutex_init(&ioc->config_cmds.mutex); in mpt3sas_base_attach()
8613 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8614 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL); in mpt3sas_base_attach()
8615 ioc->ctl_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8616 mutex_init(&ioc->ctl_cmds.mutex); in mpt3sas_base_attach()
8618 if (!ioc->base_cmds.reply || !ioc->port_enable_cmds.reply || in mpt3sas_base_attach()
8619 !ioc->transport_cmds.reply || !ioc->scsih_cmds.reply || in mpt3sas_base_attach()
8620 !ioc->tm_cmds.reply || !ioc->config_cmds.reply || in mpt3sas_base_attach()
8621 !ioc->ctl_cmds.reply || !ioc->ctl_cmds.sense) { in mpt3sas_base_attach()
8622 r = -ENOMEM; in mpt3sas_base_attach()
8627 ioc->event_masks[i] = -1; in mpt3sas_base_attach()
8643 if (ioc->hba_mpi_version_belonged == MPI26_VERSION) { in mpt3sas_base_attach()
8644 if (ioc->is_gen35_ioc) { in mpt3sas_base_attach()
8653 if (r == -EAGAIN) { in mpt3sas_base_attach()
8663 memcpy(&ioc->prev_fw_facts, &ioc->facts, in mpt3sas_base_attach()
8666 ioc->non_operational_loop = 0; in mpt3sas_base_attach()
8667 ioc->ioc_coredump_loop = 0; in mpt3sas_base_attach()
8668 ioc->got_task_abort_from_ioctl = 0; in mpt3sas_base_attach()
8673 ioc->remove_host = 1; in mpt3sas_base_attach()
8677 pci_set_drvdata(ioc->pdev, NULL); in mpt3sas_base_attach()
8678 kfree(ioc->cpu_msix_table); in mpt3sas_base_attach()
8679 if (ioc->is_warpdrive) in mpt3sas_base_attach()
8680 kfree(ioc->reply_post_host_index); in mpt3sas_base_attach()
8681 kfree(ioc->pd_handles); in mpt3sas_base_attach()
8682 kfree(ioc->blocking_handles); in mpt3sas_base_attach()
8683 kfree(ioc->device_remove_in_progress); in mpt3sas_base_attach()
8684 kfree(ioc->pend_os_device_add); in mpt3sas_base_attach()
8685 kfree(ioc->tm_cmds.reply); in mpt3sas_base_attach()
8686 kfree(ioc->transport_cmds.reply); in mpt3sas_base_attach()
8687 kfree(ioc->scsih_cmds.reply); in mpt3sas_base_attach()
8688 kfree(ioc->config_cmds.reply); in mpt3sas_base_attach()
8689 kfree(ioc->base_cmds.reply); in mpt3sas_base_attach()
8690 kfree(ioc->port_enable_cmds.reply); in mpt3sas_base_attach()
8691 kfree(ioc->ctl_cmds.reply); in mpt3sas_base_attach()
8692 kfree(ioc->ctl_cmds.sense); in mpt3sas_base_attach()
8693 kfree(ioc->pfacts); in mpt3sas_base_attach()
8694 ioc->ctl_cmds.reply = NULL; in mpt3sas_base_attach()
8695 ioc->base_cmds.reply = NULL; in mpt3sas_base_attach()
8696 ioc->tm_cmds.reply = NULL; in mpt3sas_base_attach()
8697 ioc->scsih_cmds.reply = NULL; in mpt3sas_base_attach()
8698 ioc->transport_cmds.reply = NULL; in mpt3sas_base_attach()
8699 ioc->config_cmds.reply = NULL; in mpt3sas_base_attach()
8700 ioc->pfacts = NULL; in mpt3sas_base_attach()
8706 * mpt3sas_base_detach - remove controller instance
8718 pci_set_drvdata(ioc->pdev, NULL); in mpt3sas_base_detach()
8719 kfree(ioc->cpu_msix_table); in mpt3sas_base_detach()
8720 if (ioc->is_warpdrive) in mpt3sas_base_detach()
8721 kfree(ioc->reply_post_host_index); in mpt3sas_base_detach()
8722 kfree(ioc->pd_handles); in mpt3sas_base_detach()
8723 kfree(ioc->blocking_handles); in mpt3sas_base_detach()
8724 kfree(ioc->device_remove_in_progress); in mpt3sas_base_detach()
8725 kfree(ioc->pend_os_device_add); in mpt3sas_base_detach()
8726 kfree(ioc->pfacts); in mpt3sas_base_detach()
8727 kfree(ioc->ctl_cmds.reply); in mpt3sas_base_detach()
8728 kfree(ioc->ctl_cmds.sense); in mpt3sas_base_detach()
8729 kfree(ioc->base_cmds.reply); in mpt3sas_base_detach()
8730 kfree(ioc->port_enable_cmds.reply); in mpt3sas_base_detach()
8731 kfree(ioc->tm_cmds.reply); in mpt3sas_base_detach()
8732 kfree(ioc->transport_cmds.reply); in mpt3sas_base_detach()
8733 kfree(ioc->scsih_cmds.reply); in mpt3sas_base_detach()
8734 kfree(ioc->config_cmds.reply); in mpt3sas_base_detach()
8738 * _base_pre_reset_handler - pre reset handler
8749 * _base_clear_outstanding_mpt_commands - clears outstanding mpt commands
8757 if (ioc->transport_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8758 ioc->transport_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8759 mpt3sas_base_free_smid(ioc, ioc->transport_cmds.smid); in _base_clear_outstanding_mpt_commands()
8760 complete(&ioc->transport_cmds.done); in _base_clear_outstanding_mpt_commands()
8762 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8763 ioc->base_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8764 mpt3sas_base_free_smid(ioc, ioc->base_cmds.smid); in _base_clear_outstanding_mpt_commands()
8765 complete(&ioc->base_cmds.done); in _base_clear_outstanding_mpt_commands()
8767 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8768 ioc->port_enable_failed = 1; in _base_clear_outstanding_mpt_commands()
8769 ioc->port_enable_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8770 mpt3sas_base_free_smid(ioc, ioc->port_enable_cmds.smid); in _base_clear_outstanding_mpt_commands()
8771 if (ioc->is_driver_loading) { in _base_clear_outstanding_mpt_commands()
8772 ioc->start_scan_failed = in _base_clear_outstanding_mpt_commands()
8774 ioc->start_scan = 0; in _base_clear_outstanding_mpt_commands()
8776 complete(&ioc->port_enable_cmds.done); in _base_clear_outstanding_mpt_commands()
8779 if (ioc->config_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8780 ioc->config_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8781 mpt3sas_base_free_smid(ioc, ioc->config_cmds.smid); in _base_clear_outstanding_mpt_commands()
8782 ioc->config_cmds.smid = USHRT_MAX; in _base_clear_outstanding_mpt_commands()
8783 complete(&ioc->config_cmds.done); in _base_clear_outstanding_mpt_commands()
8788 * _base_clear_outstanding_commands - clear all outstanding commands
8799 * _base_reset_done_handler - reset done handler
8810 * mpt3sas_wait_for_commands_to_complete - reset controller
8821 ioc->pending_io_count = 0; in mpt3sas_wait_for_commands_to_complete()
8828 ioc->pending_io_count = scsi_host_busy(ioc->shost); in mpt3sas_wait_for_commands_to_complete()
8830 if (!ioc->pending_io_count) in mpt3sas_wait_for_commands_to_complete()
8834 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ); in mpt3sas_wait_for_commands_to_complete()
8838 * _base_check_ioc_facts_changes - Look for increase/decrease of IOCFacts
8850 struct mpt3sas_facts *old_facts = &ioc->prev_fw_facts; in _base_check_ioc_facts_changes()
8852 if (ioc->facts.MaxDevHandle > old_facts->MaxDevHandle) { in _base_check_ioc_facts_changes()
8853 pd_handles_sz = (ioc->facts.MaxDevHandle / 8); in _base_check_ioc_facts_changes()
8854 if (ioc->facts.MaxDevHandle % 8) in _base_check_ioc_facts_changes()
8859 * set_bit()/test_bit(), otherwise out-of-memory touch may in _base_check_ioc_facts_changes()
8863 pd_handles = krealloc(ioc->pd_handles, pd_handles_sz, in _base_check_ioc_facts_changes()
8869 return -ENOMEM; in _base_check_ioc_facts_changes()
8871 memset(pd_handles + ioc->pd_handles_sz, 0, in _base_check_ioc_facts_changes()
8872 (pd_handles_sz - ioc->pd_handles_sz)); in _base_check_ioc_facts_changes()
8873 ioc->pd_handles = pd_handles; in _base_check_ioc_facts_changes()
8875 blocking_handles = krealloc(ioc->blocking_handles, in _base_check_ioc_facts_changes()
8882 return -ENOMEM; in _base_check_ioc_facts_changes()
8884 memset(blocking_handles + ioc->pd_handles_sz, 0, in _base_check_ioc_facts_changes()
8885 (pd_handles_sz - ioc->pd_handles_sz)); in _base_check_ioc_facts_changes()
8886 ioc->blocking_handles = blocking_handles; in _base_check_ioc_facts_changes()
8887 ioc->pd_handles_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
8889 pend_os_device_add = krealloc(ioc->pend_os_device_add, in _base_check_ioc_facts_changes()
8895 return -ENOMEM; in _base_check_ioc_facts_changes()
8897 memset(pend_os_device_add + ioc->pend_os_device_add_sz, 0, in _base_check_ioc_facts_changes()
8898 (pd_handles_sz - ioc->pend_os_device_add_sz)); in _base_check_ioc_facts_changes()
8899 ioc->pend_os_device_add = pend_os_device_add; in _base_check_ioc_facts_changes()
8900 ioc->pend_os_device_add_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
8903 ioc->device_remove_in_progress, pd_handles_sz, GFP_KERNEL); in _base_check_ioc_facts_changes()
8908 return -ENOMEM; in _base_check_ioc_facts_changes()
8911 ioc->device_remove_in_progress_sz, 0, in _base_check_ioc_facts_changes()
8912 (pd_handles_sz - ioc->device_remove_in_progress_sz)); in _base_check_ioc_facts_changes()
8913 ioc->device_remove_in_progress = device_remove_in_progress; in _base_check_ioc_facts_changes()
8914 ioc->device_remove_in_progress_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
8917 memcpy(&ioc->prev_fw_facts, &ioc->facts, sizeof(struct mpt3sas_facts)); in _base_check_ioc_facts_changes()
8922 * mpt3sas_base_hard_reset_handler - reset controller
8926 * Return: 0 for success, non-zero for failure.
8939 if (ioc->pci_error_recovery) { in mpt3sas_base_hard_reset_handler()
8949 mutex_lock(&ioc->reset_in_progress_mutex); in mpt3sas_base_hard_reset_handler()
8951 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
8952 ioc->shost_recovery = 1; in mpt3sas_base_hard_reset_handler()
8953 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
8955 if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] & in mpt3sas_base_hard_reset_handler()
8957 (!(ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] & in mpt3sas_base_hard_reset_handler()
8965 ioc->htb_rel.trigger_info_dwords[1] = in mpt3sas_base_hard_reset_handler()
8981 if (ioc->is_driver_loading && ioc->port_enable_failed) { in mpt3sas_base_hard_reset_handler()
8982 ioc->remove_host = 1; in mpt3sas_base_hard_reset_handler()
8983 r = -EFAULT; in mpt3sas_base_hard_reset_handler()
8997 if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable) in mpt3sas_base_hard_reset_handler()
9000 " firmware version is running\n", ioc->name); in mpt3sas_base_hard_reset_handler()
9009 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
9010 ioc->shost_recovery = 0; in mpt3sas_base_hard_reset_handler()
9011 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
9012 ioc->ioc_reset_count++; in mpt3sas_base_hard_reset_handler()
9013 mutex_unlock(&ioc->reset_in_progress_mutex); in mpt3sas_base_hard_reset_handler()