94 	struct npcm7xx_gpio	gpio_bank[NPCM7XX_GPIO_BANK_NUM];  member
1487 		&npcm->gpio_bank[pin / NPCM7XX_GPIO_PER_BANK];  in npcm7xx_get_drive_strength()
1513 		&npcm->gpio_bank[pin / NPCM7XX_GPIO_PER_BANK];  in npcm7xx_set_drive_strength()
1659 		&npcm->gpio_bank[offset / NPCM7XX_GPIO_PER_BANK];  in npcm_gpio_set_direction()
1689 		&npcm->gpio_bank[pin / NPCM7XX_GPIO_PER_BANK];  in npcm7xx_config_get()
1752 		&npcm->gpio_bank[pin / NPCM7XX_GPIO_PER_BANK];  in npcm7xx_config_set_one()
1839 		pctrl->gpio_bank[id].base = fwnode_iomap(child, 0);  in npcm7xx_gpio_of()
1840 		if (!pctrl->gpio_bank[id].base)  in npcm7xx_gpio_of()
1843 		ret = bgpio_init(&pctrl->gpio_bank[id].gc, dev, 4,  in npcm7xx_gpio_of()
1844 				 pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DIN,  in npcm7xx_gpio_of()
1845 				 pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DOUT,  in npcm7xx_gpio_of()
1848 				 pctrl->gpio_bank[id].base + NPCM7XX_GP_N_IEM,  in npcm7xx_gpio_of()
1866 		pctrl->gpio_bank[id].irq = ret;  in npcm7xx_gpio_of()
1867 		pctrl->gpio_bank[id].irqbase = id * NPCM7XX_GPIO_PER_BANK;  in npcm7xx_gpio_of()
1868 		pctrl->gpio_bank[id].pinctrl_id = args.args[0];  in npcm7xx_gpio_of()
1869 		pctrl->gpio_bank[id].gc.base = args.args[1];  in npcm7xx_gpio_of()
1870 		pctrl->gpio_bank[id].gc.ngpio = args.args[2];  in npcm7xx_gpio_of()
1871 		pctrl->gpio_bank[id].gc.owner = THIS_MODULE;  in npcm7xx_gpio_of()
1872 		pctrl->gpio_bank[id].gc.parent = dev;  in npcm7xx_gpio_of()
1873 		pctrl->gpio_bank[id].gc.fwnode = child;  in npcm7xx_gpio_of()
1874 		pctrl->gpio_bank[id].gc.label = devm_kasprintf(dev, GFP_KERNEL, "%pfw", child);  in npcm7xx_gpio_of()
1875 		if (pctrl->gpio_bank[id].gc.label == NULL)  in npcm7xx_gpio_of()
1878 		pctrl->gpio_bank[id].gc.dbg_show = npcmgpio_dbg_show;  in npcm7xx_gpio_of()
1879 		pctrl->gpio_bank[id].direction_input = pctrl->gpio_bank[id].gc.direction_input;  in npcm7xx_gpio_of()
1880 		pctrl->gpio_bank[id].gc.direction_input = npcmgpio_direction_input;  in npcm7xx_gpio_of()
1881 		pctrl->gpio_bank[id].direction_output = pctrl->gpio_bank[id].gc.direction_output;  in npcm7xx_gpio_of()
1882 		pctrl->gpio_bank[id].gc.direction_output = npcmgpio_direction_output;  in npcm7xx_gpio_of()
1883 		pctrl->gpio_bank[id].request = pctrl->gpio_bank[id].gc.request;  in npcm7xx_gpio_of()
1884 		pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request;  in npcm7xx_gpio_of()
1885 		pctrl->gpio_bank[id].gc.free = pinctrl_gpio_free;  in npcm7xx_gpio_of()
1900 		girq = &pctrl->gpio_bank[id].gc.irq;  in npcm7xx_gpio_register()
1911 		girq->parents[0] = pctrl->gpio_bank[id].irq;  in npcm7xx_gpio_register()
1915 					     &pctrl->gpio_bank[id].gc,  in npcm7xx_gpio_register()
1916 					     &pctrl->gpio_bank[id]);  in npcm7xx_gpio_register()
1922 		ret = gpiochip_add_pin_range(&pctrl->gpio_bank[id].gc,  in npcm7xx_gpio_register()
1924 					     pctrl->gpio_bank[id].pinctrl_id,  in npcm7xx_gpio_register()
1925 					     pctrl->gpio_bank[id].gc.base,  in npcm7xx_gpio_register()
1926 					     pctrl->gpio_bank[id].gc.ngpio);  in npcm7xx_gpio_register()
1929 			gpiochip_remove(&pctrl->gpio_bank[id].gc);  in npcm7xx_gpio_register()
1938 		gpiochip_remove(&pctrl->gpio_bank[id - 1].gc);  in npcm7xx_gpio_register()