Lines Matching +full:dual +full:- +full:radio
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
20 * AR5416 MAC based PCI devices and AR518 MAC based PCI-Express
21 * devices have either an external AR2133 analog front end radio for single
22 * band 2.4 GHz communication or an AR5133 analog front end radio for dual
27 * into a single-chip and require less programming.
29 * The following single-chips exist with a respective embedded radio:
31 * AR9280 - 11n dual-band 2x2 MIMO for PCIe
32 * AR9281 - 11n single-band 1x2 MIMO for PCIe
33 * AR9285 - 11n single-band 1x1 for PCIe
34 * AR9287 - 11n single-band 2x2 MIMO for PCIe
36 * AR9220 - 11n dual-band 2x2 MIMO for PCI
37 * AR9223 - 11n single-band 2x2 MIMO for PCI
39 * AR9287 - 11n single-band 1x1 MIMO for USB
46 * ar9002_hw_set_channel - set channel on single-chip device
50 * This is the function to change channel on single-chip devices, that is
91 REG_WRITE_ARRAY(&ah->iniCckfirJapan2484, in ar9002_hw_set_channel()
94 REG_WRITE_ARRAY(&ah->iniCckfirNormal, in ar9002_hw_set_channel()
112 switch (ah->eep_ops->get_eeprom(ah, EEP_FRAC_N_5G)) { in ar9002_hw_set_channel()
155 ah->curchan = chan; in ar9002_hw_set_channel()
161 * ar9002_hw_spur_mitigate - convert baseband spur frequency
165 * For single-chip solutions. Converts to baseband spur frequency given the
189 cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz); in ar9002_hw_spur_mitigate()
199 cur_bb_spur = cur_bb_spur - freq; in ar9002_hw_spur_mitigate()
202 if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT40) && in ar9002_hw_spur_mitigate()
207 } else if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT20) && in ar9002_hw_spur_mitigate()
248 bb_spur_off = bb_spur - 10; in ar9002_hw_spur_mitigate()
297 ah->originalGain[i] = in ar9002_olc_init()
300 ah->PDADCdelta = 0; in ar9002_olc_init()
340 if (IS_CHAN_HT40(ah->curchan)) in ar9002_hw_do_getnf()
343 if (!(ah->rxchainmask & BIT(1))) in ar9002_hw_do_getnf()
350 if (IS_CHAN_HT40(ah->curchan)) in ar9002_hw_do_getnf()
357 ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9285_2GHZ; in ar9002_hw_set_nf_limits()
358 ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9285_2GHZ; in ar9002_hw_set_nf_limits()
359 ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9285_2GHZ; in ar9002_hw_set_nf_limits()
361 ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9287_2GHZ; in ar9002_hw_set_nf_limits()
362 ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9287_2GHZ; in ar9002_hw_set_nf_limits()
363 ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9287_2GHZ; in ar9002_hw_set_nf_limits()
365 ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9271_2GHZ; in ar9002_hw_set_nf_limits()
366 ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9271_2GHZ; in ar9002_hw_set_nf_limits()
367 ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9271_2GHZ; in ar9002_hw_set_nf_limits()
369 ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9280_2GHZ; in ar9002_hw_set_nf_limits()
370 ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9280_2GHZ; in ar9002_hw_set_nf_limits()
371 ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9280_2GHZ; in ar9002_hw_set_nf_limits()
372 ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9280_5GHZ; in ar9002_hw_set_nf_limits()
373 ah->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_9280_5GHZ; in ar9002_hw_set_nf_limits()
374 ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_9280_5GHZ; in ar9002_hw_set_nf_limits()
384 antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >> in ar9002_hw_antdiv_comb_conf_get()
386 antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >> in ar9002_hw_antdiv_comb_conf_get()
388 antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >> in ar9002_hw_antdiv_comb_conf_get()
390 antconf->lna1_lna2_switch_delta = -1; in ar9002_hw_antdiv_comb_conf_get()
391 antconf->lna1_lna2_delta = -3; in ar9002_hw_antdiv_comb_conf_get()
392 antconf->div_group = 0; in ar9002_hw_antdiv_comb_conf_get()
404 regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S) in ar9002_hw_antdiv_comb_conf_set()
406 regval |= ((antconf->alt_lna_conf << AR_PHY_9285_ANT_DIV_ALT_LNACONF_S) in ar9002_hw_antdiv_comb_conf_set()
408 regval |= ((antconf->fast_div_bias << AR_PHY_9285_FAST_DIV_BIAS_S) in ar9002_hw_antdiv_comb_conf_set()
418 struct ath_btcoex_hw *btcoex = &ah->btcoex_hw; in ar9002_hw_set_bt_ant_diversity()
429 btcoex->bt_coex_mode2 &= (~(AR_BT_DISABLE_BT_ANT)); in ar9002_hw_set_bt_ant_diversity()
430 REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2); in ar9002_hw_set_bt_ant_diversity()
444 btcoex->bt_coex_mode2 |= AR_BT_DISABLE_BT_ANT; in ar9002_hw_set_bt_ant_diversity()
445 REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2); in ar9002_hw_set_bt_ant_diversity()
483 if (!param->enabled) { in ar9002_hw_spectral_scan_config()
496 if (param->short_repeat) in ar9002_hw_spectral_scan_config()
505 count = param->count; in ar9002_hw_spectral_scan_config()
506 if (param->endless) { in ar9002_hw_spectral_scan_config()
527 AR_PHY_SPECTRAL_SCAN_PERIOD, param->period); in ar9002_hw_spectral_scan_config()
529 AR_PHY_SPECTRAL_SCAN_FFT_PERIOD, param->fft_period); in ar9002_hw_spectral_scan_config()
580 priv_ops->set_rf_regs = NULL; in ar9002_hw_attach_phy_ops()
581 priv_ops->rf_set_freq = ar9002_hw_set_channel; in ar9002_hw_attach_phy_ops()
582 priv_ops->spur_mitigate_freq = ar9002_hw_spur_mitigate; in ar9002_hw_attach_phy_ops()
583 priv_ops->olc_init = ar9002_olc_init; in ar9002_hw_attach_phy_ops()
584 priv_ops->compute_pll_control = ar9002_hw_compute_pll_control; in ar9002_hw_attach_phy_ops()
585 priv_ops->do_getnf = ar9002_hw_do_getnf; in ar9002_hw_attach_phy_ops()
587 ops->antdiv_comb_conf_get = ar9002_hw_antdiv_comb_conf_get; in ar9002_hw_attach_phy_ops()
588 ops->antdiv_comb_conf_set = ar9002_hw_antdiv_comb_conf_set; in ar9002_hw_attach_phy_ops()
589 ops->spectral_scan_config = ar9002_hw_spectral_scan_config; in ar9002_hw_attach_phy_ops()
590 ops->spectral_scan_trigger = ar9002_hw_spectral_scan_trigger; in ar9002_hw_attach_phy_ops()
591 ops->spectral_scan_wait = ar9002_hw_spectral_scan_wait; in ar9002_hw_attach_phy_ops()
594 ops->set_bt_ant_diversity = ar9002_hw_set_bt_ant_diversity; in ar9002_hw_attach_phy_ops()
596 ops->tx99_start = ar9002_hw_tx99_start; in ar9002_hw_attach_phy_ops()
597 ops->tx99_stop = ar9002_hw_tx99_stop; in ar9002_hw_attach_phy_ops()