Lines Matching +full:10 +full:base +full:- +full:t1l
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
7 * Copyright (c) 2002-2003 TiVo Inc.
48 if (urb->actual_length < 8) in asix_status()
51 event = urb->transfer_buffer; in asix_status()
52 link = event->link & 0x01; in asix_status()
53 if (netif_carrier_ok(dev->net) != link) { in asix_status()
55 netdev_dbg(dev->net, "Link Status is: %d\n", link); in asix_status()
62 eth_hw_addr_set(dev->net, addr); in asix_set_netdev_dev_addr()
64 netdev_info(dev->net, "invalid hw address, using random\n"); in asix_set_netdev_dev_addr()
65 eth_hw_addr_random(dev->net); in asix_set_netdev_dev_addr()
78 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in asix_get_phyid()
91 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in asix_get_phyid()
104 return mii_link_ok(&dev->mii); in asix_get_link()
111 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); in asix_ioctl()
135 struct asix_data *data = (struct asix_data *)&dev->data; in ax88172_set_multicast()
138 if (net->flags & IFF_PROMISC) { in ax88172_set_multicast()
140 } else if (net->flags & IFF_ALLMULTI || in ax88172_set_multicast()
146 /* We use the 20 byte dev->data in ax88172_set_multicast()
153 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); in ax88172_set_multicast()
157 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; in ax88172_set_multicast()
158 data->multi_filter[crc_bits >> 3] |= in ax88172_set_multicast()
163 AX_MCAST_FILTER_SIZE, data->multi_filter); in ax88172_set_multicast()
176 mii_check_media(&dev->mii, 1, 1); in ax88172_link_reset()
177 mii_ethtool_gset(&dev->mii, &ecmd); in ax88172_link_reset()
183 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", in ax88172_link_reset()
208 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits); in asix_phy_reset()
214 while (timeout--) { in asix_phy_reset()
215 if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR) in asix_phy_reset()
222 netdev_err(dev->net, "BMCR_RESET timeout on phy_id %d\n", in asix_phy_reset()
223 dev->mii.phy_id); in asix_phy_reset()
231 unsigned long gpio_bits = dev->driver_info->data; in ax88172_bind()
238 for (i = 2; i >= 0; i--) { in ax88172_bind()
254 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n", in ax88172_bind()
262 dev->mii.dev = dev->net; in ax88172_bind()
263 dev->mii.mdio_read = asix_mdio_read; in ax88172_bind()
264 dev->mii.mdio_write = asix_mdio_write; in ax88172_bind()
265 dev->mii.phy_id_mask = 0x3f; in ax88172_bind()
266 dev->mii.reg_num_mask = 0x1f; in ax88172_bind()
268 dev->mii.phy_id = asix_read_phy_addr(dev, true); in ax88172_bind()
269 if (dev->mii.phy_id < 0) in ax88172_bind()
270 return dev->mii.phy_id; in ax88172_bind()
272 dev->net->netdev_ops = &ax88172_netdev_ops; in ax88172_bind()
273 dev->net->ethtool_ops = &ax88172_ethtool_ops; in ax88172_bind()
274 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */ in ax88172_bind()
275 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */ in ax88172_bind()
278 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, in ax88172_bind()
280 mii_nway_restart(&dev->mii); in ax88172_bind()
304 return -EOPNOTSUPP; in ax88772_ethtool_get_sset_count()
312 struct asix_common_private *priv = dev->driver_priv; in ax88772_ethtool_get_pauseparam()
314 phylink_ethtool_get_pauseparam(priv->phylink, pause); in ax88772_ethtool_get_pauseparam()
321 struct asix_common_private *priv = dev->driver_priv; in ax88772_ethtool_set_pauseparam()
323 return phylink_ethtool_set_pauseparam(priv->phylink, pause); in ax88772_ethtool_set_pauseparam()
348 struct asix_data *data = (struct asix_data *)&dev->data; in ax88772_reset()
349 struct asix_common_private *priv = dev->driver_priv; in ax88772_reset()
353 ether_addr_copy(data->mac_addr, dev->net->dev_addr); in ax88772_reset()
355 ETH_ALEN, data->mac_addr, 0); in ax88772_reset()
368 phylink_start(priv->phylink); in ax88772_reset()
378 struct asix_data *data = (struct asix_data *)&dev->data; in ax88772_hw_reset()
379 struct asix_common_private *priv = dev->driver_priv; in ax88772_hw_reset()
388 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy, in ax88772_hw_reset()
391 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); in ax88772_hw_reset()
395 if (priv->embd_phy) { in ax88772_hw_reset()
421 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id, in ax88772_hw_reset()
423 ret = -EIO; in ax88772_hw_reset()
439 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret); in ax88772_hw_reset()
444 ether_addr_copy(data->mac_addr, dev->net->dev_addr); in ax88772_hw_reset()
446 ETH_ALEN, data->mac_addr, in_pm); in ax88772_hw_reset()
456 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", in ax88772_hw_reset()
460 netdev_dbg(dev->net, in ax88772_hw_reset()
472 struct asix_data *data = (struct asix_data *)&dev->data; in ax88772a_hw_reset()
473 struct asix_common_private *priv = dev->driver_priv; in ax88772a_hw_reset()
481 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy | in ax88772a_hw_reset()
484 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); in ax88772a_hw_reset()
511 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id, in ax88772a_hw_reset()
513 ret = -1; in ax88772a_hw_reset()
517 if (priv->chipcode == AX_AX88772B_CHIPCODE) { in ax88772a_hw_reset()
521 netdev_dbg(dev->net, "Write BQ setting failed: %d\n", in ax88772a_hw_reset()
525 } else if (priv->chipcode == AX_AX88772A_CHIPCODE) { in ax88772a_hw_reset()
527 phy14h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id, in ax88772a_hw_reset()
529 phy15h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id, in ax88772a_hw_reset()
531 phy16h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id, in ax88772a_hw_reset()
534 netdev_dbg(dev->net, in ax88772a_hw_reset()
540 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, in ax88772a_hw_reset()
544 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, in ax88772a_hw_reset()
548 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, in ax88772a_hw_reset()
557 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret); in ax88772a_hw_reset()
562 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); in ax88772a_hw_reset()
564 data->mac_addr, in_pm); in ax88772a_hw_reset()
583 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", in ax88772a_hw_reset()
587 netdev_dbg(dev->net, in ax88772a_hw_reset()
612 struct asix_common_private *priv = dev->driver_priv; in ax88772_suspend()
615 if (netif_running(dev->net)) { in ax88772_suspend()
617 phylink_suspend(priv->phylink, false); in ax88772_suspend()
626 netdev_dbg(dev->net, "ax88772_suspend: medium=0x%04x\n", in ax88772_suspend()
632 * - asix_suspend()/asix_resume() are invoked for both runtime PM and
633 * system-wide suspend/resume. For struct usb_driver the ->resume()
637 * - The MAC driver must hold RTNL when calling phylink interfaces such as
640 * - Taking RTNL and doing MDIO from a runtime-PM resume callback (while
648 struct asix_common_private *priv = dev->driver_priv; in asix_suspend()
650 if (priv && priv->suspend) in asix_suspend()
651 priv->suspend(dev); in asix_suspend()
658 struct asix_common_private *priv = dev->driver_priv; in ax88772_resume()
662 if (!priv->reset(dev, 1)) in ax88772_resume()
665 if (netif_running(dev->net)) { in ax88772_resume()
667 phylink_resume(priv->phylink); in ax88772_resume()
675 struct asix_common_private *priv = dev->driver_priv; in asix_resume()
677 if (priv && priv->resume) in asix_resume()
678 priv->resume(dev); in asix_resume()
685 struct asix_common_private *priv = dev->driver_priv; in ax88772_init_mdio()
688 priv->mdio = mdiobus_alloc(); in ax88772_init_mdio()
689 if (!priv->mdio) in ax88772_init_mdio()
690 return -ENOMEM; in ax88772_init_mdio()
692 priv->mdio->priv = dev; in ax88772_init_mdio()
693 priv->mdio->read = &asix_mdio_bus_read; in ax88772_init_mdio()
694 priv->mdio->write = &asix_mdio_bus_write; in ax88772_init_mdio()
695 priv->mdio->name = "Asix MDIO Bus"; in ax88772_init_mdio()
696 priv->mdio->phy_mask = ~(BIT(priv->phy_addr & 0x1f) | BIT(AX_EMBD_PHY_ADDR)); in ax88772_init_mdio()
697 /* mii bus name is usb-<usb bus number>-<usb device number> */ in ax88772_init_mdio()
698 snprintf(priv->mdio->id, MII_BUS_ID_SIZE, "usb-%03d:%03d", in ax88772_init_mdio()
699 dev->udev->bus->busnum, dev->udev->devnum); in ax88772_init_mdio()
701 ret = mdiobus_register(priv->mdio); in ax88772_init_mdio()
703 netdev_err(dev->net, "Could not register MDIO bus (err %d)\n", ret); in ax88772_init_mdio()
704 mdiobus_free(priv->mdio); in ax88772_init_mdio()
705 priv->mdio = NULL; in ax88772_init_mdio()
713 mdiobus_unregister(priv->mdio); in ax88772_mdio_unregister()
714 mdiobus_free(priv->mdio); in ax88772_mdio_unregister()
719 struct asix_common_private *priv = dev->driver_priv; in ax88772_init_phy()
722 priv->phydev = mdiobus_get_phy(priv->mdio, priv->phy_addr); in ax88772_init_phy()
723 if (!priv->phydev) { in ax88772_init_phy()
724 netdev_err(dev->net, "Could not find PHY\n"); in ax88772_init_phy()
725 return -ENODEV; in ax88772_init_phy()
728 ret = phylink_connect_phy(priv->phylink, priv->phydev); in ax88772_init_phy()
730 netdev_err(dev->net, "Could not connect PHY\n"); in ax88772_init_phy()
734 phy_suspend(priv->phydev); in ax88772_init_phy()
735 priv->phydev->mac_managed_pm = true; in ax88772_init_phy()
737 phy_attached_info(priv->phydev); in ax88772_init_phy()
739 if (priv->embd_phy) in ax88772_init_phy()
746 priv->phydev_int = mdiobus_get_phy(priv->mdio, AX_EMBD_PHY_ADDR); in ax88772_init_phy()
747 if (!priv->phydev_int) { in ax88772_init_phy()
749 phylink_disconnect_phy(priv->phylink); in ax88772_init_phy()
751 netdev_err(dev->net, "Could not find internal PHY\n"); in ax88772_init_phy()
752 return -ENODEV; in ax88772_init_phy()
755 priv->phydev_int->mac_managed_pm = true; in ax88772_init_phy()
756 phy_suspend(priv->phydev_int); in ax88772_init_phy()
770 struct usbnet *dev = netdev_priv(to_net_dev(config->dev)); in ax88772_mac_link_down()
781 struct usbnet *dev = netdev_priv(to_net_dev(config->dev)); in ax88772_mac_link_up()
813 struct asix_common_private *priv = dev->driver_priv; in ax88772_phylink_setup()
817 priv->phylink_config.dev = &dev->net->dev; in ax88772_phylink_setup()
818 priv->phylink_config.type = PHYLINK_NETDEV; in ax88772_phylink_setup()
819 priv->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | in ax88772_phylink_setup()
823 priv->phylink_config.supported_interfaces); in ax88772_phylink_setup()
825 priv->phylink_config.supported_interfaces); in ax88772_phylink_setup()
827 if (priv->embd_phy) in ax88772_phylink_setup()
832 phylink = phylink_create(&priv->phylink_config, dev->net->dev.fwnode, in ax88772_phylink_setup()
837 priv->phylink = phylink; in ax88772_phylink_setup()
847 priv = devm_kzalloc(&dev->udev->dev, sizeof(*priv), GFP_KERNEL); in ax88772_bind()
849 return -ENOMEM; in ax88772_bind()
851 dev->driver_priv = priv; in ax88772_bind()
858 if (!eth_platform_get_mac_address(&dev->udev->dev, buf)) { in ax88772_bind()
859 netif_dbg(dev, ifup, dev->net, in ax88772_bind()
863 if (dev->driver_info->data & FLAG_EEPROM_MAC) { in ax88772_bind()
877 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", in ax88772_bind()
885 dev->net->netdev_ops = &ax88772_netdev_ops; in ax88772_bind()
886 dev->net->ethtool_ops = &ax88772_ethtool_ops; in ax88772_bind()
887 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */ in ax88772_bind()
888 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */ in ax88772_bind()
894 priv->phy_addr = ret; in ax88772_bind()
895 priv->embd_phy = ((priv->phy_addr & 0x1f) == AX_EMBD_PHY_ADDR); in ax88772_bind()
898 &priv->chipcode, 0); in ax88772_bind()
900 netdev_dbg(dev->net, "Failed to read STATMNGSTS_REG: %d\n", ret); in ax88772_bind()
904 priv->chipcode &= AX_CHIPCODE_MASK; in ax88772_bind()
906 priv->resume = ax88772_resume; in ax88772_bind()
907 priv->suspend = ax88772_suspend; in ax88772_bind()
908 if (priv->chipcode == AX_AX88772_CHIPCODE) in ax88772_bind()
909 priv->reset = ax88772_hw_reset; in ax88772_bind()
911 priv->reset = ax88772a_hw_reset; in ax88772_bind()
913 ret = priv->reset(dev, 0); in ax88772_bind()
915 netdev_dbg(dev->net, "Failed to reset AX88772: %d\n", ret); in ax88772_bind()
920 if (dev->driver_info->flags & FLAG_FRAMING_AX) { in ax88772_bind()
921 /* hard_mtu is still the default - the device does not support in ax88772_bind()
923 dev->rx_urb_size = 2048; in ax88772_bind()
926 priv->presvd_phy_bmcr = 0; in ax88772_bind()
927 priv->presvd_phy_advertise = 0; in ax88772_bind()
941 /* Keep this interface runtime-PM active by taking a usage ref. in ax88772_bind()
946 pm_runtime_get_noresume(&intf->dev); in ax88772_bind()
951 phylink_destroy(priv->phylink); in ax88772_bind()
960 struct asix_common_private *priv = dev->driver_priv; in ax88772_stop()
962 phylink_stop(priv->phylink); in ax88772_stop()
969 struct asix_common_private *priv = dev->driver_priv; in ax88772_unbind()
972 phylink_disconnect_phy(priv->phylink); in ax88772_unbind()
974 phylink_destroy(priv->phylink); in ax88772_unbind()
976 asix_rx_fixup_common_free(dev->driver_priv); in ax88772_unbind()
978 pm_runtime_put(&intf->dev); in ax88772_unbind()
983 asix_rx_fixup_common_free(dev->driver_priv); in ax88178_unbind()
984 kfree(dev->driver_priv); in ax88178_unbind()
1004 struct asix_data *data = (struct asix_data *)&dev->data; in marvell_phy_init()
1007 netdev_dbg(dev->net, "marvell_phy_init()\n"); in marvell_phy_init()
1009 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS); in marvell_phy_init()
1010 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg); in marvell_phy_init()
1012 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL, in marvell_phy_init()
1015 if (data->ledmode) { in marvell_phy_init()
1016 reg = asix_mdio_read(dev->net, dev->mii.phy_id, in marvell_phy_init()
1018 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg); in marvell_phy_init()
1022 asix_mdio_write(dev->net, dev->mii.phy_id, in marvell_phy_init()
1025 reg = asix_mdio_read(dev->net, dev->mii.phy_id, in marvell_phy_init()
1027 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg); in marvell_phy_init()
1035 struct asix_data *data = (struct asix_data *)&dev->data; in rtl8211cl_phy_init()
1037 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n"); in rtl8211cl_phy_init()
1039 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005); in rtl8211cl_phy_init()
1040 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0); in rtl8211cl_phy_init()
1041 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01, in rtl8211cl_phy_init()
1042 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080); in rtl8211cl_phy_init()
1043 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); in rtl8211cl_phy_init()
1045 if (data->ledmode == 12) { in rtl8211cl_phy_init()
1046 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002); in rtl8211cl_phy_init()
1047 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb); in rtl8211cl_phy_init()
1048 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); in rtl8211cl_phy_init()
1056 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL); in marvell_led_status()
1058 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg); in marvell_led_status()
1060 /* Clear out the center LED bits - 0x03F0 */ in marvell_led_status()
1074 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg); in marvell_led_status()
1075 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg); in marvell_led_status()
1082 struct asix_data *data = (struct asix_data *)&dev->data; in ax88178_reset()
1091 netdev_dbg(dev->net, "Failed to read GPIOS: %d\n", ret); in ax88178_reset()
1095 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status); in ax88178_reset()
1100 netdev_dbg(dev->net, "Failed to read EEPROM: %d\n", ret); in ax88178_reset()
1106 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom); in ax88178_reset()
1109 data->phymode = PHY_MODE_MARVELL; in ax88178_reset()
1110 data->ledmode = 0; in ax88178_reset()
1113 data->phymode = le16_to_cpu(eeprom) & 0x7F; in ax88178_reset()
1114 data->ledmode = le16_to_cpu(eeprom) >> 8; in ax88178_reset()
1117 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode); in ax88178_reset()
1127 netdev_dbg(dev->net, "gpio phymode == 1 path\n"); in ax88178_reset()
1134 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid); in ax88178_reset()
1147 if (data->phymode == PHY_MODE_MARVELL) { in ax88178_reset()
1150 } else if (data->phymode == PHY_MODE_RTL8211CL) in ax88178_reset()
1154 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, in ax88178_reset()
1156 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, in ax88178_reset()
1160 mii_nway_restart(&dev->mii); in ax88178_reset()
1163 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); in ax88178_reset()
1165 data->mac_addr, 0); in ax88178_reset()
1180 struct asix_data *data = (struct asix_data *)&dev->data; in ax88178_link_reset()
1183 netdev_dbg(dev->net, "ax88178_link_reset()\n"); in ax88178_link_reset()
1185 mii_check_media(&dev->mii, 1, 1); in ax88178_link_reset()
1186 mii_ethtool_gset(&dev->mii, &ecmd); in ax88178_link_reset()
1204 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", in ax88178_link_reset()
1209 if (data->phymode == PHY_MODE_MARVELL && data->ledmode) in ax88178_link_reset()
1220 int old_rx_urb_size = dev->rx_urb_size; in ax88178_set_mfb()
1222 if (dev->hard_mtu < 2048) { in ax88178_set_mfb()
1223 dev->rx_urb_size = 2048; in ax88178_set_mfb()
1225 } else if (dev->hard_mtu < 4096) { in ax88178_set_mfb()
1226 dev->rx_urb_size = 4096; in ax88178_set_mfb()
1228 } else if (dev->hard_mtu < 8192) { in ax88178_set_mfb()
1229 dev->rx_urb_size = 8192; in ax88178_set_mfb()
1231 } else if (dev->hard_mtu < 16384) { in ax88178_set_mfb()
1232 dev->rx_urb_size = 16384; in ax88178_set_mfb()
1240 if (dev->net->mtu > 1500) in ax88178_set_mfb()
1246 if (dev->rx_urb_size > old_rx_urb_size) in ax88178_set_mfb()
1253 int ll_mtu = new_mtu + net->hard_header_len + 4; in ax88178_change_mtu()
1255 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu); in ax88178_change_mtu()
1257 if ((ll_mtu % dev->maxpacket) == 0) in ax88178_change_mtu()
1258 return -EDOM; in ax88178_change_mtu()
1260 WRITE_ONCE(net->mtu, new_mtu); in ax88178_change_mtu()
1261 dev->hard_mtu = net->mtu + net->hard_header_len; in ax88178_change_mtu()
1295 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret); in ax88178_bind()
1302 dev->mii.dev = dev->net; in ax88178_bind()
1303 dev->mii.mdio_read = asix_mdio_read; in ax88178_bind()
1304 dev->mii.mdio_write = asix_mdio_write; in ax88178_bind()
1305 dev->mii.phy_id_mask = 0x1f; in ax88178_bind()
1306 dev->mii.reg_num_mask = 0xff; in ax88178_bind()
1307 dev->mii.supports_gmii = 1; in ax88178_bind()
1309 dev->mii.phy_id = asix_read_phy_addr(dev, true); in ax88178_bind()
1310 if (dev->mii.phy_id < 0) in ax88178_bind()
1311 return dev->mii.phy_id; in ax88178_bind()
1313 dev->net->netdev_ops = &ax88178_netdev_ops; in ax88178_bind()
1314 dev->net->ethtool_ops = &ax88178_ethtool_ops; in ax88178_bind()
1315 dev->net->max_mtu = 16384 - (dev->net->hard_header_len + 4); in ax88178_bind()
1325 if (dev->driver_info->flags & FLAG_FRAMING_AX) { in ax88178_bind()
1326 /* hard_mtu is still the default - the device does not support in ax88178_bind()
1328 dev->rx_urb_size = 2048; in ax88178_bind()
1331 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL); in ax88178_bind()
1332 if (!dev->driver_priv) in ax88178_bind()
1333 return -ENOMEM; in ax88178_bind()
1349 .description = "DLink DUB-E100 USB Ethernet",
1359 .description = "Netgear FA-120 USB Ethernet",
1402 .description = "Linux Automation GmbH USB 10Base-T1L",
1428 * no-name packaging.
1469 // DLink DUB-E100
1477 // Hawking UF200, TrendNet TU2-ET100
1485 // Billionton Systems, GUSB2AM-1G-B
1493 // Buffalo LUA-U2-KTX
1497 // Buffalo LUA-U2-GT 10/100/1000
1501 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1505 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1509 // Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
1513 // corega FEther USB2-TX
1517 // Surecom EP-1427X-2
1525 // JVC MP-PRX1 Port Replicator
1529 // Lenovo U2L100P 10/100
1533 // ASIX AX88772B 10/100
1537 // ASIX AX88772 10/100
1541 // ASIX AX88178 10/100/1000
1545 // Logitec LAN-GTJ/U2A
1557 // DLink DUB-E100 H/W Ver B1
1561 // DLink DUB-E100 H/W Ver B1 Alternate
1565 // DLink DUB-E100 H/W Ver C1
1573 // IO-DATA ETG-US2
1585 // Cables-to-Go USB Ethernet Adapter
1613 // Linux Automation GmbH USB 10Base-T1L
1634 * We keep runtime-PM active for AX88772* by taking a PM usage