25 #define DW_VR_CSR_VIEWPORT		0xff
38 	return FIELD_PREP(0x1f0000, dev) | FIELD_PREP(0xffff, reg);  in xpcs_mmio_addr_format()
43 	return FIELD_GET(0x1fff00, csr);  in xpcs_mmio_addr_page()
48 	return FIELD_GET(0xff, csr);  in xpcs_mmio_addr_offset()
69 		ret = readl(pxpcs->reg_base + (ofs << 2)) & 0xffff;  in xpcs_mmio_read_reg_indirect()
110 	return 0;  in xpcs_mmio_write_reg_indirect()
127 		ret = readl(pxpcs->reg_base + (csr << 2)) & 0xffff;  in xpcs_mmio_read_reg_direct()
162 	return 0;  in xpcs_mmio_write_reg_direct()
169 	if (addr != 0)  in xpcs_mmio_read_c22()
182 	if (addr != 0)  in xpcs_mmio_write_c22()
195 	if (addr != 0)  in xpcs_mmio_read_c45()
209 	if (addr != 0)  in xpcs_mmio_write_c45()
275 	return 0;  in xpcs_plat_init_res()
295 	return 0;  in xpcs_plat_init_clk()
304 	pxpcs->bus = devm_mdiobus_alloc_size(dev, 0);  in xpcs_plat_init_bus()
313 	pxpcs->bus->phy_mask = ~0;  in xpcs_plat_init_bus()
330 	return 0;  in xpcs_plat_init_bus()
344 	mdiodev = mdio_device_create(pxpcs->bus, 0);  in xpcs_plat_init_dev()
363 	return 0;  in xpcs_plat_init_dev()
401 	return 0;  in xpcs_plat_probe()
410 	return 0;  in xpcs_plat_pm_runtime_suspend()