Lines Matching +full:4 +full:- +full:bits

1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2023-2024 Linaro Ltd. */
6 #include <linux/bits.h>
26 /* Bit 4 reserved */
45 /* Bits 28-29 reserved */
57 [RAM_ARB] = BIT(4),
96 /* Bits 29-31 reserved */
110 [GEN_QMB_1_MAX_WRITES] = GENMASK(7, 4),
111 /* Bits 8-31 reserved */
118 [GEN_QMB_1_MAX_READS] = GENMASK(7, 4),
119 /* Bits 8-15 reserved */
126 /* Valid bits defined by ipa->available */
132 /* Bits 1-3 reserved */
133 [FILTER_CACHE] = BIT(4),
134 /* Bits 5-31 reserved */
141 /* Bits 18-31 reserved */
148 /* Bits 0-1 reserved */
159 /* Bits 21-31 reserved */
167 /* Bits 17-31 reserved */
173 [DPL_TIMESTAMP_LSB] = GENMASK(4, 0),
174 /* Bits 5-6 reserved */
177 /* Bits 13-15 reserved */
179 /* Bits 21-31 reserved */
186 /* Bits 9-30 reserved */
197 /* Bits 12-31 reserved */
204 /* Bits 6-7 reserved */
206 /* Bits 14-15 reserved */
208 /* Bits 22-23 reserved */
210 /* Bits 30-31 reserved */
218 /* Bits 6-7 reserved */
220 /* Bits 14-15 reserved */
222 /* Bits 22-23 reserved */
224 /* Bits 30-31 reserved */
232 /* Bits 6-7 reserved */
234 /* Bits 14-15 reserved */
236 /* Bits 22-23 reserved */
238 /* Bits 30-31 reserved */
246 /* Bits 6-7 reserved */
248 /* Bits 14-15 reserved */
250 /* Bits 22-23 reserved */
252 /* Bits 30-31 reserved */
260 /* Bits 6-7 reserved */
262 /* Bits 14-15 reserved */
264 /* Bits 22-23 reserved */
266 /* Bits 30-31 reserved */
274 /* Bits 6-7 reserved */
276 /* Bits 14-15 reserved */
278 /* Bits 22-23 reserved */
280 /* Bits 30-31 reserved */
288 /* Bits 6-7 reserved */
290 /* Bits 14-15 reserved */
292 /* Bits 22-23 reserved */
294 /* Bits 30-31 reserved */
302 /* Bits 6-7 reserved */
304 /* Bits 14-15 reserved */
306 /* Bits 22-23 reserved */
308 /* Bits 30-31 reserved */
314 /* Valid bits defined by ipa->available */
324 /* Bits 9-31 reserved */
331 /* Bits 2-31 reserved */
356 [HDR_TOTAL_LEN_OR_PAD_OFFSET] = GENMASK(9, 4),
358 /* Bits 14-15 reserved */
375 [DEST_PIPE_INDEX] = GENMASK(11, 4),
387 [AGGR_TYPE] = GENMASK(4, 2),
397 /* Bits 28-31 reserved */
404 /* Bits 1-31 reserved */
411 [TIMER_LIMIT] = GENMASK(4, 0),
412 /* Bits 5-7 reserved */
414 /* Bits 10-31 reserved */
434 /* Bits 3-31 reserved */
441 /* Bits 8-31 reserved */
450 /* Bits 10-31 reserved */
460 [CACHE_MSK_DST_PORT] = BIT(4),
463 /* Bits 7-31 reserved */
474 [CACHE_MSK_DST_PORT] = BIT(4),
477 /* Bits 7-31 reserved */
483 /* Valid bits defined by enum ipa_irq_id; only used for GSI_EE_AP */
486 /* Valid bits defined by enum ipa_irq_id; only used for GSI_EE_AP */
489 /* Valid bits defined by enum ipa_irq_id; only used for GSI_EE_AP */
494 /* Bits 1-31 reserved */
499 /* Valid bits defined by ipa->available */
504 /* Valid bits defined by ipa->available */
509 /* Valid bits defined by ipa->available */