Lines Matching +full:4 +full:- +full:bits
1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
17 /* Bit 4 reserved */
35 /* Bits 25-29 reserved */
47 [RAM_ARB] = BIT(4),
85 /* Bits 22-23 reserved */
87 /* Bits 25-31 reserved */
101 [GEN_QMB_1_MAX_WRITES] = GENMASK(7, 4),
102 /* Bits 8-31 reserved */
109 [GEN_QMB_1_MAX_READS] = GENMASK(7, 4),
110 /* Bits 8-15 reserved */
119 /* Bits 1-3 reserved */
120 [IPV6_FILTER_HASH] = BIT(4),
121 /* Bits 5-7 reserved */
123 /* Bits 9-11 reserved */
125 /* Bits 13-31 reserved */
130 /* Valid bits defined by ipa->available */
135 /* Bits 18-31 reserved */
141 /* Valid bits defined by ipa->available */
145 /* Bits 0-1 reserved */
154 /* Bits 19-31 reserved */
161 /* Bits 4-7 reserved */
163 /* Bits 13-15 reserved */
165 /* Bits 21-23 reserved */
167 /* Bits 28-31 reserved */
175 /* Bits 17-31 reserved */
181 [DPL_TIMESTAMP_LSB] = GENMASK(4, 0),
182 /* Bits 5-6 reserved */
185 /* Bits 13-15 reserved */
187 /* Bits 21-31 reserved */
194 /* Bits 9-30 reserved */
210 /* Bits 6-7 reserved */
212 /* Bits 14-15 reserved */
214 /* Bits 22-23 reserved */
216 /* Bits 30-31 reserved */
224 /* Bits 6-7 reserved */
226 /* Bits 14-15 reserved */
228 /* Bits 22-23 reserved */
230 /* Bits 30-31 reserved */
238 /* Bits 6-7 reserved */
240 /* Bits 14-15 reserved */
242 /* Bits 22-23 reserved */
244 /* Bits 30-31 reserved */
252 /* Bits 6-7 reserved */
254 /* Bits 14-15 reserved */
256 /* Bits 22-23 reserved */
258 /* Bits 30-31 reserved */
270 /* Bits 9-31 reserved */
277 /* Bits 2-31 reserved */
301 [HDR_TOTAL_LEN_OR_PAD_OFFSET] = GENMASK(9, 4),
303 /* Bits 14-15 reserved */
307 /* Bits 22-31 reserved */
318 [DEST_PIPE_INDEX] = GENMASK(8, 4),
319 /* Bits 9-11 reserved */
331 [AGGR_TYPE] = GENMASK(4, 2),
341 /* Bits 28-31 reserved */
348 /* Bits 1-31 reserved */
355 [TIMER_LIMIT] = GENMASK(4, 0),
356 /* Bits 5-7 reserved */
358 /* Bits 9-31 reserved */
378 /* Bits 2-31 reserved */
385 /* Bits 8-31 reserved */
393 /* Bits 6-8 reserved */
395 /* Bits 10-31 reserved */
405 [FILTER_HASH_MSK_DST_PORT] = BIT(4),
409 /* Bits 7-15 reserved */
418 /* Bits 23-31 reserved */
424 /* Valid bits defined by enum ipa_irq_id; only used for GSI_EE_AP */
427 /* Valid bits defined by enum ipa_irq_id; only used for GSI_EE_AP */
430 /* Valid bits defined by enum ipa_irq_id; only used for GSI_EE_AP */
435 /* Bits 1-31 reserved */
440 /* Valid bits defined by ipa->available */
444 /* Valid bits defined by ipa->available */
448 /* Valid bits defined by ipa->available */