Lines Matching full:true
23 {true, "BP_CPU_STATE"},
24 {true, "DFX_MSIX_INFO_NIC_0"},
25 {true, "DFX_MSIX_INFO_NIC_1"},
26 {true, "DFX_MSIX_INFO_NIC_2"},
27 {true, "DFX_MSIX_INFO_NIC_3"},
29 {true, "DFX_MSIX_INFO_ROC_0"},
30 {true, "DFX_MSIX_INFO_ROC_1"},
31 {true, "DFX_MSIX_INFO_ROC_2"},
32 {true, "DFX_MSIX_INFO_ROC_3"},
39 {true, "SSU_ETS_PORT_STATUS"},
40 {true, "SSU_ETS_TCG_STATUS"},
43 {true, "SSU_BP_STATUS_0"},
45 {true, "SSU_BP_STATUS_1"},
46 {true, "SSU_BP_STATUS_2"},
47 {true, "SSU_BP_STATUS_3"},
48 {true, "SSU_BP_STATUS_4"},
49 {true, "SSU_BP_STATUS_5"},
50 {true, "SSU_MAC_TX_PFC_IND"},
52 {true, "MAC_SSU_RX_PFC_IND"},
53 {true, "BTMP_AGEING_ST_B0"},
54 {true, "BTMP_AGEING_ST_B1"},
55 {true, "BTMP_AGEING_ST_B2"},
59 {true, "FULL_DROP_NUM"},
60 {true, "PART_DROP_NUM"},
61 {true, "PPP_KEY_DROP_NUM"},
62 {true, "PPP_RLT_DROP_NUM"},
63 {true, "LO_PRI_UNICAST_RLT_DROP_NUM"},
64 {true, "HI_PRI_MULTICAST_RLT_DROP_NUM"},
66 {true, "LO_PRI_MULTICAST_RLT_DROP_NUM"},
67 {true, "NCSI_PACKET_CURR_BUFFER_CNT"},
68 {true, "BTMP_AGEING_RLS_CNT_BANK0"},
69 {true, "BTMP_AGEING_RLS_CNT_BANK1"},
70 {true, "BTMP_AGEING_RLS_CNT_BANK2"},
71 {true, "SSU_MB_RD_RLT_DROP_CNT"},
73 {true, "SSU_PPP_MAC_KEY_NUM_L"},
74 {true, "SSU_PPP_MAC_KEY_NUM_H"},
75 {true, "SSU_PPP_HOST_KEY_NUM_L"},
76 {true, "SSU_PPP_HOST_KEY_NUM_H"},
77 {true, "PPP_SSU_MAC_RLT_NUM_L"},
78 {true, "PPP_SSU_MAC_RLT_NUM_H"},
80 {true, "PPP_SSU_HOST_RLT_NUM_L"},
81 {true, "PPP_SSU_HOST_RLT_NUM_H"},
82 {true, "NCSI_RX_PACKET_IN_CNT_L"},
83 {true, "NCSI_RX_PACKET_IN_CNT_H"},
84 {true, "NCSI_TX_PACKET_OUT_CNT_L"},
85 {true, "NCSI_TX_PACKET_OUT_CNT_H"},
87 {true, "SSU_KEY_DROP_NUM"},
88 {true, "MB_UNCOPY_NUM"},
89 {true, "RX_OQ_DROP_PKT_CNT"},
90 {true, "TX_OQ_DROP_PKT_CNT"},
91 {true, "BANK_UNBALANCE_DROP_CNT"},
92 {true, "BANK_UNBALANCE_RX_DROP_CNT"},
94 {true, "NIC_L2_ERR_DROP_PKT_CNT"},
95 {true, "ROC_L2_ERR_DROP_PKT_CNT"},
96 {true, "NIC_L2_ERR_DROP_PKT_CNT_RX"},
97 {true, "ROC_L2_ERR_DROP_PKT_CNT_RX"},
98 {true, "RX_OQ_GLB_DROP_PKT_CNT"},
101 {true, "LO_PRI_UNICAST_CUR_CNT"},
102 {true, "HI_PRI_MULTICAST_CUR_CNT"},
103 {true, "LO_PRI_MULTICAST_CUR_CNT"},
110 {true, "prt_id"},
111 {true, "PACKET_TC_CURR_BUFFER_CNT_0"},
112 {true, "PACKET_TC_CURR_BUFFER_CNT_1"},
113 {true, "PACKET_TC_CURR_BUFFER_CNT_2"},
114 {true, "PACKET_TC_CURR_BUFFER_CNT_3"},
115 {true, "PACKET_TC_CURR_BUFFER_CNT_4"},
117 {true, "PACKET_TC_CURR_BUFFER_CNT_5"},
118 {true, "PACKET_TC_CURR_BUFFER_CNT_6"},
119 {true, "PACKET_TC_CURR_BUFFER_CNT_7"},
120 {true, "PACKET_CURR_BUFFER_CNT"},
124 {true, "RX_PACKET_IN_CNT_L"},
125 {true, "RX_PACKET_IN_CNT_H"},
126 {true, "RX_PACKET_OUT_CNT_L"},
127 {true, "RX_PACKET_OUT_CNT_H"},
128 {true, "TX_PACKET_IN_CNT_L"},
129 {true, "TX_PACKET_IN_CNT_H"},
131 {true, "TX_PACKET_OUT_CNT_L"},
132 {true, "TX_PACKET_OUT_CNT_H"},
133 {true, "ROC_RX_PACKET_IN_CNT_L"},
134 {true, "ROC_RX_PACKET_IN_CNT_H"},
135 {true, "ROC_TX_PACKET_OUT_CNT_L"},
136 {true, "ROC_TX_PACKET_OUT_CNT_H"},
138 {true, "RX_PACKET_TC_IN_CNT_0_L"},
139 {true, "RX_PACKET_TC_IN_CNT_0_H"},
140 {true, "RX_PACKET_TC_IN_CNT_1_L"},
141 {true, "RX_PACKET_TC_IN_CNT_1_H"},
142 {true, "RX_PACKET_TC_IN_CNT_2_L"},
143 {true, "RX_PACKET_TC_IN_CNT_2_H"},
145 {true, "RX_PACKET_TC_IN_CNT_3_L"},
146 {true, "RX_PACKET_TC_IN_CNT_3_H"},
147 {true, "RX_PACKET_TC_IN_CNT_4_L"},
148 {true, "RX_PACKET_TC_IN_CNT_4_H"},
149 {true, "RX_PACKET_TC_IN_CNT_5_L"},
150 {true, "RX_PACKET_TC_IN_CNT_5_H"},
152 {true, "RX_PACKET_TC_IN_CNT_6_L"},
153 {true, "RX_PACKET_TC_IN_CNT_6_H"},
154 {true, "RX_PACKET_TC_IN_CNT_7_L"},
155 {true, "RX_PACKET_TC_IN_CNT_7_H"},
156 {true, "RX_PACKET_TC_OUT_CNT_0_L"},
157 {true, "RX_PACKET_TC_OUT_CNT_0_H"},
159 {true, "RX_PACKET_TC_OUT_CNT_1_L"},
160 {true, "RX_PACKET_TC_OUT_CNT_1_H"},
161 {true, "RX_PACKET_TC_OUT_CNT_2_L"},
162 {true, "RX_PACKET_TC_OUT_CNT_2_H"},
163 {true, "RX_PACKET_TC_OUT_CNT_3_L"},
164 {true, "RX_PACKET_TC_OUT_CNT_3_H"},
166 {true, "RX_PACKET_TC_OUT_CNT_4_L"},
167 {true, "RX_PACKET_TC_OUT_CNT_4_H"},
168 {true, "RX_PACKET_TC_OUT_CNT_5_L"},
169 {true, "RX_PACKET_TC_OUT_CNT_5_H"},
170 {true, "RX_PACKET_TC_OUT_CNT_6_L"},
171 {true, "RX_PACKET_TC_OUT_CNT_6_H"},
173 {true, "RX_PACKET_TC_OUT_CNT_7_L"},
174 {true, "RX_PACKET_TC_OUT_CNT_7_H"},
175 {true, "TX_PACKET_TC_IN_CNT_0_L"},
176 {true, "TX_PACKET_TC_IN_CNT_0_H"},
177 {true, "TX_PACKET_TC_IN_CNT_1_L"},
178 {true, "TX_PACKET_TC_IN_CNT_1_H"},
180 {true, "TX_PACKET_TC_IN_CNT_2_L"},
181 {true, "TX_PACKET_TC_IN_CNT_2_H"},
182 {true, "TX_PACKET_TC_IN_CNT_3_L"},
183 {true, "TX_PACKET_TC_IN_CNT_3_H"},
184 {true, "TX_PACKET_TC_IN_CNT_4_L"},
185 {true, "TX_PACKET_TC_IN_CNT_4_H"},
187 {true, "TX_PACKET_TC_IN_CNT_5_L"},
188 {true, "TX_PACKET_TC_IN_CNT_5_H"},
189 {true, "TX_PACKET_TC_IN_CNT_6_L"},
190 {true, "TX_PACKET_TC_IN_CNT_6_H"},
191 {true, "TX_PACKET_TC_IN_CNT_7_L"},
192 {true, "TX_PACKET_TC_IN_CNT_7_H"},
194 {true, "TX_PACKET_TC_OUT_CNT_0_L"},
195 {true, "TX_PACKET_TC_OUT_CNT_0_H"},
196 {true, "TX_PACKET_TC_OUT_CNT_1_L"},
197 {true, "TX_PACKET_TC_OUT_CNT_1_H"},
198 {true, "TX_PACKET_TC_OUT_CNT_2_L"},
199 {true, "TX_PACKET_TC_OUT_CNT_2_H"},
201 {true, "TX_PACKET_TC_OUT_CNT_3_L"},
202 {true, "TX_PACKET_TC_OUT_CNT_3_H"},
203 {true, "TX_PACKET_TC_OUT_CNT_4_L"},
204 {true, "TX_PACKET_TC_OUT_CNT_4_H"},
205 {true, "TX_PACKET_TC_OUT_CNT_5_L"},
206 {true, "TX_PACKET_TC_OUT_CNT_5_H"},
208 {true, "TX_PACKET_TC_OUT_CNT_6_L"},
209 {true, "TX_PACKET_TC_OUT_CNT_6_H"},
210 {true, "TX_PACKET_TC_OUT_CNT_7_L"},
211 {true, "TX_PACKET_TC_OUT_CNT_7_H"},
217 {true, "OQ_INDEX"},
218 {true, "QUEUE_CNT"},
226 {true, "prt_id"},
227 {true, "IGU_RX_ERR_PKT"},
228 {true, "IGU_RX_NO_SOF_PKT"},
229 {true, "EGU_TX_1588_SHORT_PKT"},
230 {true, "EGU_TX_1588_PKT"},
231 {true, "EGU_TX_ERR_PKT"},
233 {true, "IGU_RX_OUT_L2_PKT"},
234 {true, "IGU_RX_OUT_L3_PKT"},
235 {true, "IGU_RX_OUT_L4_PKT"},
236 {true, "IGU_RX_IN_L2_PKT"},
237 {true, "IGU_RX_IN_L3_PKT"},
238 {true, "IGU_RX_IN_L4_PKT"},
240 {true, "IGU_RX_EL3E_PKT"},
241 {true, "IGU_RX_EL4E_PKT"},
242 {true, "IGU_RX_L3E_PKT"},
243 {true, "IGU_RX_L4E_PKT"},
244 {true, "IGU_RX_ROCEE_PKT"},
245 {true, "IGU_RX_OUT_UDP0_PKT"},
247 {true, "IGU_RX_IN_UDP0_PKT"},
248 {true, "IGU_MC_CAR_DROP_PKT_L"},
249 {true, "IGU_MC_CAR_DROP_PKT_H"},
250 {true, "IGU_BC_CAR_DROP_PKT_L"},
251 {true, "IGU_BC_CAR_DROP_PKT_H"},
254 {true, "IGU_RX_OVERSIZE_PKT_L"},
255 {true, "IGU_RX_OVERSIZE_PKT_H"},
256 {true, "IGU_RX_UNDERSIZE_PKT_L"},
257 {true, "IGU_RX_UNDERSIZE_PKT_H"},
258 {true, "IGU_RX_OUT_ALL_PKT_L"},
259 {true, "IGU_RX_OUT_ALL_PKT_H"},
261 {true, "IGU_TX_OUT_ALL_PKT_L"},
262 {true, "IGU_TX_OUT_ALL_PKT_H"},
263 {true, "IGU_RX_UNI_PKT_L"},
264 {true, "IGU_RX_UNI_PKT_H"},
265 {true, "IGU_RX_MULTI_PKT_L"},
266 {true, "IGU_RX_MULTI_PKT_H"},
268 {true, "IGU_RX_BROAD_PKT_L"},
269 {true, "IGU_RX_BROAD_PKT_H"},
270 {true, "EGU_TX_OUT_ALL_PKT_L"},
271 {true, "EGU_TX_OUT_ALL_PKT_H"},
272 {true, "EGU_TX_UNI_PKT_L"},
273 {true, "EGU_TX_UNI_PKT_H"},
275 {true, "EGU_TX_MULTI_PKT_L"},
276 {true, "EGU_TX_MULTI_PKT_H"},
277 {true, "EGU_TX_BROAD_PKT_L"},
278 {true, "EGU_TX_BROAD_PKT_H"},
279 {true, "IGU_TX_KEY_NUM_L"},
280 {true, "IGU_TX_KEY_NUM_H"},
282 {true, "IGU_RX_NON_TUN_PKT_L"},
283 {true, "IGU_RX_NON_TUN_PKT_H"},
284 {true, "IGU_RX_TUN_PKT_L"},
285 {true, "IGU_RX_TUN_PKT_H"},
291 {true, "tc_queue_num"},
292 {true, "FSM_DFX_ST0"},
293 {true, "FSM_DFX_ST1"},
294 {true, "RPU_RX_PKT_DROP_CNT"},
295 {true, "BUF_WAIT_TIMEOUT"},
296 {true, "BUF_WAIT_TIMEOUT_QID"},
301 {true, "FIFO_DFX_ST0"},
302 {true, "FIFO_DFX_ST1"},
303 {true, "FIFO_DFX_ST2"},
304 {true, "FIFO_DFX_ST3"},
305 {true, "FIFO_DFX_ST4"},
307 {true, "FIFO_DFX_ST5"},
317 {true, "NCSI_EGU_TX_FIFO_STS"},
318 {true, "NCSI_PAUSE_STATUS"},
319 {true, "NCSI_RX_CTRL_DMAC_ERR_CNT"},
320 {true, "NCSI_RX_CTRL_SMAC_ERR_CNT"},
321 {true, "NCSI_RX_CTRL_CKS_ERR_CNT"},
323 {true, "NCSI_RX_CTRL_PKT_CNT"},
324 {true, "NCSI_RX_PT_DMAC_ERR_CNT"},
325 {true, "NCSI_RX_PT_SMAC_ERR_CNT"},
326 {true, "NCSI_RX_PT_PKT_CNT"},
327 {true, "NCSI_RX_FCS_ERR_CNT"},
328 {true, "NCSI_TX_CTRL_DMAC_ERR_CNT"},
330 {true, "NCSI_TX_CTRL_SMAC_ERR_CNT"},
331 {true, "NCSI_TX_CTRL_PKT_CNT"},
332 {true, "NCSI_TX_PT_DMAC_ERR_CNT"},
333 {true, "NCSI_TX_PT_SMAC_ERR_CNT"},
334 {true, "NCSI_TX_PT_PKT_CNT"},
335 {true, "NCSI_TX_PT_PKT_TRUNC_CNT"},
337 {true, "NCSI_TX_PT_PKT_ERR_CNT"},
338 {true, "NCSI_TX_CTRL_PKT_ERR_CNT"},
339 {true, "NCSI_RX_CTRL_PKT_TRUNC_CNT"},
340 {true, "NCSI_RX_CTRL_PKT_CFLIT_CNT"},
344 {true, "NCSI_MAC_RX_OCTETS_OK"},
345 {true, "NCSI_MAC_RX_OCTETS_BAD"},
346 {true, "NCSI_MAC_RX_UC_PKTS"},
347 {true, "NCSI_MAC_RX_MC_PKTS"},
348 {true, "NCSI_MAC_RX_BC_PKTS"},
349 {true, "NCSI_MAC_RX_PKTS_64OCTETS"},
351 {true, "NCSI_MAC_RX_PKTS_65TO127OCTETS"},
352 {true, "NCSI_MAC_RX_PKTS_128TO255OCTETS"},
353 {true, "NCSI_MAC_RX_PKTS_255TO511OCTETS"},
354 {true, "NCSI_MAC_RX_PKTS_512TO1023OCTETS"},
355 {true, "NCSI_MAC_RX_PKTS_1024TO1518OCTETS"},
356 {true, "NCSI_MAC_RX_PKTS_1519TOMAXOCTETS"},
358 {true, "NCSI_MAC_RX_FCS_ERRORS"},
359 {true, "NCSI_MAC_RX_LONG_ERRORS"},
360 {true, "NCSI_MAC_RX_JABBER_ERRORS"},
361 {true, "NCSI_MAC_RX_RUNT_ERR_CNT"},
362 {true, "NCSI_MAC_RX_SHORT_ERR_CNT"},
363 {true, "NCSI_MAC_RX_FILT_PKT_CNT"},
365 {true, "NCSI_MAC_RX_OCTETS_TOTAL_FILT"},
366 {true, "NCSI_MAC_TX_OCTETS_OK"},
367 {true, "NCSI_MAC_TX_OCTETS_BAD"},
368 {true, "NCSI_MAC_TX_UC_PKTS"},
369 {true, "NCSI_MAC_TX_MC_PKTS"},
370 {true, "NCSI_MAC_TX_BC_PKTS"},
372 {true, "NCSI_MAC_TX_PKTS_64OCTETS"},
373 {true, "NCSI_MAC_TX_PKTS_65TO127OCTETS"},
374 {true, "NCSI_MAC_TX_PKTS_128TO255OCTETS"},
375 {true, "NCSI_MAC_TX_PKTS_256TO511OCTETS"},
376 {true, "NCSI_MAC_TX_PKTS_512TO1023OCTETS"},
377 {true, "NCSI_MAC_TX_PKTS_1024TO1518OCTETS"},
379 {true, "NCSI_MAC_TX_PKTS_1519TOMAXOCTETS"},
380 {true, "NCSI_MAC_TX_UNDERRUN"},
381 {true, "NCSI_MAC_TX_CRC_ERROR"},
382 {true, "NCSI_MAC_TX_PAUSE_FRAMES"},
383 {true, "NCSI_MAC_RX_PAD_PKTS"},
384 {true, "NCSI_MAC_RX_PAUSE_FRAMES"},
389 {true, "LGE_IGU_AFIFO_DFX_0"},
390 {true, "LGE_IGU_AFIFO_DFX_1"},
391 {true, "LGE_IGU_AFIFO_DFX_2"},
392 {true, "LGE_IGU_AFIFO_DFX_3"},
393 {true, "LGE_IGU_AFIFO_DFX_4"},
395 {true, "LGE_IGU_AFIFO_DFX_5"},
396 {true, "LGE_IGU_AFIFO_DFX_6"},
397 {true, "LGE_IGU_AFIFO_DFX_7"},
398 {true, "LGE_EGU_AFIFO_DFX_0"},
399 {true, "LGE_EGU_AFIFO_DFX_1"},
400 {true, "LGE_EGU_AFIFO_DFX_2"},
402 {true, "LGE_EGU_AFIFO_DFX_3"},
403 {true, "LGE_EGU_AFIFO_DFX_4"},
404 {true, "LGE_EGU_AFIFO_DFX_5"},
405 {true, "LGE_EGU_AFIFO_DFX_6"},
406 {true, "LGE_EGU_AFIFO_DFX_7"},
407 {true, "CGE_IGU_AFIFO_DFX_0"},
409 {true, "CGE_IGU_AFIFO_DFX_1"},
410 {true, "CGE_EGU_AFIFO_DFX_0"},
411 {true, "CGE_EGU_AFIFO_DFX_1"},
419 {true, "DROP_FROM_PRT_PKT_CNT"},
420 {true, "DROP_FROM_HOST_PKT_CNT"},
421 {true, "DROP_TX_VLAN_PROC_CNT"},
422 {true, "DROP_MNG_CNT"},
423 {true, "DROP_FD_CNT"},
425 {true, "DROP_NO_DST_CNT"},
426 {true, "DROP_MC_MBID_FULL_CNT"},
427 {true, "DROP_SC_FILTERED"},
428 {true, "PPP_MC_DROP_PKT_CNT"},
429 {true, "DROP_PT_CNT"},
430 {true, "DROP_MAC_ANTI_SPOOF_CNT"},
432 {true, "DROP_IG_VFV_CNT"},
433 {true, "DROP_IG_PRTV_CNT"},
434 {true, "DROP_CNM_PFC_PAUSE_CNT"},
435 {true, "DROP_TORUS_TC_CNT"},
436 {true, "DROP_TORUS_LPBK_CNT"},
437 {true, "PPP_HFS_STS"},
439 {true, "PPP_MC_RSLT_STS"},
440 {true, "PPP_P3U_STS"},
441 {true, "PPP_RSLT_DESCR_STS"},
442 {true, "PPP_UMV_STS_0"},
443 {true, "PPP_UMV_STS_1"},
444 {true, "PPP_VFV_STS"},
446 {true, "PPP_GRO_KEY_CNT"},
447 {true, "PPP_GRO_INFO_CNT"},
448 {true, "PPP_GRO_DROP_CNT"},
449 {true, "PPP_GRO_OUT_CNT"},
450 {true, "PPP_GRO_KEY_MATCH_DATA_CNT"},
451 {true, "PPP_GRO_KEY_MATCH_TCAM_CNT"},
453 {true, "PPP_GRO_INFO_MATCH_CNT"},
454 {true, "PPP_GRO_FREE_ENTRY_CNT"},
455 {true, "PPP_GRO_INNER_DFX_SIGNAL"},
460 {true, "GET_RX_PKT_CNT_L"},
461 {true, "GET_RX_PKT_CNT_H"},
462 {true, "GET_TX_PKT_CNT_L"},
463 {true, "GET_TX_PKT_CNT_H"},
464 {true, "SEND_UC_PRT2HOST_PKT_CNT_L"},
465 {true, "SEND_UC_PRT2HOST_PKT_CNT_H"},
467 {true, "SEND_UC_PRT2PRT_PKT_CNT_L"},
468 {true, "SEND_UC_PRT2PRT_PKT_CNT_H"},
469 {true, "SEND_UC_HOST2HOST_PKT_CNT_L"},
470 {true, "SEND_UC_HOST2HOST_PKT_CNT_H"},
471 {true, "SEND_UC_HOST2PRT_PKT_CNT_L"},
472 {true, "SEND_UC_HOST2PRT_PKT_CNT_H"},
474 {true, "SEND_MC_FROM_PRT_CNT_L"},
475 {true, "SEND_MC_FROM_PRT_CNT_H"},
476 {true, "SEND_MC_FROM_HOST_CNT_L"},
477 {true, "SEND_MC_FROM_HOST_CNT_H"},
478 {true, "SSU_MC_RD_CNT_L"},
479 {true, "SSU_MC_RD_CNT_H"},
481 {true, "SSU_MC_DROP_CNT_L"},
482 {true, "SSU_MC_DROP_CNT_H"},
483 {true, "SSU_MC_RD_PKT_CNT_L"},
484 {true, "SSU_MC_RD_PKT_CNT_H"},
485 {true, "PPP_MC_2HOST_PKT_CNT_L"},
486 {true, "PPP_MC_2HOST_PKT_CNT_H"},
488 {true, "PPP_MC_2PRT_PKT_CNT_L"},
489 {true, "PPP_MC_2PRT_PKT_CNT_H"},
490 {true, "NTSNOS_PKT_CNT_L"},
491 {true, "NTSNOS_PKT_CNT_H"},
492 {true, "NTUP_PKT_CNT_L"},
493 {true, "NTUP_PKT_CNT_H"},
495 {true, "NTLCL_PKT_CNT_L"},
496 {true, "NTLCL_PKT_CNT_H"},
497 {true, "NTTGT_PKT_CNT_L"},
498 {true, "NTTGT_PKT_CNT_H"},
499 {true, "RTNS_PKT_CNT_L"},
500 {true, "RTNS_PKT_CNT_H"},
502 {true, "RTLPBK_PKT_CNT_L"},
503 {true, "RTLPBK_PKT_CNT_H"},
504 {true, "NR_PKT_CNT_L"},
505 {true, "NR_PKT_CNT_H"},
506 {true, "RR_PKT_CNT_L"},
507 {true, "RR_PKT_CNT_H"},
509 {true, "MNG_TBL_HIT_CNT_L"},
510 {true, "MNG_TBL_HIT_CNT_H"},
511 {true, "FD_TBL_HIT_CNT_L"},
512 {true, "FD_TBL_HIT_CNT_H"},
513 {true, "FD_LKUP_CNT_L"},
514 {true, "FD_LKUP_CNT_H"},
516 {true, "BC_HIT_CNT_L"},
517 {true, "BC_HIT_CNT_H"},
518 {true, "UM_TBL_UC_HIT_CNT_L"},
519 {true, "UM_TBL_UC_HIT_CNT_H"},
520 {true, "UM_TBL_MC_HIT_CNT_L"},
521 {true, "UM_TBL_MC_HIT_CNT_H"},
523 {true, "UM_TBL_VMDQ1_HIT_CNT_L"},
524 {true, "UM_TBL_VMDQ1_HIT_CNT_H"},
525 {true, "MTA_TBL_HIT_CNT_L"},
526 {true, "MTA_TBL_HIT_CNT_H"},
527 {true, "FWD_BONDING_HIT_CNT_L"},
528 {true, "FWD_BONDING_HIT_CNT_H"},
530 {true, "PROMIS_TBL_HIT_CNT_L"},
531 {true, "PROMIS_TBL_HIT_CNT_H"},
532 {true, "GET_TUNL_PKT_CNT_L"},
533 {true, "GET_TUNL_PKT_CNT_H"},
534 {true, "GET_BMC_PKT_CNT_L"},
535 {true, "GET_BMC_PKT_CNT_H"},
537 {true, "SEND_UC_PRT2BMC_PKT_CNT_L"},
538 {true, "SEND_UC_PRT2BMC_PKT_CNT_H"},
539 {true, "SEND_UC_HOST2BMC_PKT_CNT_L"},
540 {true, "SEND_UC_HOST2BMC_PKT_CNT_H"},
541 {true, "SEND_UC_BMC2HOST_PKT_CNT_L"},
542 {true, "SEND_UC_BMC2HOST_PKT_CNT_H"},
544 {true, "SEND_UC_BMC2PRT_PKT_CNT_L"},
545 {true, "SEND_UC_BMC2PRT_PKT_CNT_H"},
546 {true, "PPP_MC_2BMC_PKT_CNT_L"},
547 {true, "PPP_MC_2BMC_PKT_CNT_H"},
548 {true, "VLAN_MIRR_CNT_L"},
549 {true, "VLAN_MIRR_CNT_H"},
551 {true, "IG_MIRR_CNT_L"},
552 {true, "IG_MIRR_CNT_H"},
553 {true, "EG_MIRR_CNT_L"},
554 {true, "EG_MIRR_CNT_H"},
555 {true, "RX_DEFAULT_HOST_HIT_CNT_L"},
556 {true, "RX_DEFAULT_HOST_HIT_CNT_H"},
558 {true, "LAN_PAIR_CNT_L"},
559 {true, "LAN_PAIR_CNT_H"},
560 {true, "UM_TBL_MC_HIT_PKT_CNT_L"},
561 {true, "UM_TBL_MC_HIT_PKT_CNT_H"},
562 {true, "MTA_TBL_HIT_PKT_CNT_L"},
563 {true, "MTA_TBL_HIT_PKT_CNT_H"},
565 {true, "PROMIS_TBL_HIT_PKT_CNT_L"},
566 {true, "PROMIS_TBL_HIT_PKT_CNT_H"},
575 {true, "FSM_DFX_ST0"},
576 {true, "FSM_DFX_ST1"},
577 {true, "FSM_DFX_ST2"},
578 {true, "FIFO_DFX_ST0"},
579 {true, "FIFO_DFX_ST1"},
581 {true, "FIFO_DFX_ST2"},
582 {true, "FIFO_DFX_ST3"},
583 {true, "FIFO_DFX_ST4"},
584 {true, "FIFO_DFX_ST5"},
585 {true, "FIFO_DFX_ST6"},
586 {true, "FIFO_DFX_ST7"},
588 {true, "FIFO_DFX_ST8"},
589 {true, "FIFO_DFX_ST9"},
590 {true, "FIFO_DFX_ST10"},
591 {true, "FIFO_DFX_ST11"},
592 {true, "Q_CREDIT_VLD_0"},
593 {true, "Q_CREDIT_VLD_1"},
595 {true, "Q_CREDIT_VLD_2"},
596 {true, "Q_CREDIT_VLD_3"},
597 {true, "Q_CREDIT_VLD_4"},
598 {true, "Q_CREDIT_VLD_5"},
599 {true, "Q_CREDIT_VLD_6"},
600 {true, "Q_CREDIT_VLD_7"},
602 {true, "Q_CREDIT_VLD_8"},
603 {true, "Q_CREDIT_VLD_9"},
604 {true, "Q_CREDIT_VLD_10"},
605 {true, "Q_CREDIT_VLD_11"},
606 {true, "Q_CREDIT_VLD_12"},
607 {true, "Q_CREDIT_VLD_13"},
609 {true, "Q_CREDIT_VLD_14"},
610 {true, "Q_CREDIT_VLD_15"},
611 {true, "Q_CREDIT_VLD_16"},
612 {true, "Q_CREDIT_VLD_17"},
613 {true, "Q_CREDIT_VLD_18"},
614 {true, "Q_CREDIT_VLD_19"},
616 {true, "Q_CREDIT_VLD_20"},
617 {true, "Q_CREDIT_VLD_21"},
618 {true, "Q_CREDIT_VLD_22"},
619 {true, "Q_CREDIT_VLD_23"},
620 {true, "Q_CREDIT_VLD_24"},
621 {true, "Q_CREDIT_VLD_25"},
623 {true, "Q_CREDIT_VLD_26"},
624 {true, "Q_CREDIT_VLD_27"},
625 {true, "Q_CREDIT_VLD_28"},
626 {true, "Q_CREDIT_VLD_29"},
627 {true, "Q_CREDIT_VLD_30"},
628 {true, "Q_CREDIT_VLD_31"},
630 {true, "GRO_BD_SERR_CNT"},
631 {true, "GRO_CONTEXT_SERR_CNT"},
632 {true, "RX_STASH_CFG_SERR_CNT"},
633 {true, "AXI_RD_FBD_SERR_CNT"},
634 {true, "GRO_BD_MERR_CNT"},
635 {true, "GRO_CONTEXT_MERR_CNT"},
637 {true, "RX_STASH_CFG_MERR_CNT"},
638 {true, "AXI_RD_FBD_MERR_CNT"},
646 {true, "q_num"},
647 {true, "RCB_CFG_RX_RING_TAIL"},
648 {true, "RCB_CFG_RX_RING_HEAD"},
649 {true, "RCB_CFG_RX_RING_FBDNUM"},
650 {true, "RCB_CFG_RX_RING_OFFSET"},
651 {true, "RCB_CFG_RX_RING_FBDOFFSET"},
653 {true, "RCB_CFG_RX_RING_PKTNUM_RECORD"},
654 {true, "RCB_CFG_TX_RING_TAIL"},
655 {true, "RCB_CFG_TX_RING_HEAD"},
656 {true, "RCB_CFG_TX_RING_FBDNUM"},
657 {true, "RCB_CFG_TX_RING_OFFSET"},
658 {true, "RCB_CFG_TX_RING_EBDNUM"},
810 hclge_cmd_setup_basic_desc(desc, cmd, true); in hclge_dbg_cmd_send()
816 hclge_cmd_setup_basic_desc(desc, cmd, true); in hclge_dbg_cmd_send()
951 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAC_MODE, true); in hclge_dbg_dump_mac_enable_status()
980 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAX_FRM_SIZE, true); in hclge_dbg_dump_mac_frame_size()
1010 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_SPEED_DUP, true); in hclge_dbg_dump_mac_speed_duplex()
1316 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_ETS_TC_WEIGHT, true); in hclge_dbg_dump_tc()
1494 true); in hclge_dbg_dump_tm_bp_qset_map()
1575 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_NODES, true); in hclge_dbg_dump_tm_nodes()
1768 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CFG_MAC_PARA, true); in hclge_dbg_dump_qos_pause_cfg()
1799 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PRI_TO_TC_MAPPING, true); in hclge_dbg_dump_qos_pri_map()
1840 hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_QOS_MAP, true); in hclge_dbg_dump_qos_dscp_map()
1842 hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_QOS_MAP, true); in hclge_dbg_dump_qos_dscp_map()
1882 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TX_BUFF_ALLOC, true); in hclge_dbg_dump_tx_buf_cfg()
1907 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_PRIV_BUFF_ALLOC, true); in hclge_dbg_dump_rx_priv_buf_cfg()
1937 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_COM_WL_ALLOC, true); in hclge_dbg_dump_rx_common_wl_cfg()
1963 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_GBL_PKT_CNT, true); in hclge_dbg_dump_rx_global_pkt_cnt()
1988 hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_RX_PRIV_WL_ALLOC, true); in hclge_dbg_dump_rx_priv_wl_buf_cfg()
1990 hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_RX_PRIV_WL_ALLOC, true); in hclge_dbg_dump_rx_priv_wl_buf_cfg()
2024 hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_RX_COM_THRD_ALLOC, true); in hclge_dbg_dump_rx_common_threshold_cfg()
2026 hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_RX_COM_THRD_ALLOC, true); in hclge_dbg_dump_rx_common_threshold_cfg()
2112 true); in hclge_dbg_dump_mng_table()
2169 hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_FD_TCAM_OP, true); in hclge_dbg_fd_tcam_read()
2171 hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_FD_TCAM_OP, true); in hclge_dbg_fd_tcam_read()
2173 hclge_cmd_setup_basic_desc(&desc[2], HCLGE_OPC_FD_TCAM_OP, true); in hclge_dbg_fd_tcam_read()
2272 ret = hclge_dbg_fd_tcam_read(hdev, true, tcam_buf, tcam_msg); in hclge_dbg_dump_fd_tcam()
2315 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_FD_CNT_OP, true); in hclge_dbg_dump_fd_counter()
2452 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_IMP_STATS_BD, true); in hclge_dbg_get_imp_stats_info()
2565 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAC_MODE, true); in hclge_dbg_dump_loopback()
2578 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_COMMON_LOOPBACK, true); in hclge_dbg_dump_loopback()
2727 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_VLAN_PORT_RX_CFG, true); in hclge_get_vlan_rx_offload_cfg()
2762 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_VLAN_PORT_TX_CFG, true); in hclge_get_vlan_tx_offload_cfg()
2797 hclge_cmd_setup_basic_desc(desc, HCLGE_OPC_VLAN_FILTER_CTRL, true); in hclge_get_vlan_filter_config_cmd()
2838 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PORT_VLAN_BYPASS, true); in hclge_get_port_vlan_filter_bypass_state()
3050 hclge_dbg_dump_mac_list(hdev, buf, len, true); in hclge_dbg_dump_mac_uc()