Lines Matching full:chip
13 #include "chip.h"
20 static int mv88e6xxx_g1_atu_fid_write(struct mv88e6xxx_chip *chip, u16 fid) in mv88e6xxx_g1_atu_fid_write() argument
22 return mv88e6xxx_g1_write(chip, MV88E6352_G1_ATU_FID, fid & 0xfff); in mv88e6xxx_g1_atu_fid_write()
27 int mv88e6xxx_g1_atu_set_learn2all(struct mv88e6xxx_chip *chip, bool learn2all) in mv88e6xxx_g1_atu_set_learn2all() argument
32 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val); in mv88e6xxx_g1_atu_set_learn2all()
41 return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val); in mv88e6xxx_g1_atu_set_learn2all()
44 int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip, in mv88e6xxx_g1_atu_set_age_time() argument
47 const unsigned int coeff = chip->info->age_time_coeff; in mv88e6xxx_g1_atu_set_age_time()
60 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val); in mv88e6xxx_g1_atu_set_age_time()
68 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val); in mv88e6xxx_g1_atu_set_age_time()
72 dev_dbg(chip->dev, "AgeTime set to 0x%02x (%d ms)\n", age_time, in mv88e6xxx_g1_atu_set_age_time()
78 int mv88e6165_g1_atu_get_hash(struct mv88e6xxx_chip *chip, u8 *hash) in mv88e6165_g1_atu_get_hash() argument
83 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val); in mv88e6165_g1_atu_get_hash()
92 int mv88e6165_g1_atu_set_hash(struct mv88e6xxx_chip *chip, u8 hash) in mv88e6165_g1_atu_set_hash() argument
100 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val); in mv88e6165_g1_atu_set_hash()
107 return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val); in mv88e6165_g1_atu_set_hash()
112 static int mv88e6xxx_g1_atu_op_wait(struct mv88e6xxx_chip *chip) in mv88e6xxx_g1_atu_op_wait() argument
116 return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_ATU_OP, bit, 0); in mv88e6xxx_g1_atu_op_wait()
119 static int mv88e6xxx_g1_read_atu_violation(struct mv88e6xxx_chip *chip) in mv88e6xxx_g1_read_atu_violation() argument
123 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_OP, in mv88e6xxx_g1_read_atu_violation()
129 return mv88e6xxx_g1_atu_op_wait(chip); in mv88e6xxx_g1_read_atu_violation()
132 static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op) in mv88e6xxx_g1_atu_op() argument
138 if (mv88e6xxx_num_databases(chip) > 256) { in mv88e6xxx_g1_atu_op()
139 err = mv88e6xxx_g1_atu_fid_write(chip, fid); in mv88e6xxx_g1_atu_op()
143 if (mv88e6xxx_num_databases(chip) > 64) { in mv88e6xxx_g1_atu_op()
145 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, in mv88e6xxx_g1_atu_op()
151 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, in mv88e6xxx_g1_atu_op()
155 } else if (mv88e6xxx_num_databases(chip) > 16) { in mv88e6xxx_g1_atu_op()
164 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_OP, in mv88e6xxx_g1_atu_op()
169 return mv88e6xxx_g1_atu_op_wait(chip); in mv88e6xxx_g1_atu_op()
172 int mv88e6xxx_g1_atu_get_next(struct mv88e6xxx_chip *chip, u16 fid) in mv88e6xxx_g1_atu_get_next() argument
174 return mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_GET_NEXT_DB); in mv88e6xxx_g1_atu_get_next()
177 static int mv88e6xxx_g1_atu_fid_read(struct mv88e6xxx_chip *chip, u16 *fid) in mv88e6xxx_g1_atu_fid_read() argument
182 if (mv88e6xxx_num_databases(chip) > 256) { in mv88e6xxx_g1_atu_fid_read()
183 err = mv88e6xxx_g1_read(chip, MV88E6352_G1_ATU_FID, &val); in mv88e6xxx_g1_atu_fid_read()
188 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_OP, &op); in mv88e6xxx_g1_atu_fid_read()
191 if (mv88e6xxx_num_databases(chip) > 64) { in mv88e6xxx_g1_atu_fid_read()
193 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, in mv88e6xxx_g1_atu_fid_read()
199 } else if (mv88e6xxx_num_databases(chip) > 16) { in mv88e6xxx_g1_atu_fid_read()
214 static int mv88e6xxx_g1_atu_data_read(struct mv88e6xxx_chip *chip, in mv88e6xxx_g1_atu_data_read() argument
220 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_DATA, &val); in mv88e6xxx_g1_atu_data_read()
227 entry->portvec = (val >> 4) & mv88e6xxx_port_mask(chip); in mv88e6xxx_g1_atu_data_read()
233 static int mv88e6xxx_g1_atu_data_write(struct mv88e6xxx_chip *chip, in mv88e6xxx_g1_atu_data_write() argument
242 data |= (entry->portvec & mv88e6xxx_port_mask(chip)) << 4; in mv88e6xxx_g1_atu_data_write()
245 return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_DATA, data); in mv88e6xxx_g1_atu_data_write()
253 static int mv88e6xxx_g1_atu_mac_read(struct mv88e6xxx_chip *chip, in mv88e6xxx_g1_atu_mac_read() argument
260 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_MAC01 + i, &val); in mv88e6xxx_g1_atu_mac_read()
271 static int mv88e6xxx_g1_atu_mac_write(struct mv88e6xxx_chip *chip, in mv88e6xxx_g1_atu_mac_write() argument
279 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_MAC01 + i, val); in mv88e6xxx_g1_atu_mac_write()
289 int mv88e6xxx_g1_atu_getnext(struct mv88e6xxx_chip *chip, u16 fid, in mv88e6xxx_g1_atu_getnext() argument
294 err = mv88e6xxx_g1_atu_op_wait(chip); in mv88e6xxx_g1_atu_getnext()
300 err = mv88e6xxx_g1_atu_mac_write(chip, entry); in mv88e6xxx_g1_atu_getnext()
305 err = mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_GET_NEXT_DB); in mv88e6xxx_g1_atu_getnext()
309 err = mv88e6xxx_g1_atu_data_read(chip, entry); in mv88e6xxx_g1_atu_getnext()
313 return mv88e6xxx_g1_atu_mac_read(chip, entry); in mv88e6xxx_g1_atu_getnext()
316 int mv88e6xxx_g1_atu_loadpurge(struct mv88e6xxx_chip *chip, u16 fid, in mv88e6xxx_g1_atu_loadpurge() argument
321 err = mv88e6xxx_g1_atu_op_wait(chip); in mv88e6xxx_g1_atu_loadpurge()
325 err = mv88e6xxx_g1_atu_mac_write(chip, entry); in mv88e6xxx_g1_atu_loadpurge()
329 err = mv88e6xxx_g1_atu_data_write(chip, entry); in mv88e6xxx_g1_atu_loadpurge()
333 return mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_LOAD_DB); in mv88e6xxx_g1_atu_loadpurge()
336 static int mv88e6xxx_g1_atu_flushmove(struct mv88e6xxx_chip *chip, u16 fid, in mv88e6xxx_g1_atu_flushmove() argument
343 err = mv88e6xxx_g1_atu_op_wait(chip); in mv88e6xxx_g1_atu_flushmove()
347 err = mv88e6xxx_g1_atu_data_write(chip, entry); in mv88e6xxx_g1_atu_flushmove()
361 return mv88e6xxx_g1_atu_op(chip, fid, op); in mv88e6xxx_g1_atu_flushmove()
364 int mv88e6xxx_g1_atu_flush(struct mv88e6xxx_chip *chip, u16 fid, bool all) in mv88e6xxx_g1_atu_flush() argument
370 return mv88e6xxx_g1_atu_flushmove(chip, fid, &entry, all); in mv88e6xxx_g1_atu_flush()
373 static int mv88e6xxx_g1_atu_move(struct mv88e6xxx_chip *chip, u16 fid, in mv88e6xxx_g1_atu_move() argument
380 if (!chip->info->atu_move_port_mask) in mv88e6xxx_g1_atu_move()
383 mask = chip->info->atu_move_port_mask; in mv88e6xxx_g1_atu_move()
390 return mv88e6xxx_g1_atu_flushmove(chip, fid, &entry, all); in mv88e6xxx_g1_atu_move()
393 int mv88e6xxx_g1_atu_remove(struct mv88e6xxx_chip *chip, u16 fid, int port, in mv88e6xxx_g1_atu_remove() argument
397 int to_port = chip->info->atu_move_port_mask; in mv88e6xxx_g1_atu_remove()
399 return mv88e6xxx_g1_atu_move(chip, fid, from_port, to_port, all); in mv88e6xxx_g1_atu_remove()
404 struct mv88e6xxx_chip *chip = dev_id; in mv88e6xxx_g1_atu_prob_irq_thread_fn() local
409 mv88e6xxx_reg_lock(chip); in mv88e6xxx_g1_atu_prob_irq_thread_fn()
411 err = mv88e6xxx_g1_read_atu_violation(chip); in mv88e6xxx_g1_atu_prob_irq_thread_fn()
415 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_OP, &val); in mv88e6xxx_g1_atu_prob_irq_thread_fn()
419 err = mv88e6xxx_g1_atu_fid_read(chip, &fid); in mv88e6xxx_g1_atu_prob_irq_thread_fn()
423 err = mv88e6xxx_g1_atu_data_read(chip, &entry); in mv88e6xxx_g1_atu_prob_irq_thread_fn()
427 err = mv88e6xxx_g1_atu_mac_read(chip, &entry); in mv88e6xxx_g1_atu_prob_irq_thread_fn()
431 mv88e6xxx_reg_unlock(chip); in mv88e6xxx_g1_atu_prob_irq_thread_fn()
436 trace_mv88e6xxx_atu_member_violation(chip->dev, spid, in mv88e6xxx_g1_atu_prob_irq_thread_fn()
439 chip->ports[spid].atu_member_violation++; in mv88e6xxx_g1_atu_prob_irq_thread_fn()
443 trace_mv88e6xxx_atu_miss_violation(chip->dev, spid, in mv88e6xxx_g1_atu_prob_irq_thread_fn()
446 chip->ports[spid].atu_miss_violation++; in mv88e6xxx_g1_atu_prob_irq_thread_fn()
448 if (fid != MV88E6XXX_FID_STANDALONE && chip->ports[spid].mab) { in mv88e6xxx_g1_atu_prob_irq_thread_fn()
449 err = mv88e6xxx_handle_miss_violation(chip, spid, in mv88e6xxx_g1_atu_prob_irq_thread_fn()
457 trace_mv88e6xxx_atu_full_violation(chip->dev, spid, in mv88e6xxx_g1_atu_prob_irq_thread_fn()
460 if (spid < ARRAY_SIZE(chip->ports)) in mv88e6xxx_g1_atu_prob_irq_thread_fn()
461 chip->ports[spid].atu_full_violation++; in mv88e6xxx_g1_atu_prob_irq_thread_fn()
467 mv88e6xxx_reg_unlock(chip); in mv88e6xxx_g1_atu_prob_irq_thread_fn()
470 dev_err(chip->dev, "ATU problem: error %d while handling interrupt\n", in mv88e6xxx_g1_atu_prob_irq_thread_fn()
475 int mv88e6xxx_g1_atu_prob_irq_setup(struct mv88e6xxx_chip *chip) in mv88e6xxx_g1_atu_prob_irq_setup() argument
479 chip->atu_prob_irq = irq_find_mapping(chip->g1_irq.domain, in mv88e6xxx_g1_atu_prob_irq_setup()
481 if (chip->atu_prob_irq < 0) in mv88e6xxx_g1_atu_prob_irq_setup()
482 return chip->atu_prob_irq; in mv88e6xxx_g1_atu_prob_irq_setup()
484 snprintf(chip->atu_prob_irq_name, sizeof(chip->atu_prob_irq_name), in mv88e6xxx_g1_atu_prob_irq_setup()
485 "mv88e6xxx-%s-g1-atu-prob", dev_name(chip->dev)); in mv88e6xxx_g1_atu_prob_irq_setup()
487 err = request_threaded_irq(chip->atu_prob_irq, NULL, in mv88e6xxx_g1_atu_prob_irq_setup()
489 IRQF_ONESHOT, chip->atu_prob_irq_name, in mv88e6xxx_g1_atu_prob_irq_setup()
490 chip); in mv88e6xxx_g1_atu_prob_irq_setup()
492 irq_dispose_mapping(chip->atu_prob_irq); in mv88e6xxx_g1_atu_prob_irq_setup()
497 void mv88e6xxx_g1_atu_prob_irq_free(struct mv88e6xxx_chip *chip) in mv88e6xxx_g1_atu_prob_irq_free() argument
499 free_irq(chip->atu_prob_irq, chip); in mv88e6xxx_g1_atu_prob_irq_free()
500 irq_dispose_mapping(chip->atu_prob_irq); in mv88e6xxx_g1_atu_prob_irq_free()