Lines Matching defs:emc_dbg
36 #define emc_dbg(emc, flags, ...) dev_dbg(emc->dev, __VA_ARGS__)
108 emc_dbg(emc, EMA_UPDATES, "%s: (s=%u) EMA: %u\n", \
262 emc_dbg(emc, PER_TRAIN, "Periodic training starting\n");
311 emc_dbg(emc, EMA_WRITES, "0x%08x <= 0x%08x\n",
368 u32 emc_dbg, emc_cfg_pipe_clk, emc_pin;
376 emc_dbg(emc, INFO, "Running clock change.\n");
413 emc_dbg = emc_readl(emc, EMC_DBG);
427 emc_dbg(emc, INFO, "Clock change version: %d\n",
429 emc_dbg(emc, INFO, "DRAM type = %d\n", dram_type);
430 emc_dbg(emc, INFO, "DRAM dev #: %u\n", emc->num_devices);
431 emc_dbg(emc, INFO, "Next EMC clksrc: 0x%08x\n", clksrc);
432 emc_dbg(emc, INFO, "DLL clksrc: 0x%08x\n", next->dll_clk_src);
433 emc_dbg(emc, INFO, "last rate: %u, next rate %u\n", last->rate,
435 emc_dbg(emc, INFO, "last period: %u, next period: %u\n",
437 emc_dbg(emc, INFO, " shared_zq_resistor: %d\n", !!shared_zq_resistor);
438 emc_dbg(emc, INFO, " num_channels: %u\n", emc->num_channels);
439 emc_dbg(emc, INFO, " opt_dll_mode: %d\n", opt_dll_mode);
445 emc_dbg(emc, STEPS, "Step 1\n");
446 emc_dbg(emc, STEPS, "Step 1.1: Disable DLL temporarily.\n");
458 emc_dbg(emc, STEPS, "Step 1.2: Disable AUTOCAL temporarily.\n");
469 emc_dbg(emc, STEPS, "Step 1.3: Disable other power features.\n");
568 emc_dbg(emc, STEPS, "Step 2\n");
572 emc_dbg(emc, INFO, "Prelock enabled for target frequency.\n");
574 emc_dbg(emc, INFO, "DLL out: 0x%03x\n", value);
576 emc_dbg(emc, INFO, "Disabling DLL for target frequency.\n");
584 emc_dbg(emc, STEPS, "Step 3\n");
604 emc_dbg(emc, STEPS, "Step 4\n");
615 emc_dbg(emc, STEPS, "Step 5\n");
632 emc_dbg(emc, STEPS, "Step 6\n");
638 emc_dbg(emc, STEPS, "Step 7\n");
639 emc_dbg(emc, SUB_STEPS, "Step 7.1: Bug 200024907 - Patch RP R2P");
672 emc_dbg(emc, INFO, "tRTM = %u, EMC_RP = %u\n", tRTM,
723 emc_dbg(emc, INFO, "Skipped WAR\n");
745 emc_dbg(emc, STEPS, "Step 8\n");
746 emc_dbg(emc, SUB_STEPS, "Writing burst_regs\n");
825 emc_dbg(emc, SUB_STEPS, "Writing burst_regs_per_ch\n");
851 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
859 emc_dbg(emc, SUB_STEPS, "Writing vref_regs\n");
871 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
878 emc_dbg(emc, SUB_STEPS, "Writing trim_regs\n");
898 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
900 emc_dbg(emc, EMA_WRITES, "0x%08x <= 0x%08x\n",
904 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
911 emc_dbg(emc, SUB_STEPS, "Writing trim_regs_per_ch\n");
938 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
940 emc_dbg(emc, EMA_WRITES, "0x%08x <= 0x%08x\n", offset,
944 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
951 emc_dbg(emc, SUB_STEPS, "Writing burst_mc_regs\n");
957 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
966 emc_dbg(emc, SUB_STEPS, "Writing la_scale_regs\n");
969 emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,
982 emc_dbg(emc, STEPS, "Step 9\n");
991 value = emc_dbg | (EMC_DBG_WRITE_MUX_ACTIVE |
996 emc_writel(emc, emc_dbg, EMC_DBG);
1003 emc_dbg(emc, STEPS, "Step 10\n");
1100 emc_dbg(emc, STEPS, "Step 11\n");
1104 value = emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE | EMC_DBG_WRITE_ACTIVE_ONLY;
1114 emc_dbg(emc, STEPS, "Step 12\n");
1124 emc_dbg(emc, STEPS, "Step 13\n");
1127 ccfifo_writel(emc, emc_dbg, EMC_DBG, 0);
1133 emc_dbg(emc, STEPS, "Step 14\n");
1150 emc_dbg(emc, STEPS, "Step 15\n");
1162 emc_dbg(emc, INFO, "tZQCAL_lpddr4_fc_adj = %u\n", tZQCAL_lpddr4_fc_adj);
1163 emc_dbg(emc, INFO, "dst_clk_period = %u\n",
1165 emc_dbg(emc, INFO, "next->dram_timings[T_PDEX] = %u\n",
1167 emc_dbg(emc, INFO, "zq_latch_dvfs_wait_time = %d\n",
1239 emc_dbg(emc, STEPS, "Step 17\n");
1248 emc_dbg(emc, STEPS, "Step 18\n");
1269 emc_dbg(emc, STEPS, "Step 19\n");
1329 emc_dbg(emc, STEPS, "Step 20\n");
1343 emc_dbg(emc, STEPS, "Step 21\n");
1346 ccfifo_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE,
1356 ccfifo_writel(emc, emc_dbg, EMC_DBG, 0);
1363 emc_dbg(emc, STEPS, "Step 22\n");
1383 emc_dbg(emc, STEPS, "Step 23\n");
1405 emc_dbg(emc, STEPS, "Step 25\n");
1419 emc_dbg(emc, STEPS, "Step 26\n");
1448 emc_dbg(emc, STEPS, "Step 27\n");
1461 emc_dbg(emc, STEPS, "Step 28\n");
1473 emc_dbg(emc, STEPS, "Step 29\n");
1494 emc_dbg(emc, STEPS, "Step 30: Re-enable DLL and AUTOCAL\n");