1 // SPDX-License-Identifier: GPL-2.0-only
6  * SPI communication derived from ad7923.c and ti-ads7950.c
16 #include <linux/gpio/driver.h>
25 #include <linux/iio/adc-helpers.h>
41 	/* 16-bit TX, valid data in high byte */
43 	/* 8-bit address followed by 8-bit data */
45 	/* 12-bit of ADC data or 8 bit of reg data */
50  * The ADC data is read issuing SPI-command matching the channel number.
58  * read for a channel, which input pin is muxed to be a GPIO.
96  * Read transaction consists of two 16-bit sequences separated by CSB.
100  * First 16-bit sequence, MOSI as below, MISO data ignored:
101  * - SCK: | 1 | 2 |   3   |    4   | 5 .. 8 | 9 .. 16 |
102  * - MOSI:| 0 | 0 | IOSET | RW (1) |  ADDR  |  8'b0   |
104  * CSB released and re-acquired between these sequences
106  * Second 16-bit sequence, MISO as below, MOSI data ignored:
108  *   - SCK: | 1 .. 8 |   9 .. 16   |
109  *   - MISO:|  8'b0  | 8-bit data  |
112  *   - SCK: | 1 |      2      | 3  4 |   4 .. 16   |
113  *   - MISO:| 0 | STATUS_FLAG | 2'b0 | 12-bit data |
114  *     The 'STATUS_FLAG' is set if the read input pin was configured as a GPIO.
124 	data->read_tx[0] = reg;  in bd79112_reg_read()
126 	ret = spi_sync(data->spi, &data->read_msg);  in bd79112_reg_read()
128 		*val = be16_to_cpu(data->read_rx);  in bd79112_reg_read()
134  * Write, single 16-bit sequence (broken down below):
136  * First 8-bit, MOSI as below, MISO data ignored:
137  * - SCK: | 1 | 2 | 3   | 4     | 5 .. 8 |
138  * - MOSI:| 0 | 0 |IOSET| RW(0) | ADDR   |
140  * Last 8 SCK cycles (b8 ... b15), MISO contains register data, MOSI ignored.
141  * - SCK: | 9 .. 16 |
142  * - MISO:|  data   |
148 	data->reg_write_tx[0] = reg;  in bd79112_reg_write()
149 	data->reg_write_tx[1] = val;  in bd79112_reg_write()
151 	return spi_sync(data->spi, &data->write_msg);  in bd79112_reg_write()
159 		return -EINVAL;  in _get_gpio_reg()
161 	return base - regoffset;  in _get_gpio_reg()
205 		ret = regmap_read(data->map, chan->channel, val);  in bd79112_read_raw()
212 		*val = data->vref_mv;  in bd79112_read_raw()
217 		return -EINVAL;  in bd79112_read_raw()
238 	*valid_mask = data->gpio_valid_mask;  in bd79112_gpio_init_valid_mask()
252 	ret = regmap_read(data->map, reg, &val);  in bd79112_gpio_dir_get()
260 	ret = regmap_read(data->map, reg, &val);  in bd79112_gpio_dir_get()
268 	 * Ouch. Seems the pin is ADC input - shouldn't happen as changing mux  in bd79112_gpio_dir_get()
269 	 * at runtime is not supported and non GPIO pins should be invalidated  in bd79112_gpio_dir_get()
273 	dev_err(data->dev, "Pin not a GPIO\n");  in bd79112_gpio_dir_get()
275 	return -EINVAL;  in bd79112_gpio_dir_get()
287 	ret = regmap_read(data->map, reg, &val);  in bd79112_gpio_get()
303 	return regmap_assign_bits(data->map, reg, bit, value);  in bd79112_gpio_set()
312 	for_each_set_clump8(i, bank_mask, mask, gc->ngpio) {  in bd79112_gpio_set_multiple()
318 		reg = BD79112_REG_GPO_VALUE_A0_A7 - i / 8;  in bd79112_gpio_set_multiple()
319 		ret = regmap_update_bits(data->map, reg, bank_mask, bank_bits);  in bd79112_gpio_set_multiple()
338 		ret = regmap_clear_bits(data->map, gpi_reg, bit);  in bd79112_gpio_dir_set()
342 		return regmap_set_bits(data->map, gpo_reg, bit);  in bd79112_gpio_dir_set()
345 	ret = regmap_set_bits(data->map, gpi_reg, bit);  in bd79112_gpio_dir_set()
349 	return regmap_clear_bits(data->map, gpo_reg, bit);  in bd79112_gpio_dir_set()
373 	.label			= "bd79112-gpio",
383 	.base			= -1,
402 /* ADC channels as named in the data-sheet */
404 	"AGIO0A", "AGIO1A", "AGIO2A", "AGIO3A",		/* 0 - 3 */
405 	"AGIO4A", "AGIO5A", "AGIO6A", "AGIO7A",		/* 4 - 7 */
406 	"AGIO8A", "AGIO9A", "AGIO10A", "AGIO11A",	/* 8 - 11 */
407 	"AGIO12A", "AGIO13A", "AGIO14A", "AGIO15A",	/* 12 - 15 */
408 	"AGIO0B", "AGIO1B", "AGIO2B", "AGIO3B",		/* 16 - 19 */
409 	"AGIO4B", "AGIO5B", "AGIO6B", "AGIO7B",		/* 20 - 23 */
410 	"AGIO8B", "AGIO9B", "AGIO10B", "AGIO11B",	/* 24 - 27 */
411 	"AGIO12B", "AGIO13B", "AGIO14B", "AGIO15B",	/* 28 - 31 */
419 	struct device *dev = &spi->dev;  in bd79112_probe()
426 		return -ENOMEM;  in bd79112_probe()
429 	data->spi = spi;  in bd79112_probe()
430 	data->dev = dev;  in bd79112_probe()
431 	data->map = devm_regmap_init(dev, NULL, data, &bd79112_regmap);  in bd79112_probe()
432 	if (IS_ERR(data->map))  in bd79112_probe()
433 		return dev_err_probe(dev, PTR_ERR(data->map),  in bd79112_probe()
440 	data->vref_mv = ret / 1000;  in bd79112_probe()
446 	data->read_xfer[0].tx_buf = &data->read_tx[0];  in bd79112_probe()
447 	data->read_xfer[0].len = sizeof(data->read_tx);  in bd79112_probe()
448 	data->read_xfer[0].cs_change = 1;  in bd79112_probe()
449 	data->read_xfer[1].rx_buf = &data->read_rx;  in bd79112_probe()
450 	data->read_xfer[1].len = sizeof(data->read_rx);  in bd79112_probe()
451 	spi_message_init_with_transfers(&data->read_msg, data->read_xfer, 2);  in bd79112_probe()
452 	ret = devm_spi_optimize_message(dev, spi, &data->read_msg);  in bd79112_probe()
457 	data->write_xfer.tx_buf = &data->reg_write_tx[0];  in bd79112_probe()
458 	data->write_xfer.len = sizeof(data->reg_write_tx);  in bd79112_probe()
459 	spi_message_init_with_transfers(&data->write_msg, &data->write_xfer, 1);  in bd79112_probe()
460 	ret = devm_spi_optimize_message(dev, spi, &data->write_msg);  in bd79112_probe()
466 						    BD79112_MAX_NUM_CHANNELS - 1,  in bd79112_probe()
470 	if (ret == -ENOENT)  in bd79112_probe()
476 	iio_dev->num_channels = ret;  in bd79112_probe()
477 	iio_dev->channels = cs;  in bd79112_probe()
479 	for (i = 0; i < iio_dev->num_channels; i++)  in bd79112_probe()
482 	iio_dev->info = &bd79112_info;  in bd79112_probe()
483 	iio_dev->name = "bd79112";  in bd79112_probe()
484 	iio_dev->modes = INDIO_DIRECT_MODE;  in bd79112_probe()
488 	 * device early (before checking which pins are to be used for GPIO)  in bd79112_probe()
490 	 * GPIO.  in bd79112_probe()
493 		ret = regmap_write(data->map, BD79112_FIRST_GPIO_EN_REG + i, 0);  in bd79112_probe()
499 	ret = devm_iio_device_register(data->dev, iio_dev);  in bd79112_probe()
501 		return dev_err_probe(data->dev, ret, "Failed to register ADC\n");  in bd79112_probe()
504 	gpio_pins = bd79112_get_gpio_pins(iio_dev->channels,  in bd79112_probe()
505 					  iio_dev->num_channels);  in bd79112_probe()
511 	/* Default all the GPIO pins to GPI */  in bd79112_probe()
519 	data->gpio_valid_mask = gpio_pins;  in bd79112_probe()
520 	data->gc = bd79112_gpio_chip;  in bd79112_probe()
521 	data->gc.parent = dev;  in bd79112_probe()
523 	return devm_gpiochip_add_data(dev, &data->gc, data);  in bd79112_probe()
549 MODULE_DESCRIPTION("Driver for ROHM BD79112 ADC/GPIO");