Lines Matching defs:master_ctl

113 gu_misc_irq_ack(struct xe_device *xe, const u32 master_ctl)
118 	if (!(master_ctl & GU_MISC_IRQ))
353 			   u32 master_ctl, unsigned long *intr_dw,
366 		if (!(master_ctl & GT_DW_IRQ(bank)))
416 	u32 master_ctl, gu_misc_iir;
423 	master_ctl = xelp_intr_disable(xe);
424 	if (!master_ctl) {
429 	gt_irq_handler(tile, master_ctl, intr_dw, identity);
431 	xe_display_irq_handler(xe, master_ctl);
433 	gu_misc_iir = gu_misc_irq_ack(xe, master_ctl);
478 	u32 master_tile_ctl, master_ctl = 0, gu_misc_iir = 0;
500 		master_ctl = xe_mmio_read32(mmio, GFX_MSTR_IRQ);
507 		if (master_ctl == REG_GENMASK(31, 0)) {
513 		xe_mmio_write32(mmio, GFX_MSTR_IRQ, master_ctl);
515 		gt_irq_handler(tile, master_ctl, intr_dw, identity);
516 		xe_hw_error_irq_handler(tile, master_ctl);
525 				xe_heci_csc_irq_handler(xe, master_ctl);
526 			xe_display_irq_handler(xe, master_ctl);
527 			xe_i2c_irq_handler(xe, master_ctl);
528 			gu_misc_iir = gu_misc_irq_ack(xe, master_ctl);