38 /* enable the audio stream */
72 	struct drm_device *dev = encoder->dev;  in evergreen_hdmi_update_acr()
73 	struct radeon_device *rdev = dev->dev_private;  in evergreen_hdmi_update_acr()
76 	if (encoder->crtc) {  in evergreen_hdmi_update_acr()
77 		struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);  in evergreen_hdmi_update_acr()
78 		bpc = radeon_crtc->bpc;  in evergreen_hdmi_update_acr()
89 	WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz));  in evergreen_hdmi_update_acr()
90 	WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz);  in evergreen_hdmi_update_acr()
92 	WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz));  in evergreen_hdmi_update_acr()
93 	WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz);  in evergreen_hdmi_update_acr()
95 	WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz));  in evergreen_hdmi_update_acr()
96 	WREG32(HDMI_ACR_48_1 + offset, acr->n_48khz);  in evergreen_hdmi_update_acr()
102 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce4_afmt_write_latency_fields()
105 	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {  in dce4_afmt_write_latency_fields()
106 		if (connector->latency_present[1])  in dce4_afmt_write_latency_fields()
107 			tmp = VIDEO_LIPSYNC(connector->video_latency[1]) |  in dce4_afmt_write_latency_fields()
108 				AUDIO_LIPSYNC(connector->audio_latency[1]);  in dce4_afmt_write_latency_fields()
112 		if (connector->latency_present[0])  in dce4_afmt_write_latency_fields()
113 			tmp = VIDEO_LIPSYNC(connector->video_latency[0]) |  in dce4_afmt_write_latency_fields()
114 				AUDIO_LIPSYNC(connector->audio_latency[0]);  in dce4_afmt_write_latency_fields()
124 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce4_afmt_hdmi_write_speaker_allocation()
142 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce4_afmt_dp_write_speaker_allocation()
161 	struct radeon_device *rdev = encoder->dev->dev_private;  in evergreen_hdmi_write_sad_regs()
180 		int max_channels = -1;  in evergreen_hdmi_write_sad_regs()
186 			if (sad->format == eld_reg_to_type[i][1]) {  in evergreen_hdmi_write_sad_regs()
187 				if (sad->channels > max_channels) {  in evergreen_hdmi_write_sad_regs()
188 					value = MAX_CHANNELS(sad->channels) |  in evergreen_hdmi_write_sad_regs()
189 						DESCRIPTOR_BYTE_2(sad->byte2) |  in evergreen_hdmi_write_sad_regs()
190 						SUPPORTED_FREQUENCIES(sad->freq);  in evergreen_hdmi_write_sad_regs()
191 					max_channels = sad->channels;  in evergreen_hdmi_write_sad_regs()
194 				if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM)  in evergreen_hdmi_write_sad_regs()
195 					stereo_freqs |= sad->freq;  in evergreen_hdmi_write_sad_regs()
260 		value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);  in dce4_hdmi_audio_set_dto()
286 		value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);  in dce4_dp_audio_set_dto()
310 	struct drm_device *dev = encoder->dev;  in dce4_set_vbi_packet()
311 	struct radeon_device *rdev = dev->dev_private;  in dce4_set_vbi_packet()
321 	struct drm_device *dev = encoder->dev;  in dce4_hdmi_set_color_depth()
322 	struct radeon_device *rdev = dev->dev_private;  in dce4_hdmi_set_color_depth()
337 					 connector->name, bpc);  in dce4_hdmi_set_color_depth()
343 					 connector->name);  in dce4_hdmi_set_color_depth()
349 					 connector->name);  in dce4_hdmi_set_color_depth()
358 	struct drm_device *dev = encoder->dev;  in dce4_set_audio_packet()
359 	struct radeon_device *rdev = dev->dev_private;  in dce4_set_audio_packet()
362 		AFMT_AUDIO_INFO_UPDATE); /* required for audio info values to be updated */  in dce4_set_audio_packet()
382 	       HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */  in dce4_set_audio_packet()
383 …HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for al…  in dce4_set_audio_packet()
385 	/* allow 60958 channel status and send audio packets fields to be updated */  in dce4_set_audio_packet()
393 	struct drm_device *dev = encoder->dev;  in dce4_set_mute()
394 	struct radeon_device *rdev = dev->dev_private;  in dce4_set_mute()
402 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)  in evergreen_hdmi_enable()  argument
404 	struct drm_device *dev = encoder->dev;  in evergreen_hdmi_enable()
405 	struct radeon_device *rdev = dev->dev_private;  in evergreen_hdmi_enable()
407 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;  in evergreen_hdmi_enable()
409 	if (!dig || !dig->afmt)  in evergreen_hdmi_enable()
412 	if (enable) {  in evergreen_hdmi_enable()
415 		if (connector && connector->display_info.has_audio) {  in evergreen_hdmi_enable()
416 			WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,  in evergreen_hdmi_enable()
417 			       HDMI_AVI_INFO_SEND | /* enable AVI info frames */  in evergreen_hdmi_enable()
418 			       HDMI_AVI_INFO_CONT | /* required for audio info values to be updated */  in evergreen_hdmi_enable()
419 … HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */  in evergreen_hdmi_enable()
420 			       HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */  in evergreen_hdmi_enable()
421 			WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,  in evergreen_hdmi_enable()
424 			WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,  in evergreen_hdmi_enable()
425 			       HDMI_AVI_INFO_SEND | /* enable AVI info frames */  in evergreen_hdmi_enable()
426 			       HDMI_AVI_INFO_CONT); /* required for audio info values to be updated */  in evergreen_hdmi_enable()
427 			WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,  in evergreen_hdmi_enable()
431 		WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,  in evergreen_hdmi_enable()
433 		WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0);  in evergreen_hdmi_enable()
436 	dig->afmt->enabled = enable;  in evergreen_hdmi_enable()
439 		  enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);  in evergreen_hdmi_enable()
442 void evergreen_dp_enable(struct drm_encoder *encoder, bool enable)  in evergreen_dp_enable()  argument
444 	struct drm_device *dev = encoder->dev;  in evergreen_dp_enable()
445 	struct radeon_device *rdev = dev->dev_private;  in evergreen_dp_enable()
447 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;  in evergreen_dp_enable()
450 	if (!dig || !dig->afmt)  in evergreen_dp_enable()
453 	if (enable && connector && connector->display_info.has_audio) {  in evergreen_dp_enable()
459 		WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,  in evergreen_dp_enable()
462 		WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset,  in evergreen_dp_enable()
465 		if (!ASIC_IS_DCE6(rdev) && radeon_connector->con_priv) {  in evergreen_dp_enable()
466 			dig_connector = radeon_connector->con_priv;  in evergreen_dp_enable()
467 			val = RREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset);  in evergreen_dp_enable()
470 			if (dig_connector->dp_clock == 162000)  in evergreen_dp_enable()
475 			WREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset, val);  in evergreen_dp_enable()
478 		WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset,  in evergreen_dp_enable()
479 			EVERGREEN_DP_SEC_ASP_ENABLE |		/* Audio packet transmission */  in evergreen_dp_enable()
480 			EVERGREEN_DP_SEC_ATP_ENABLE |		/* Audio timestamp packet transmission */  in evergreen_dp_enable()
481 			EVERGREEN_DP_SEC_AIP_ENABLE |		/* Audio infoframe packet transmission */  in evergreen_dp_enable()
482 			EVERGREEN_DP_SEC_STREAM_ENABLE);	/* Master enable for secondary stream engine */  in evergreen_dp_enable()
484 		WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0);  in evergreen_dp_enable()
485 		WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,  in evergreen_dp_enable()
489 	dig->afmt->enabled = enable;  in evergreen_dp_enable()