526 	struct intel_vgpu_shadow_bb *bb;  in prepare_shadow_batch_buffer()  local
530 	list_for_each_entry(bb, &workload->shadow_bb, list) {  in prepare_shadow_batch_buffer()
538 		if (bb->bb_offset)  in prepare_shadow_batch_buffer()
539 			bb->bb_start_cmd_va = workload->shadow_ring_buffer_va  in prepare_shadow_batch_buffer()
540 				+ bb->bb_offset;  in prepare_shadow_batch_buffer()
551 		if (!bb->ppgtt) {  in prepare_shadow_batch_buffer()
554 			i915_gem_object_lock(bb->obj, &ww);  in prepare_shadow_batch_buffer()
556 			bb->vma = i915_gem_object_ggtt_pin_ww(bb->obj, &ww,  in prepare_shadow_batch_buffer()
558 			if (IS_ERR(bb->vma)) {  in prepare_shadow_batch_buffer()
559 				ret = PTR_ERR(bb->vma);  in prepare_shadow_batch_buffer()
569 			bb->bb_start_cmd_va[1] = i915_ggtt_offset(bb->vma);  in prepare_shadow_batch_buffer()
571 				bb->bb_start_cmd_va[2] = 0;  in prepare_shadow_batch_buffer()
573 			ret = i915_vma_move_to_active(bb->vma, workload->req,  in prepare_shadow_batch_buffer()
579 			i915_gem_object_flush_map(bb->obj);  in prepare_shadow_batch_buffer()
658 	struct intel_vgpu_shadow_bb *bb, *pos;  in release_shadow_batch_buffer()  local
663 	bb = list_first_entry(&workload->shadow_bb,  in release_shadow_batch_buffer()
666 	list_for_each_entry_safe(bb, pos, &workload->shadow_bb, list) {  in release_shadow_batch_buffer()
667 		if (bb->obj) {  in release_shadow_batch_buffer()
668 			i915_gem_object_lock(bb->obj, NULL);  in release_shadow_batch_buffer()
669 			if (bb->va && !IS_ERR(bb->va))  in release_shadow_batch_buffer()
670 				i915_gem_object_unpin_map(bb->obj);  in release_shadow_batch_buffer()
672 			if (bb->vma && !IS_ERR(bb->vma))  in release_shadow_batch_buffer()
673 				i915_vma_unpin(bb->vma);  in release_shadow_batch_buffer()
675 			i915_gem_object_unlock(bb->obj);  in release_shadow_batch_buffer()
676 			i915_gem_object_put(bb->obj);  in release_shadow_batch_buffer()
678 		list_del(&bb->list);  in release_shadow_batch_buffer()
679 		kfree(bb);  in release_shadow_batch_buffer()