Lines Matching +full:data +full:- +full:mirror

1 // SPDX-License-Identifier: GPL-2.0-only
22 * Interval to flush dirty data for next CTX entry. The interval is measured
38 if (eng_grp->g->engs_num < 0 || in get_cores_bmap()
39 eng_grp->g->engs_num > OTX2_CPT_MAX_ENGINES) { in get_cores_bmap()
41 eng_grp->g->engs_num); in get_cores_bmap()
46 if (eng_grp->engs[i].type) { in get_cores_bmap()
48 eng_grp->engs[i].bmap, in get_cores_bmap()
49 eng_grp->g->engs_num); in get_cores_bmap()
50 bmap.size = eng_grp->g->engs_num; in get_cores_bmap()
57 eng_grp->idx); in get_cores_bmap()
68 if (eng_grp->ucode[1].type) in is_2nd_ucode_used()
77 strscpy(ucode->filename, filename, OTX2_CPT_NAME_LENGTH); in set_ucode_filename()
133 strscpy(tmp_ver_str, ucode_hdr->ver_str, OTX2_CPT_UCODE_VER_STR_SZ); in get_ucode_type()
137 sprintf(ver_str_prefix, "ocpt-%02d", rid); in get_ucode_type()
139 return -EINVAL; in get_ucode_type()
141 nn = ucode_hdr->ver_num.nn; in get_ucode_type()
142 if (strnstr(tmp_ver_str, "se-", OTX2_CPT_UCODE_VER_STR_SZ) && in get_ucode_type()
146 if (strnstr(tmp_ver_str, "ie-", OTX2_CPT_UCODE_VER_STR_SZ) && in get_ucode_type()
157 return -EINVAL; in get_ucode_type()
165 return otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in __write_ucode_base()
178 ret = otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_set_ucode_base()
180 rvu_make_pcifunc(cptpf->pdev, in cptx_set_ucode_base()
181 cptpf->pf_id, 0), in cptx_set_ucode_base()
187 engs = &eng_grp->engs[i]; in cptx_set_ucode_base()
188 if (!engs->type) in cptx_set_ucode_base()
191 dma_addr = engs->ucode->dma; in cptx_set_ucode_base()
197 for_each_set_bit(bit, engs->bmap, eng_grp->g->engs_num) in cptx_set_ucode_base()
198 if (!eng_grp->g->eng_ref_cnt[bit]) { in cptx_set_ucode_base()
213 if (cptpf->has_cpt1) { in cpt_set_ucode_base()
232 ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_detach_and_disable_cores()
237 if (reg & (1ull << eng_grp->idx)) { in cptx_detach_and_disable_cores()
238 eng_grp->g->eng_ref_cnt[i]--; in cptx_detach_and_disable_cores()
239 reg &= ~(1ull << eng_grp->idx); in cptx_detach_and_disable_cores()
241 ret = otx2_cpt_write_af_reg(&cptpf->afpf_mbox, in cptx_detach_and_disable_cores()
242 cptpf->pdev, in cptx_detach_and_disable_cores()
254 if (timeout-- < 0) in cptx_detach_and_disable_cores()
255 return -EBUSY; in cptx_detach_and_disable_cores()
258 ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, in cptx_detach_and_disable_cores()
259 cptpf->pdev, in cptx_detach_and_disable_cores()
274 if (!eng_grp->g->eng_ref_cnt[i]) { in cptx_detach_and_disable_cores()
275 ret = otx2_cpt_write_af_reg(&cptpf->afpf_mbox, in cptx_detach_and_disable_cores()
276 cptpf->pdev, in cptx_detach_and_disable_cores()
294 bmap = get_cores_bmap(&cptpf->pdev->dev, eng_grp); in cpt_detach_and_disable_cores()
296 return -EINVAL; in cpt_detach_and_disable_cores()
298 if (cptpf->has_cpt1) { in cpt_detach_and_disable_cores()
318 ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_attach_and_enable_cores()
323 if (!(reg & (1ull << eng_grp->idx))) { in cptx_attach_and_enable_cores()
324 eng_grp->g->eng_ref_cnt[i]++; in cptx_attach_and_enable_cores()
325 reg |= 1ull << eng_grp->idx; in cptx_attach_and_enable_cores()
327 ret = otx2_cpt_write_af_reg(&cptpf->afpf_mbox, in cptx_attach_and_enable_cores()
328 cptpf->pdev, in cptx_attach_and_enable_cores()
338 ret = otx2_cpt_add_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_attach_and_enable_cores()
344 return otx2_cpt_send_af_reg_requests(&cptpf->afpf_mbox, cptpf->pdev); in cptx_attach_and_enable_cores()
354 bmap = get_cores_bmap(&cptpf->pdev->dev, eng_grp); in cpt_attach_and_enable_cores()
356 return -EINVAL; in cpt_attach_and_enable_cores()
358 if (cptpf->has_cpt1) { in cpt_attach_and_enable_cores()
377 return -ENOMEM; in load_fw()
379 ret = request_firmware(&uc_info->fw, filename, dev); in load_fw()
383 ucode_hdr = (struct otx2_cpt_ucode_hdr *)uc_info->fw->data; in load_fw()
388 ucode_size = ntohl(ucode_hdr->code_length) * 2; in load_fw()
391 ret = -EINVAL; in load_fw()
395 set_ucode_filename(&uc_info->ucode, filename); in load_fw()
396 memcpy(uc_info->ucode.ver_str, ucode_hdr->ver_str, in load_fw()
398 uc_info->ucode.ver_str[OTX2_CPT_UCODE_VER_STR_SZ] = 0; in load_fw()
399 uc_info->ucode.ver_num = ucode_hdr->ver_num; in load_fw()
400 uc_info->ucode.type = ucode_type; in load_fw()
401 uc_info->ucode.size = ucode_size; in load_fw()
402 list_add_tail(&uc_info->list, &fw_info->ucodes); in load_fw()
407 release_firmware(uc_info->fw); in load_fw()
420 list_for_each_entry_safe(curr, temp, &fw_info->ucodes, list) { in cpt_ucode_release_fw()
421 list_del(&curr->list); in cpt_ucode_release_fw()
422 release_firmware(curr->fw); in cpt_ucode_release_fw()
432 list_for_each_entry(curr, &fw_info->ucodes, list) { in get_ucode()
433 if (!is_eng_type(curr->ucode.type, ucode_type)) in get_ucode()
445 list_for_each_entry(curr, &fw_info->ucodes, list) { in print_uc_info()
446 pr_debug("Ucode filename %s\n", curr->ucode.filename); in print_uc_info()
447 pr_debug("Ucode version string %s\n", curr->ucode.ver_str); in print_uc_info()
449 curr->ucode.ver_num.nn, curr->ucode.ver_num.xx, in print_uc_info()
450 curr->ucode.ver_num.yy, curr->ucode.ver_num.zz); in print_uc_info()
451 pr_debug("Ucode type (%d) %s\n", curr->ucode.type, in print_uc_info()
452 get_ucode_type_str(curr->ucode.type)); in print_uc_info()
453 pr_debug("Ucode size %d\n", curr->ucode.size); in print_uc_info()
454 pr_debug("Ucode ptr %p\n", curr->fw->data); in print_uc_info()
465 INIT_LIST_HEAD(&fw_info->ucodes); in cpt_ucode_load_fw()
475 ret = load_fw(&pdev->dev, fw_info, filename, rid); in cpt_ucode_load_fw()
494 if (!eng_grp->engs[i].type) in find_engines_by_type()
497 if (eng_grp->engs[i].type == eng_type) in find_engines_by_type()
498 return &eng_grp->engs[i]; in find_engines_by_type()
517 switch (engs->type) { in update_engines_avail_count()
519 avail->se_cnt += val; in update_engines_avail_count()
523 avail->ie_cnt += val; in update_engines_avail_count()
527 avail->ae_cnt += val; in update_engines_avail_count()
531 dev_err(dev, "Invalid engine type %d\n", engs->type); in update_engines_avail_count()
532 return -EINVAL; in update_engines_avail_count()
541 switch (engs->type) { in update_engines_offset()
543 engs->offset = 0; in update_engines_offset()
547 engs->offset = avail->max_se_cnt; in update_engines_offset()
551 engs->offset = avail->max_se_cnt + avail->max_ie_cnt; in update_engines_offset()
555 dev_err(dev, "Invalid engine type %d\n", engs->type); in update_engines_offset()
556 return -EINVAL; in update_engines_offset()
567 if (!grp->engs[i].type) in release_engines()
570 if (grp->engs[i].count > 0) { in release_engines()
571 ret = update_engines_avail_count(dev, &grp->g->avail, in release_engines()
572 &grp->engs[i], in release_engines()
573 grp->engs[i].count); in release_engines()
578 grp->engs[i].type = 0; in release_engines()
579 grp->engs[i].count = 0; in release_engines()
580 grp->engs[i].offset = 0; in release_engines()
581 grp->engs[i].ucode = NULL; in release_engines()
582 bitmap_zero(grp->engs[i].bmap, grp->g->engs_num); in release_engines()
595 if (!grp->engs[i].type) { in do_reserve_engines()
596 engs = &grp->engs[i]; in do_reserve_engines()
602 return -ENOMEM; in do_reserve_engines()
604 engs->type = req_engs->type; in do_reserve_engines()
605 engs->count = req_engs->count; in do_reserve_engines()
607 ret = update_engines_offset(dev, &grp->g->avail, engs); in do_reserve_engines()
611 if (engs->count > 0) { in do_reserve_engines()
612 ret = update_engines_avail_count(dev, &grp->g->avail, engs, in do_reserve_engines()
613 -engs->count); in do_reserve_engines()
627 switch (req_eng->type) { in check_engines_availability()
629 avail_cnt = grp->g->avail.se_cnt; in check_engines_availability()
633 avail_cnt = grp->g->avail.ie_cnt; in check_engines_availability()
637 avail_cnt = grp->g->avail.ae_cnt; in check_engines_availability()
641 dev_err(dev, "Invalid engine type %d\n", req_eng->type); in check_engines_availability()
642 return -EINVAL; in check_engines_availability()
645 if (avail_cnt < req_eng->count) { in check_engines_availability()
648 get_eng_type_str(req_eng->type), in check_engines_availability()
649 avail_cnt, req_eng->count); in check_engines_availability()
650 return -EBUSY; in check_engines_availability()
679 if (ucode->va) { in ucode_unload()
680 dma_free_coherent(dev, OTX2_CPT_UCODE_SZ, ucode->va, in ucode_unload()
681 ucode->dma); in ucode_unload()
682 ucode->va = NULL; in ucode_unload()
683 ucode->dma = 0; in ucode_unload()
684 ucode->size = 0; in ucode_unload()
687 memset(&ucode->ver_str, 0, OTX2_CPT_UCODE_VER_STR_SZ); in ucode_unload()
688 memset(&ucode->ver_num, 0, sizeof(struct otx2_cpt_ucode_ver_num)); in ucode_unload()
690 ucode->type = 0; in ucode_unload()
700 ucode->va = dma_alloc_coherent(dev, OTX2_CPT_UCODE_SZ, &ucode->dma, in copy_ucode_to_dma_mem()
702 if (!ucode->va) in copy_ucode_to_dma_mem()
703 return -ENOMEM; in copy_ucode_to_dma_mem()
705 memcpy(ucode->va, ucode_data + sizeof(struct otx2_cpt_ucode_hdr), in copy_ucode_to_dma_mem()
706 ucode->size); in copy_ucode_to_dma_mem()
708 /* Byte swap 64-bit */ in copy_ucode_to_dma_mem()
709 for (i = 0; i < (ucode->size / 8); i++) in copy_ucode_to_dma_mem()
710 cpu_to_be64s(&((u64 *)ucode->va)[i]); in copy_ucode_to_dma_mem()
711 /* Ucode needs 16-bit swap */ in copy_ucode_to_dma_mem()
712 for (i = 0; i < (ucode->size / 2); i++) in copy_ucode_to_dma_mem()
713 cpu_to_be16s(&((u16 *)ucode->va)[i]); in copy_ucode_to_dma_mem()
745 ucode_unload(dev, &eng_grp->ucode[0]); in disable_eng_grp()
746 ucode_unload(dev, &eng_grp->ucode[1]); in disable_eng_grp()
749 if (!eng_grp->engs[i].type) in disable_eng_grp()
752 eng_grp->engs[i].ucode = &eng_grp->ucode[0]; in disable_eng_grp()
765 src_grp->mirror.is_ena = false; in setup_eng_grp_mirroring()
766 src_grp->mirror.idx = 0; in setup_eng_grp_mirroring()
767 src_grp->mirror.ref_count++; in setup_eng_grp_mirroring()
770 dst_grp->mirror.is_ena = true; in setup_eng_grp_mirroring()
771 dst_grp->mirror.idx = src_grp->idx; in setup_eng_grp_mirroring()
772 dst_grp->mirror.ref_count = 0; in setup_eng_grp_mirroring()
779 if (!dst_grp->mirror.is_ena) in remove_eng_grp_mirroring()
782 src_grp = &dst_grp->g->grp[dst_grp->mirror.idx]; in remove_eng_grp_mirroring()
784 src_grp->mirror.ref_count--; in remove_eng_grp_mirroring()
785 dst_grp->mirror.is_ena = false; in remove_eng_grp_mirroring()
786 dst_grp->mirror.idx = 0; in remove_eng_grp_mirroring()
787 dst_grp->mirror.ref_count = 0; in remove_eng_grp_mirroring()
816 engs[i].count -= mirrored_engs->count; in update_requested_engs()
823 struct otx2_cpt_eng_grps *eng_grps = grp->g; in find_mirrored_eng_grp()
827 if (!eng_grps->grp[i].is_enabled) in find_mirrored_eng_grp()
829 if (eng_grps->grp[i].ucode[0].type && in find_mirrored_eng_grp()
830 eng_grps->grp[i].ucode[1].type) in find_mirrored_eng_grp()
832 if (grp->idx == i) in find_mirrored_eng_grp()
834 if (!strncasecmp(eng_grps->grp[i].ucode[0].ver_str, in find_mirrored_eng_grp()
835 grp->ucode[0].ver_str, in find_mirrored_eng_grp()
837 return &eng_grps->grp[i]; in find_mirrored_eng_grp()
849 if (!eng_grps->grp[i].is_enabled) in find_unused_eng_grp()
850 return &eng_grps->grp[i]; in find_unused_eng_grp()
864 engs = &eng_grp->engs[i]; in eng_grp_update_masks()
865 if (!engs->type) in eng_grp_update_masks()
867 if (engs->count <= 0) in eng_grp_update_masks()
870 switch (engs->type) { in eng_grp_update_masks()
872 max_cnt = eng_grp->g->avail.max_se_cnt; in eng_grp_update_masks()
876 max_cnt = eng_grp->g->avail.max_ie_cnt; in eng_grp_update_masks()
880 max_cnt = eng_grp->g->avail.max_ae_cnt; in eng_grp_update_masks()
884 dev_err(dev, "Invalid engine type %d\n", engs->type); in eng_grp_update_masks()
885 return -EINVAL; in eng_grp_update_masks()
888 cnt = engs->count; in eng_grp_update_masks()
889 WARN_ON(engs->offset + max_cnt > OTX2_CPT_MAX_ENGINES); in eng_grp_update_masks()
890 bitmap_zero(tmp_bmap.bits, eng_grp->g->engs_num); in eng_grp_update_masks()
891 for (j = engs->offset; j < engs->offset + max_cnt; j++) { in eng_grp_update_masks()
892 if (!eng_grp->g->eng_ref_cnt[j]) { in eng_grp_update_masks()
894 cnt--; in eng_grp_update_masks()
901 return -ENOSPC; in eng_grp_update_masks()
903 bitmap_copy(engs->bmap, tmp_bmap.bits, eng_grp->g->engs_num); in eng_grp_update_masks()
906 if (!eng_grp->mirror.is_ena) in eng_grp_update_masks()
910 engs = &eng_grp->engs[i]; in eng_grp_update_masks()
911 if (!engs->type) in eng_grp_update_masks()
915 &eng_grp->g->grp[eng_grp->mirror.idx], in eng_grp_update_masks()
916 engs->type); in eng_grp_update_masks()
917 WARN_ON(!mirrored_engs && engs->count <= 0); in eng_grp_update_masks()
921 bitmap_copy(tmp_bmap.bits, mirrored_engs->bmap, in eng_grp_update_masks()
922 eng_grp->g->engs_num); in eng_grp_update_masks()
923 if (engs->count < 0) { in eng_grp_update_masks()
924 bit = find_first_bit(mirrored_engs->bmap, in eng_grp_update_masks()
925 eng_grp->g->engs_num); in eng_grp_update_masks()
926 bitmap_clear(tmp_bmap.bits, bit, -engs->count); in eng_grp_update_masks()
928 bitmap_or(engs->bmap, engs->bmap, tmp_bmap.bits, in eng_grp_update_masks()
929 eng_grp->g->engs_num); in eng_grp_update_masks()
939 if (!eng_grp->is_enabled) in delete_engine_group()
942 if (eng_grp->mirror.ref_count) in delete_engine_group()
943 return -EINVAL; in delete_engine_group()
949 ret = disable_eng_grp(dev, eng_grp, eng_grp->g->obj); in delete_engine_group()
958 eng_grp->is_enabled = false; in delete_engine_group()
967 if (eng_grp->mirror.is_ena) in update_ucode_ptrs()
968 ucode = &eng_grp->g->grp[eng_grp->mirror.idx].ucode[0]; in update_ucode_ptrs()
970 ucode = &eng_grp->ucode[0]; in update_ucode_ptrs()
971 WARN_ON(!eng_grp->engs[0].type); in update_ucode_ptrs()
972 eng_grp->engs[0].ucode = ucode; in update_ucode_ptrs()
974 if (eng_grp->engs[1].type) { in update_ucode_ptrs()
976 eng_grp->engs[1].ucode = &eng_grp->ucode[1]; in update_ucode_ptrs()
978 eng_grp->engs[1].ucode = ucode; in update_ucode_ptrs()
996 return -ENOSPC; in create_engine_group()
1001 eng_grp->ucode[i] = uc_info->ucode; in create_engine_group()
1002 ret = copy_ucode_to_dma_mem(dev, &eng_grp->ucode[i], in create_engine_group()
1003 uc_info->fw->data); in create_engine_group()
1033 ret = enable_eng_grp(eng_grp, eng_grps->obj); in create_engine_group()
1042 if (eng_grp->mirror.is_ena) in create_engine_group()
1043 ucode_unload(dev, &eng_grp->ucode[0]); in create_engine_group()
1045 eng_grp->is_enabled = true; in create_engine_group()
1053 eng_grp->idx, mirrored_eng_grp->ucode[0].ver_str, in create_engine_group()
1054 mirrored_eng_grp->idx); in create_engine_group()
1057 eng_grp->idx, eng_grp->ucode[0].ver_str); in create_engine_group()
1060 eng_grp->idx, eng_grp->ucode[1].ver_str); in create_engine_group()
1067 ucode_unload(dev, &eng_grp->ucode[0]); in create_engine_group()
1068 ucode_unload(dev, &eng_grp->ucode[1]); in create_engine_group()
1079 if (eng_grps->grp[i].mirror.is_ena) in delete_engine_grps()
1080 delete_engine_group(&pdev->dev, &eng_grps->grp[i]); in delete_engine_grps()
1084 delete_engine_group(&pdev->dev, &eng_grps->grp[i]); in delete_engine_grps()
1107 timeout--; in rnm_to_cpt_errata_fixup()
1128 grp = &eng_grps->grp[i]; in otx2_cpt_get_eng_grp()
1129 if (!grp->is_enabled) in otx2_cpt_get_eng_grp()
1153 struct pci_dev *pdev = cptpf->pdev; in otx2_cpt_create_eng_grps()
1158 mutex_lock(&eng_grps->lock); in otx2_cpt_create_eng_grps()
1163 if (eng_grps->is_grps_created) in otx2_cpt_create_eng_grps()
1166 ret = cpt_ucode_load_fw(pdev, &fw_info, eng_grps->rid); in otx2_cpt_create_eng_grps()
1176 dev_err(&pdev->dev, "Unable to find firmware for SE\n"); in otx2_cpt_create_eng_grps()
1177 ret = -EINVAL; in otx2_cpt_create_eng_grps()
1181 engs[0].count = eng_grps->avail.max_se_cnt; in otx2_cpt_create_eng_grps()
1183 ret = create_engine_group(&pdev->dev, eng_grps, engs, 1, in otx2_cpt_create_eng_grps()
1196 dev_err(&pdev->dev, "Unable to find firmware for IE"); in otx2_cpt_create_eng_grps()
1197 ret = -EINVAL; in otx2_cpt_create_eng_grps()
1201 engs[0].count = eng_grps->avail.max_se_cnt; in otx2_cpt_create_eng_grps()
1203 engs[1].count = eng_grps->avail.max_ie_cnt; in otx2_cpt_create_eng_grps()
1205 ret = create_engine_group(&pdev->dev, eng_grps, engs, 2, in otx2_cpt_create_eng_grps()
1216 dev_err(&pdev->dev, "Unable to find firmware for AE"); in otx2_cpt_create_eng_grps()
1217 ret = -EINVAL; in otx2_cpt_create_eng_grps()
1221 engs[0].count = eng_grps->avail.max_ae_cnt; in otx2_cpt_create_eng_grps()
1223 ret = create_engine_group(&pdev->dev, eng_grps, engs, 1, in otx2_cpt_create_eng_grps()
1228 eng_grps->is_grps_created = true; in otx2_cpt_create_eng_grps()
1239 rnm_to_cpt_errata_fixup(&pdev->dev); in otx2_cpt_create_eng_grps()
1241 otx2_cpt_read_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_CTL, &reg_val, in otx2_cpt_create_eng_grps()
1249 otx2_cpt_write_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_CTL, in otx2_cpt_create_eng_grps()
1252 * Set interval to periodically flush dirty data for the next in otx2_cpt_create_eng_grps()
1256 otx2_cpt_write_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_CTX_FLUSH_TIMER, in otx2_cpt_create_eng_grps()
1263 * unpredictable data being delivered to a CPT engine. in otx2_cpt_create_eng_grps()
1266 otx2_cpt_read_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG, in otx2_cpt_create_eng_grps()
1268 otx2_cpt_write_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG, in otx2_cpt_create_eng_grps()
1272 mutex_unlock(&eng_grps->lock); in otx2_cpt_create_eng_grps()
1280 mutex_unlock(&eng_grps->lock); in otx2_cpt_create_eng_grps()
1293 ret = otx2_cpt_add_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_disable_all_cores()
1299 cptpf->eng_grps.eng_ref_cnt[i] = 0; in cptx_disable_all_cores()
1301 ret = otx2_cpt_send_af_reg_requests(&cptpf->afpf_mbox, cptpf->pdev); in cptx_disable_all_cores()
1309 if (timeout-- < 0) in cptx_disable_all_cores()
1310 return -EBUSY; in cptx_disable_all_cores()
1313 ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, in cptx_disable_all_cores()
1314 cptpf->pdev, in cptx_disable_all_cores()
1329 ret = otx2_cpt_add_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_disable_all_cores()
1335 return otx2_cpt_send_af_reg_requests(&cptpf->afpf_mbox, cptpf->pdev); in cptx_disable_all_cores()
1342 total_cores = cptpf->eng_grps.avail.max_se_cnt + in otx2_cpt_disable_all_cores()
1343 cptpf->eng_grps.avail.max_ie_cnt + in otx2_cpt_disable_all_cores()
1344 cptpf->eng_grps.avail.max_ae_cnt; in otx2_cpt_disable_all_cores()
1346 if (cptpf->has_cpt1) { in otx2_cpt_disable_all_cores()
1360 mutex_lock(&eng_grps->lock); in otx2_cpt_cleanup_eng_grps()
1364 grp = &eng_grps->grp[i]; in otx2_cpt_cleanup_eng_grps()
1366 kfree(grp->engs[j].bmap); in otx2_cpt_cleanup_eng_grps()
1367 grp->engs[j].bmap = NULL; in otx2_cpt_cleanup_eng_grps()
1370 mutex_unlock(&eng_grps->lock); in otx2_cpt_cleanup_eng_grps()
1379 mutex_init(&eng_grps->lock); in otx2_cpt_init_eng_grps()
1380 eng_grps->obj = pci_get_drvdata(pdev); in otx2_cpt_init_eng_grps()
1381 eng_grps->avail.se_cnt = eng_grps->avail.max_se_cnt; in otx2_cpt_init_eng_grps()
1382 eng_grps->avail.ie_cnt = eng_grps->avail.max_ie_cnt; in otx2_cpt_init_eng_grps()
1383 eng_grps->avail.ae_cnt = eng_grps->avail.max_ae_cnt; in otx2_cpt_init_eng_grps()
1385 eng_grps->engs_num = eng_grps->avail.max_se_cnt + in otx2_cpt_init_eng_grps()
1386 eng_grps->avail.max_ie_cnt + in otx2_cpt_init_eng_grps()
1387 eng_grps->avail.max_ae_cnt; in otx2_cpt_init_eng_grps()
1388 if (eng_grps->engs_num > OTX2_CPT_MAX_ENGINES) { in otx2_cpt_init_eng_grps()
1389 dev_err(&pdev->dev, in otx2_cpt_init_eng_grps()
1391 eng_grps->engs_num, OTX2_CPT_MAX_ENGINES); in otx2_cpt_init_eng_grps()
1392 ret = -EINVAL; in otx2_cpt_init_eng_grps()
1397 grp = &eng_grps->grp[i]; in otx2_cpt_init_eng_grps()
1398 grp->g = eng_grps; in otx2_cpt_init_eng_grps()
1399 grp->idx = i; in otx2_cpt_init_eng_grps()
1402 grp->engs[j].bmap = in otx2_cpt_init_eng_grps()
1403 kcalloc(BITS_TO_LONGS(eng_grps->engs_num), in otx2_cpt_init_eng_grps()
1405 if (!grp->engs[j].bmap) { in otx2_cpt_init_eng_grps()
1406 ret = -ENOMEM; in otx2_cpt_init_eng_grps()
1426 mutex_lock(&eng_grps->lock); in create_eng_caps_discovery_grps()
1427 ret = cpt_ucode_load_fw(pdev, &fw_info, eng_grps->rid); in create_eng_caps_discovery_grps()
1429 mutex_unlock(&eng_grps->lock); in create_eng_caps_discovery_grps()
1435 dev_err(&pdev->dev, "Unable to find firmware for AE\n"); in create_eng_caps_discovery_grps()
1436 ret = -EINVAL; in create_eng_caps_discovery_grps()
1442 ret = create_engine_group(&pdev->dev, eng_grps, engs, 1, in create_eng_caps_discovery_grps()
1449 dev_err(&pdev->dev, "Unable to find firmware for SE\n"); in create_eng_caps_discovery_grps()
1450 ret = -EINVAL; in create_eng_caps_discovery_grps()
1456 ret = create_engine_group(&pdev->dev, eng_grps, engs, 1, in create_eng_caps_discovery_grps()
1463 dev_err(&pdev->dev, "Unable to find firmware for IE\n"); in create_eng_caps_discovery_grps()
1464 ret = -EINVAL; in create_eng_caps_discovery_grps()
1470 ret = create_engine_group(&pdev->dev, eng_grps, engs, 1, in create_eng_caps_discovery_grps()
1476 mutex_unlock(&eng_grps->lock); in create_eng_caps_discovery_grps()
1483 mutex_unlock(&eng_grps->lock); in create_eng_caps_discovery_grps()
1492 struct otx2_cptlfs_info *lfs = &cptpf->lfs; in otx2_cpt_discover_eng_capabilities()
1509 if (cptpf->is_eng_caps_discovered) in otx2_cpt_discover_eng_capabilities()
1512 pdev = cptpf->pdev; in otx2_cpt_discover_eng_capabilities()
1517 ret = create_eng_caps_discovery_grps(pdev, &cptpf->eng_grps); in otx2_cpt_discover_eng_capabilities()
1532 ret = -ENOMEM; in otx2_cpt_discover_eng_capabilities()
1537 rptr_baddr = dma_map_single(&pdev->dev, rptr, len, DMA_BIDIRECTIONAL); in otx2_cpt_discover_eng_capabilities()
1538 if (dma_mapping_error(&pdev->dev, rptr_baddr)) { in otx2_cpt_discover_eng_capabilities()
1539 dev_err(&pdev->dev, "DMA mapping failed\n"); in otx2_cpt_discover_eng_capabilities()
1540 ret = -EFAULT; in otx2_cpt_discover_eng_capabilities()
1556 /* 64-bit swap for microcode data reads, not needed for addresses */ in otx2_cpt_discover_eng_capabilities()
1563 result->s.compcode = OTX2_CPT_COMPLETION_CODE_INIT; in otx2_cpt_discover_eng_capabilities()
1564 iq_cmd.cptr.s.grp = otx2_cpt_get_eng_grp(&cptpf->eng_grps, in otx2_cpt_discover_eng_capabilities()
1567 lfs->ops->send_cmd(&inst, 1, &cptpf->lfs.lf[0]); in otx2_cpt_discover_eng_capabilities()
1570 while (lfs->ops->cpt_get_compcode(result) == in otx2_cpt_discover_eng_capabilities()
1574 timeout--; in otx2_cpt_discover_eng_capabilities()
1576 ret = -ENODEV; in otx2_cpt_discover_eng_capabilities()
1577 cptpf->is_eng_caps_discovered = false; in otx2_cpt_discover_eng_capabilities()
1578 dev_warn(&pdev->dev, "Timeout on CPT load_fvc completion poll\n"); in otx2_cpt_discover_eng_capabilities()
1583 cptpf->eng_caps[etype].u = be64_to_cpup(rptr); in otx2_cpt_discover_eng_capabilities()
1585 cptpf->is_eng_caps_discovered = true; in otx2_cpt_discover_eng_capabilities()
1588 dma_unmap_single(&pdev->dev, rptr_baddr, len, DMA_BIDIRECTIONAL); in otx2_cpt_discover_eng_capabilities()
1594 delete_engine_grps(pdev, &cptpf->eng_grps); in otx2_cpt_discover_eng_capabilities()
1604 struct otx2_cpt_eng_grps *eng_grps = &cptpf->eng_grps; in otx2_cpt_dl_custom_egrp_create()
1607 struct device *dev = &cptpf->pdev->dev; in otx2_cpt_dl_custom_egrp_create()
1609 int grp_idx = 0, ret = -EINVAL; in otx2_cpt_dl_custom_egrp_create()
1614 if (!eng_grps->is_grps_created) { in otx2_cpt_dl_custom_egrp_create()
1616 return -EINVAL; in otx2_cpt_dl_custom_egrp_create()
1619 strscpy(tmp_buf, ctx->val.vstr); in otx2_cpt_dl_custom_egrp_create()
1710 mutex_lock(&eng_grps->lock); in otx2_cpt_dl_custom_egrp_create()
1712 if (cptpf->enabled_vfs) { in otx2_cpt_dl_custom_egrp_create()
1714 ret = -EACCES; in otx2_cpt_dl_custom_egrp_create()
1719 ret = load_fw(dev, &fw_info, ucode_filename[0], eng_grps->rid); in otx2_cpt_dl_custom_egrp_create()
1725 ret = load_fw(dev, &fw_info, ucode_filename[1], eng_grps->rid); in otx2_cpt_dl_custom_egrp_create()
1736 ret = -EINVAL; in otx2_cpt_dl_custom_egrp_create()
1744 ret = -EINVAL; in otx2_cpt_dl_custom_egrp_create()
1754 mutex_unlock(&eng_grps->lock); in otx2_cpt_dl_custom_egrp_create()
1764 struct otx2_cpt_eng_grps *eng_grps = &cptpf->eng_grps; in otx2_cpt_dl_custom_egrp_delete()
1765 struct device *dev = &cptpf->pdev->dev; in otx2_cpt_dl_custom_egrp_delete()
1771 if (strncasecmp(ctx->val.vstr, "egrp", 4)) in otx2_cpt_dl_custom_egrp_delete()
1773 tmp = ctx->val.vstr; in otx2_cpt_dl_custom_egrp_delete()
1782 return -EINVAL; in otx2_cpt_dl_custom_egrp_delete()
1784 if (!eng_grps->grp[egrp].is_enabled) { in otx2_cpt_dl_custom_egrp_delete()
1786 return -EINVAL; in otx2_cpt_dl_custom_egrp_delete()
1788 mutex_lock(&eng_grps->lock); in otx2_cpt_dl_custom_egrp_delete()
1789 ret = delete_engine_group(dev, &eng_grps->grp[egrp]); in otx2_cpt_dl_custom_egrp_delete()
1790 mutex_unlock(&eng_grps->lock); in otx2_cpt_dl_custom_egrp_delete()
1796 return -EINVAL; in otx2_cpt_dl_custom_egrp_delete()