92 	struct tegra186_wdt *wdt;  member
103 static void wdt_writel(struct tegra186_wdt *wdt, u32 value, unsigned int offset)  in wdt_writel()  argument
105 	writel_relaxed(value, wdt->regs + offset);  in wdt_writel()
108 static u32 wdt_readl(struct tegra186_wdt *wdt, unsigned int offset)  in wdt_readl()  argument
110 	return readl_relaxed(wdt->regs + offset);  in wdt_readl()
133 	.identity = "NVIDIA Tegra186 WDT",
136 static void tegra186_wdt_disable(struct tegra186_wdt *wdt)  in tegra186_wdt_disable()  argument
139 	wdt_writel(wdt, WDTUR_UNLOCK_PATTERN, WDTUR);  in tegra186_wdt_disable()
140 	wdt_writel(wdt, WDTCMDR_DISABLE_COUNTER, WDTCMDR);  in tegra186_wdt_disable()
143 	tmr_writel(wdt->tmr, 0, TMRCR);  in tegra186_wdt_disable()
146 static void tegra186_wdt_enable(struct tegra186_wdt *wdt)  in tegra186_wdt_enable()  argument
148 	struct tegra186_timer *tegra = wdt->tmr->parent;  in tegra186_wdt_enable()
152 	value = TKEIE_WDT_MASK(wdt->index, 1);  in tegra186_wdt_enable()
153 	writel(value, tegra->regs + TKEIE(wdt->tmr->hwirq));  in tegra186_wdt_enable()
156 	tmr_writel(wdt->tmr, TMRSR_INTR_CLR, TMRSR);  in tegra186_wdt_enable()
159 	tmr_writel(wdt->tmr, TMRCSSR_SRC_USEC, TMRCSSR);  in tegra186_wdt_enable()
162 	value = TMRCR_PTV(wdt->base.timeout * (USEC_PER_SEC / 5)) |  in tegra186_wdt_enable()
164 	tmr_writel(wdt->tmr, value, TMRCR);  in tegra186_wdt_enable()
166 	if (!wdt->locked) {  in tegra186_wdt_enable()
167 		value = wdt_readl(wdt, WDTCR);  in tegra186_wdt_enable()
171 		value |= WDTCR_TIMER_SOURCE(wdt->tmr->index);  in tegra186_wdt_enable()
180 		wdt_writel(wdt, value, WDTCR);  in tegra186_wdt_enable()
183 	wdt_writel(wdt, WDTCMDR_START_COUNTER, WDTCMDR);  in tegra186_wdt_enable()
188 	struct tegra186_wdt *wdt = to_tegra186_wdt(wdd);  in tegra186_wdt_start()  local
190 	tegra186_wdt_enable(wdt);  in tegra186_wdt_start()
197 	struct tegra186_wdt *wdt = to_tegra186_wdt(wdd);  in tegra186_wdt_stop()  local
199 	tegra186_wdt_disable(wdt);  in tegra186_wdt_stop()
206 	struct tegra186_wdt *wdt = to_tegra186_wdt(wdd);  in tegra186_wdt_ping()  local
208 	tegra186_wdt_disable(wdt);  in tegra186_wdt_ping()
209 	tegra186_wdt_enable(wdt);  in tegra186_wdt_ping()
217 	struct tegra186_wdt *wdt = to_tegra186_wdt(wdd);  in tegra186_wdt_set_timeout()  local
219 	if (watchdog_active(&wdt->base))  in tegra186_wdt_set_timeout()
220 		tegra186_wdt_disable(wdt);  in tegra186_wdt_set_timeout()
222 	wdt->base.timeout = timeout;  in tegra186_wdt_set_timeout()
224 	if (watchdog_active(&wdt->base))  in tegra186_wdt_set_timeout()
225 		tegra186_wdt_enable(wdt);  in tegra186_wdt_set_timeout()
232 	struct tegra186_wdt *wdt = to_tegra186_wdt(wdd);  in tegra186_wdt_get_timeleft()  local
236 	if (!watchdog_active(&wdt->base)) {  in tegra186_wdt_get_timeleft()
256 	val = readl_relaxed(wdt->regs + WDTSR);  in tegra186_wdt_get_timeleft()
262 	val = readl_relaxed(wdt->tmr->regs + TMRSR);  in tegra186_wdt_get_timeleft()
269 	 * Note: Since wdt->base.timeout is bound to 255, the maximum  in tegra186_wdt_get_timeleft()
280 	timeleft += (wdt->base.timeout * (USEC_PER_SEC / 5)) * (4 - expiration);  in tegra186_wdt_get_timeleft()
304 	struct tegra186_wdt *wdt;  in tegra186_wdt_create()  local
310 	wdt = devm_kzalloc(tegra->dev, sizeof(*wdt), GFP_KERNEL);  in tegra186_wdt_create()
311 	if (!wdt)  in tegra186_wdt_create()
314 	wdt->regs = tegra->regs + offset;  in tegra186_wdt_create()
315 	wdt->index = index;  in tegra186_wdt_create()
318 	value = wdt_readl(wdt, WDTCR);  in tegra186_wdt_create()
321 		wdt->locked = true;  in tegra186_wdt_create()
325 	wdt->tmr = tegra186_tmr_create(tegra, source);  in tegra186_wdt_create()
326 	if (IS_ERR(wdt->tmr))  in tegra186_wdt_create()
327 		return ERR_CAST(wdt->tmr);  in tegra186_wdt_create()
329 	wdt->base.info = &tegra186_wdt_info;  in tegra186_wdt_create()
330 	wdt->base.ops = &tegra186_wdt_ops;  in tegra186_wdt_create()
331 	wdt->base.min_timeout = 1;  in tegra186_wdt_create()
332 	wdt->base.max_timeout = 255;  in tegra186_wdt_create()
333 	wdt->base.parent = tegra->dev;  in tegra186_wdt_create()
335 	err = watchdog_init_timeout(&wdt->base, 5, tegra->dev);  in tegra186_wdt_create()
339 	err = devm_watchdog_register_device(tegra->dev, &wdt->base);  in tegra186_wdt_create()
343 	return wdt;  in tegra186_wdt_create()
445 	tegra->wdt = tegra186_wdt_create(tegra, 0);  in tegra186_timer_probe()
446 	if (IS_ERR(tegra->wdt)) {  in tegra186_timer_probe()
447 		err = PTR_ERR(tegra->wdt);  in tegra186_timer_probe()
448 		dev_err(dev, "failed to create WDT: %d\n", err);  in tegra186_timer_probe()
492 	if (watchdog_active(&tegra->wdt->base))  in tegra186_timer_suspend()
493 		tegra186_wdt_disable(tegra->wdt);  in tegra186_timer_suspend()
502 	if (watchdog_active(&tegra->wdt->base))  in tegra186_timer_resume()
503 		tegra186_wdt_enable(tegra->wdt);  in tegra186_timer_resume()