388 /* MUX */
398 	struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw);  in mux_enable()  local
400 	return cv1800_clk_setbit(&mux->common, &mux->gate);  in mux_enable()
405 	struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw);  in mux_disable()  local
407 	cv1800_clk_clearbit(&mux->common, &mux->gate);  in mux_disable()
412 	struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw);  in mux_is_enabled()  local
414 	return cv1800_clk_checkbit(&mux->common, &mux->gate);  in mux_is_enabled()
420 	struct cv1800_clk_mux *mux = data;  in mux_round_rate()  local
422 	return div_helper_round_rate(&mux->div, &mux->common.hw, parent,  in mux_round_rate()
429 	struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw);  in mux_determine_rate()  local
431 	return mux_helper_determine_rate(&mux->common, req,  in mux_determine_rate()
432 					 mux_round_rate, mux);  in mux_determine_rate()
438 	struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw);  in mux_recalc_rate()  local
441 	val = div_helper_get_clockdiv(&mux->common, &mux->div);  in mux_recalc_rate()
446 				   mux->div.flags, mux->div.width);  in mux_recalc_rate()
452 	struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw);  in mux_set_rate()  local
456 			      mux->div.width, mux->div.flags);  in mux_set_rate()
458 	return div_helper_set_rate(&mux->common, &mux->div, val);  in mux_set_rate()
463 	struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw);  in mux_get_parent()  local
464 	u32 reg = readl(mux->common.base + mux->mux.reg);  in mux_get_parent()
466 	return cv1800_clk_regfield_get(reg, &mux->mux);  in mux_get_parent()
469 static int _mux_set_parent(struct cv1800_clk_mux *mux, u8 index)  in _mux_set_parent()  argument
473 	reg = readl(mux->common.base + mux->mux.reg);  in _mux_set_parent()
474 	reg = cv1800_clk_regfield_set(reg, index, &mux->mux);  in _mux_set_parent()
475 	writel(reg, mux->common.base + mux->mux.reg);  in _mux_set_parent()
482 	struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw);  in mux_set_parent()  local
485 	spin_lock_irqsave(mux->common.lock, flags);  in mux_set_parent()
487 	_mux_set_parent(mux, index);  in mux_set_parent()
489 	spin_unlock_irqrestore(mux->common.lock, flags);  in mux_set_parent()
510 	struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw);  in hw_to_cv1800_clk_bypass_mux()  local
512 	return container_of(mux, struct cv1800_clk_bypass_mux, mux);  in hw_to_cv1800_clk_bypass_mux()
519 	struct cv1800_clk_bypass_mux *mux = data;  in bypass_mux_round_rate()  local
522 		if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass))  in bypass_mux_round_rate()
526 					      -1, &mux->mux);  in bypass_mux_round_rate()
532 	return mux_round_rate(parent, parent_rate, rate, id - 1, &mux->mux);  in bypass_mux_round_rate()
538 	struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw);  in bypass_mux_determine_rate()  local
540 	return mux_helper_determine_rate(&mux->mux.common, req,  in bypass_mux_determine_rate()
541 					 bypass_mux_round_rate, mux);  in bypass_mux_determine_rate()
547 	struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw);  in bypass_mux_recalc_rate()  local
549 	if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass))  in bypass_mux_recalc_rate()
558 	struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw);  in bypass_mux_set_rate()  local
560 	if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass))  in bypass_mux_set_rate()
568 	struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw);  in bypass_mux_get_parent()  local
570 	if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass))  in bypass_mux_get_parent()
578 	struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw);  in bypass_mux_set_parent()  local
581 		return cv1800_clk_setbit(&mux->mux.common, &mux->bypass);  in bypass_mux_set_parent()
583 	return cv1800_clk_clearbit(&mux->mux.common, &mux->bypass);  in bypass_mux_set_parent()
721 	struct cv1800_clk_regfield *mux;  in mmux_get_parent()  local
732 	mux = &mmux->mux[clk_sel];  in mmux_get_parent()
734 	reg = readl(mmux->common.base + mux->reg);  in mmux_get_parent()
736 	return mmux->sel2parent[clk_sel][cv1800_clk_regfield_get(reg, mux)];  in mmux_get_parent()
742 	struct cv1800_clk_regfield *mux;  in mmux_set_parent()  local
761 	mux = &mmux->mux[clk_sel];  in mmux_set_parent()
762 	reg = readl(mmux->common.base + mux->reg);  in mmux_set_parent()
763 	reg = cv1800_clk_regfield_set(reg, index, mux);  in mmux_set_parent()
765 	writel(reg, mmux->common.base + mux->reg);  in mmux_set_parent()