Lines Matching +full:gcc +full:- +full:sm8350

1 # SPDX-License-Identifier: GPL-2.0-only
242 	  CMN PLL consumes the AHB/SYS clocks from GCC and supplies
243 	  the output clocks to the networking hardware and GCC blocks.
1099 	tristate "SM8150/SM8250/SM8350 Display Clock Controller"
1104 	  SM8150/SM8250/SM8350 devices.
1251 	tristate "SM8350 Global Clock Controller"
1255 	  Support for the global clock controller on SM8350 devices.
1369 	tristate "SM8350 Graphics Clock Controller"
1373 	  Support for the graphics clock controller on SM8350 devices.
1411 	  Say Y if you want to toggle LPASS-adjacent resets within
1500 	tristate "SM8350 Video Clock Controller"
1505 	  Support for the video clock controller on SM8350 devices.
1529 	tristate "High-Frequency PLL (HFPLL) Clock Controller"
1531 	  Support for the high-frequency PLLs present on Qualcomm devices.
1538 	  Support for the Krait ACC and GCC clock controllers. Say Y