457 	int div1, div2;  in wm8750_find_pll_bits()  local
464 		for (div2 = 7; div2 >= 0; div2--)  in wm8750_find_pll_bits()
466 				tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2));  in wm8750_find_pll_bits()
475 					*divisor2 = div2;  in wm8750_find_pll_bits()
483 					*divisor2 = div2;  in wm8750_find_pll_bits()
505 	int div1, div2;  in wm8850_find_pll_bits()  local
512 		for (div2 = 3; div2 >= 0; div2--)  in wm8850_find_pll_bits()
515 						((div1 + 1) * (1 << div2));  in wm8850_find_pll_bits()
523 					*divisor2 = div2;  in wm8850_find_pll_bits()
531 					*divisor2 = div2;  in wm8850_find_pll_bits()
551 	u32 filter, mul, div1, div2;  in vtwm_pll_set_rate()  local
565 		ret = wm8650_find_pll_bits(rate, parent_rate, &mul, &div1, &div2);  in vtwm_pll_set_rate()
567 			pll_val = WM8650_BITS_TO_VAL(mul, div1, div2);  in vtwm_pll_set_rate()
570 		ret = wm8750_find_pll_bits(rate, parent_rate, &filter, &mul, &div1, &div2);  in vtwm_pll_set_rate()
572 			pll_val = WM8750_BITS_TO_VAL(filter, mul, div1, div2);  in vtwm_pll_set_rate()
575 		ret = wm8850_find_pll_bits(rate, parent_rate, &mul, &div1, &div2);  in vtwm_pll_set_rate()
577 			pll_val = WM8850_BITS_TO_VAL(mul, div1, div2);  in vtwm_pll_set_rate()
602 	u32 filter, mul, div1, div2;  in vtwm_pll_determine_rate()  local
616 					   &mul, &div1, &div2);  in vtwm_pll_determine_rate()
619 							 mul, div1, div2);  in vtwm_pll_determine_rate()
623 					   &filter, &mul, &div1, &div2);  in vtwm_pll_determine_rate()
626 							 mul, div1, div2);  in vtwm_pll_determine_rate()
630 					   &mul, &div1, &div2);  in vtwm_pll_determine_rate()
633 							 mul, div1, div2);  in vtwm_pll_determine_rate()