24  *     (c) Copyright 2007-2008 Xilinx Inc.
28  *     with this program; if not, write to the Free Software Foundation, Inc.,
36 #define XHI_GIER_OFFSET	0x1C  /* Device Global Interrupt Enable Reg */
38 #define XHI_IPIER_OFFSET 0x28  /* Interrupt Enable Register */
39 #define XHI_WF_OFFSET 0x100 /* Write FIFO */
44 #define XHI_WFV_OFFSET 0x114 /* Write FIFO Vacancy Register */
47 /* Device Global Interrupt Enable Register (GIER) bit definitions */
49 #define XHI_GIER_GIE_MASK 0x80000000 /* Global Interrupt enable Mask */
52  * HwIcap Device Interrupt Status/Enable Registers
56  * write.
58  * Interrupt Enable Register (IPIER) : This register is used to enable
67 #define XHI_IPIXR_WEMPTY_MASK 0x00000004 /* Write FIFO Empty */
69 #define XHI_IPIXR_WRP_MASK 0x00000001 /* Write FIFO half full */
76 #define XHI_CR_WRITE_MASK 0x00000001 /* Write from FIFO to ICAP */
79 #define XHI_WFO_MAX_VACANCY 1024 /* Max Write FIFO Vacancy, in words */
87  * fifo_icap_fifo_write - Write data to the write FIFO.
89  * @data: the 32-bit value to be written to the FIFO.
96 	dev_dbg(drvdata->dev, "fifo_write: %x\n", data);  in fifo_icap_fifo_write()
97 	out_be32(drvdata->base_address + XHI_WF_OFFSET, data);  in fifo_icap_fifo_write()
101  * fifo_icap_fifo_read - Read data from the Read FIFO.
108 	u32 data = in_be32(drvdata->base_address + XHI_RF_OFFSET);  in fifo_icap_fifo_read()
109 	dev_dbg(drvdata->dev, "fifo_read: %x\n", data);  in fifo_icap_fifo_read()
114  * fifo_icap_set_read_size - Set the size register.
121 	out_be32(drvdata->base_address + XHI_SZ_OFFSET, data);  in fifo_icap_set_read_size()
125  * fifo_icap_start_config - Initiate a configuration (write) to the device.
130 	out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_WRITE_MASK);  in fifo_icap_start_config()
131 	dev_dbg(drvdata->dev, "configuration started\n");  in fifo_icap_start_config()
135  * fifo_icap_start_readback - Initiate a readback from the device.
140 	out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_READ_MASK);  in fifo_icap_start_readback()
141 	dev_dbg(drvdata->dev, "readback started\n");  in fifo_icap_start_readback()
145  * fifo_icap_get_status - Get the contents of the status register.
150  * D8 - cfgerr
151  * D7 - dalign
152  * D6 - rip
153  * D5 - in_abort_l
154  * D4 - Always 1
155  * D3 - Always 1
156  * D2 - Always 1
157  * D1 - Always 1
158  * D0 - Done bit
162 	u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET);  in fifo_icap_get_status()
163 	dev_dbg(drvdata->dev, "Getting status = %x\n", status);  in fifo_icap_get_status()
168  * fifo_icap_busy - Return true if the ICAP is still processing a transaction.
173 	u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET);  in fifo_icap_busy()
178  * fifo_icap_write_fifo_vacancy - Query the write fifo available space.
181  * Return the number of words that can be safely pushed into the write fifo.
186 	return in_be32(drvdata->base_address + XHI_WFV_OFFSET);  in fifo_icap_write_fifo_vacancy()
190  * fifo_icap_read_fifo_occupancy - Query the read fifo available data.
198 	return in_be32(drvdata->base_address + XHI_RFO_OFFSET);  in fifo_icap_read_fifo_occupancy()
202  * fifo_icap_set_configuration - Send configuration data to the ICAP.
206  * @num_words: the number of words (32 bit) to write to the ICAP
209  * This function writes the given user data to the Write FIFO in
221 	dev_dbg(drvdata->dev, "fifo_set_configuration\n");  in fifo_icap_set_configuration()
224 	 * Check if the ICAP device is Busy with the last Read/Write  in fifo_icap_set_configuration()
227 		return -EBUSY;  in fifo_icap_set_configuration()
243 				return -EIO;  in fifo_icap_set_configuration()
247 		 * Write data into the Write FIFO.  in fifo_icap_set_configuration()
253 			remaining_words--;  in fifo_icap_set_configuration()
254 			write_fifo_vacancy--;  in fifo_icap_set_configuration()
261 	/* Wait until the write has finished. */  in fifo_icap_set_configuration()
268 	dev_dbg(drvdata->dev, "done fifo_set_configuration\n");  in fifo_icap_set_configuration()
275 		return -EIO;  in fifo_icap_set_configuration()
281  * fifo_icap_get_configuration - Read configuration data from the device.
299 	dev_dbg(drvdata->dev, "fifo_get_configuration\n");  in fifo_icap_get_configuration()
302 	 * Check if the ICAP device is Busy with the last Write/Read  in fifo_icap_get_configuration()
305 		return -EBUSY;  in fifo_icap_get_configuration()
316 		remaining_words -= words_to_read;  in fifo_icap_get_configuration()
328 					return -EIO;  in fifo_icap_get_configuration()
334 			words_to_read -= read_fifo_occupancy;  in fifo_icap_get_configuration()
339 				read_fifo_occupancy--;  in fifo_icap_get_configuration()
344 	dev_dbg(drvdata->dev, "done fifo_get_configuration\n");  in fifo_icap_get_configuration()
350  * buffer_icap_reset - Reset the logic of the icap device.
364 	reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET);  in fifo_icap_reset()
366 	out_be32(drvdata->base_address + XHI_CR_OFFSET,  in fifo_icap_reset()
369 	out_be32(drvdata->base_address + XHI_CR_OFFSET,  in fifo_icap_reset()
375  * fifo_icap_flush_fifo - This function flushes the FIFOs in the device.
385 	reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET);  in fifo_icap_flush_fifo()
387 	out_be32(drvdata->base_address + XHI_CR_OFFSET,  in fifo_icap_flush_fifo()
390 	out_be32(drvdata->base_address + XHI_CR_OFFSET,  in fifo_icap_flush_fifo()