Lines Matching +full:am654 +full:- +full:secure +full:- +full:proxy
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/mux/mux.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-ti.h>
12 #include "k3-serdes.h"
15 serdes_refclk: clock-serdes {
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
25 compatible = "mmio-sram";
27 #address-cells = <1>;
28 #size-cells = <1>;
31 atf-sram@0 {
35 tifs-sram@1f0000 {
39 l3cache-sram@200000 {
45 compatible = "simple-bus";
47 #address-cells = <1>;
48 #size-cells = <1>;
52 compatible = "ti,am654-phy-gmii-sel";
54 #phy-cells = <1>;
58 compatible = "ti,j784s4-cpsw9g-phy-gmii-sel";
60 #phy-cells = <1>;
61 ti,qsgmii-main-ports = <7>, <7>;
64 pcie0_ctrl: pcie0-ctrl@4070 {
65 compatible = "ti,j784s4-pcie-ctrl", "syscon";
69 pcie1_ctrl: pcie1-ctrl@4074 {
70 compatible = "ti,j784s4-pcie-ctrl", "syscon";
74 pcie2_ctrl: pcie2-ctrl@4078 {
75 compatible = "ti,j784s4-pcie-ctrl", "syscon";
79 pcie3_ctrl: pcie3-ctrl@407c {
80 compatible = "ti,j784s4-pcie-ctrl", "syscon";
84 serdes_ln_ctrl: mux-controller@4080 {
85 compatible = "reg-mux";
87 #mux-control-cells = <1>;
88 mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */
94 idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>,
112 usb_serdes_mux: mux-controller@4000 {
113 compatible = "reg-mux";
115 #mux-control-cells = <1>;
116 mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 3 mux */
119 ehrpwm_tbclk: clock-controller@4140 {
120 compatible = "ti,am654-ehrpwm-tbclk";
122 #clock-cells = <1>;
126 compatible = "ti,am62-audio-refclk";
129 assigned-clocks = <&k3_clks 157 34>;
130 assigned-clock-parents = <&k3_clks 157 63>;
131 #clock-cells = <0>;
136 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
139 clock-names = "tbclk", "fck";
140 power-domains = <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>;
141 #pwm-cells = <3>;
146 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
149 clock-names = "tbclk", "fck";
150 power-domains = <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>;
151 #pwm-cells = <3>;
156 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
159 clock-names = "tbclk", "fck";
160 power-domains = <&k3_pds 221 TI_SCI_PD_EXCLUSIVE>;
161 #pwm-cells = <3>;
166 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
169 clock-names = "tbclk", "fck";
170 power-domains = <&k3_pds 222 TI_SCI_PD_EXCLUSIVE>;
171 #pwm-cells = <3>;
176 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
179 clock-names = "tbclk", "fck";
180 power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>;
181 #pwm-cells = <3>;
186 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
189 clock-names = "tbclk", "fck";
190 power-domains = <&k3_pds 224 TI_SCI_PD_EXCLUSIVE>;
191 #pwm-cells = <3>;
195 gic500: interrupt-controller@1800000 {
196 compatible = "arm,gic-v3";
197 #address-cells = <2>;
198 #size-cells = <2>;
200 #interrupt-cells = <3>;
201 interrupt-controller;
211 gic_its: msi-controller@1820000 {
212 compatible = "arm,gic-v3-its";
214 socionext,synquacer-pre-its = <0x1000000 0x400000>;
215 msi-controller;
216 #msi-cells = <1>;
220 main_gpio_intr: interrupt-controller@a00000 {
221 compatible = "ti,sci-intr";
223 ti,intr-trigger-type = <1>;
224 interrupt-controller;
225 interrupt-parent = <&gic500>;
226 #interrupt-cells = <1>;
228 ti,sci-dev-id = <10>;
229 ti,interrupt-ranges = <8 392 56>;
233 compatible = "pinctrl-single";
234 /* Proxy 0 addressing */
236 #pinctrl-cells = <1>;
237 pinctrl-single,register-width = <32>;
238 pinctrl-single,function-mask = <0xffffffff>;
243 compatible = "pinctrl-single";
245 #pinctrl-cells = <1>;
246 pinctrl-single,register-width = <32>;
247 pinctrl-single,function-mask = <0x00000007>;
252 compatible = "pinctrl-single";
254 #pinctrl-cells = <1>;
255 pinctrl-single,register-width = <32>;
256 pinctrl-single,function-mask = <0x0000001f>;
260 compatible = "ti,j721e-sa2ul";
262 power-domains = <&k3_pds 369 TI_SCI_PD_EXCLUSIVE>;
263 #address-cells = <2>;
264 #size-cells = <2>;
269 dma-names = "tx", "rx1", "rx2";
272 compatible = "inside-secure,safexcel-eip76";
279 compatible = "ti,am654-timer";
283 clock-names = "fck";
284 assigned-clocks = <&k3_clks 97 2>;
285 assigned-clock-parents = <&k3_clks 97 3>;
286 power-domains = <&k3_pds 97 TI_SCI_PD_EXCLUSIVE>;
287 ti,timer-pwm;
291 compatible = "ti,am654-timer";
295 clock-names = "fck";
296 assigned-clocks = <&k3_clks 98 2>;
297 assigned-clock-parents = <&k3_clks 98 3>;
298 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
299 ti,timer-pwm;
303 compatible = "ti,am654-timer";
307 clock-names = "fck";
308 assigned-clocks = <&k3_clks 99 2>;
309 assigned-clock-parents = <&k3_clks 99 3>;
310 power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
311 ti,timer-pwm;
315 compatible = "ti,am654-timer";
319 clock-names = "fck";
320 assigned-clocks = <&k3_clks 100 2>;
321 assigned-clock-parents = <&k3_clks 100 3>;
322 power-domains = <&k3_pds 100 TI_SCI_PD_EXCLUSIVE>;
323 ti,timer-pwm;
327 compatible = "ti,am654-timer";
331 clock-names = "fck";
332 assigned-clocks = <&k3_clks 101 2>;
333 assigned-clock-parents = <&k3_clks 101 3>;
334 power-domains = <&k3_pds 101 TI_SCI_PD_EXCLUSIVE>;
335 ti,timer-pwm;
339 compatible = "ti,am654-timer";
343 clock-names = "fck";
344 assigned-clocks = <&k3_clks 102 2>;
345 assigned-clock-parents = <&k3_clks 102 3>;
346 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
347 ti,timer-pwm;
351 compatible = "ti,am654-timer";
355 clock-names = "fck";
356 assigned-clocks = <&k3_clks 103 2>;
357 assigned-clock-parents = <&k3_clks 103 3>;
358 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
359 ti,timer-pwm;
363 compatible = "ti,am654-timer";
367 clock-names = "fck";
368 assigned-clocks = <&k3_clks 104 2>;
369 assigned-clock-parents = <&k3_clks 104 3>;
370 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
371 ti,timer-pwm;
375 compatible = "ti,am654-timer";
379 clock-names = "fck";
380 assigned-clocks = <&k3_clks 105 2>;
381 assigned-clock-parents = <&k3_clks 105 3>;
382 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
383 ti,timer-pwm;
387 compatible = "ti,am654-timer";
391 clock-names = "fck";
392 assigned-clocks = <&k3_clks 106 2>;
393 assigned-clock-parents = <&k3_clks 106 3>;
394 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
395 ti,timer-pwm;
399 compatible = "ti,am654-timer";
403 clock-names = "fck";
404 assigned-clocks = <&k3_clks 107 2>;
405 assigned-clock-parents = <&k3_clks 107 3>;
406 power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
407 ti,timer-pwm;
411 compatible = "ti,am654-timer";
415 clock-names = "fck";
416 assigned-clocks = <&k3_clks 108 2>;
417 assigned-clock-parents = <&k3_clks 108 3>;
418 power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>;
419 ti,timer-pwm;
423 compatible = "ti,am654-timer";
427 clock-names = "fck";
428 assigned-clocks = <&k3_clks 109 2>;
429 assigned-clock-parents = <&k3_clks 109 3>;
430 power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
431 ti,timer-pwm;
435 compatible = "ti,am654-timer";
439 clock-names = "fck";
440 assigned-clocks = <&k3_clks 110 2>;
441 assigned-clock-parents = <&k3_clks 110 3>;
442 power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
443 ti,timer-pwm;
447 compatible = "ti,am654-timer";
451 clock-names = "fck";
452 assigned-clocks = <&k3_clks 111 2>;
453 assigned-clock-parents = <&k3_clks 111 3>;
454 power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
455 ti,timer-pwm;
459 compatible = "ti,am654-timer";
463 clock-names = "fck";
464 assigned-clocks = <&k3_clks 112 2>;
465 assigned-clock-parents = <&k3_clks 112 3>;
466 power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
467 ti,timer-pwm;
471 compatible = "ti,am654-timer";
475 clock-names = "fck";
476 assigned-clocks = <&k3_clks 113 2>;
477 assigned-clock-parents = <&k3_clks 113 3>;
478 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
479 ti,timer-pwm;
483 compatible = "ti,am654-timer";
487 clock-names = "fck";
488 assigned-clocks = <&k3_clks 114 2>;
489 assigned-clock-parents = <&k3_clks 114 3>;
490 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
491 ti,timer-pwm;
495 compatible = "ti,am654-timer";
499 clock-names = "fck";
500 assigned-clocks = <&k3_clks 115 2>;
501 assigned-clock-parents = <&k3_clks 115 3>;
502 power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
503 ti,timer-pwm;
507 compatible = "ti,am654-timer";
511 clock-names = "fck";
512 assigned-clocks = <&k3_clks 116 2>;
513 assigned-clock-parents = <&k3_clks 116 3>;
514 power-domains = <&k3_pds 116 TI_SCI_PD_EXCLUSIVE>;
515 ti,timer-pwm;
519 compatible = "ti,j721e-uart", "ti,am654-uart";
523 clock-names = "fclk";
524 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
529 compatible = "ti,j721e-uart", "ti,am654-uart";
533 clock-names = "fclk";
534 power-domains = <&k3_pds 388 TI_SCI_PD_EXCLUSIVE>;
539 compatible = "ti,j721e-uart", "ti,am654-uart";
543 clock-names = "fclk";
544 power-domains = <&k3_pds 389 TI_SCI_PD_EXCLUSIVE>;
549 compatible = "ti,j721e-uart", "ti,am654-uart";
553 clock-names = "fclk";
554 power-domains = <&k3_pds 390 TI_SCI_PD_EXCLUSIVE>;
559 compatible = "ti,j721e-uart", "ti,am654-uart";
563 clock-names = "fclk";
564 power-domains = <&k3_pds 391 TI_SCI_PD_EXCLUSIVE>;
569 compatible = "ti,j721e-uart", "ti,am654-uart";
573 clock-names = "fclk";
574 power-domains = <&k3_pds 392 TI_SCI_PD_EXCLUSIVE>;
579 compatible = "ti,j721e-uart", "ti,am654-uart";
583 clock-names = "fclk";
584 power-domains = <&k3_pds 393 TI_SCI_PD_EXCLUSIVE>;
589 compatible = "ti,j721e-uart", "ti,am654-uart";
593 clock-names = "fclk";
594 power-domains = <&k3_pds 394 TI_SCI_PD_EXCLUSIVE>;
599 compatible = "ti,j721e-uart", "ti,am654-uart";
603 clock-names = "fclk";
604 power-domains = <&k3_pds 395 TI_SCI_PD_EXCLUSIVE>;
609 compatible = "ti,j721e-uart", "ti,am654-uart";
613 clock-names = "fclk";
614 power-domains = <&k3_pds 396 TI_SCI_PD_EXCLUSIVE>;
619 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
621 gpio-controller;
622 #gpio-cells = <2>;
623 interrupt-parent = <&main_gpio_intr>;
625 interrupt-controller;
626 #interrupt-cells = <2>;
628 ti,davinci-gpio-unbanked = <0>;
629 power-domains = <&k3_pds 163 TI_SCI_PD_EXCLUSIVE>;
631 clock-names = "gpio";
636 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
638 gpio-controller;
639 #gpio-cells = <2>;
640 interrupt-parent = <&main_gpio_intr>;
642 interrupt-controller;
643 #interrupt-cells = <2>;
645 ti,davinci-gpio-unbanked = <0>;
646 power-domains = <&k3_pds 164 TI_SCI_PD_EXCLUSIVE>;
648 clock-names = "gpio";
653 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
655 gpio-controller;
656 #gpio-cells = <2>;
657 interrupt-parent = <&main_gpio_intr>;
659 interrupt-controller;
660 #interrupt-cells = <2>;
662 ti,davinci-gpio-unbanked = <0>;
663 power-domains = <&k3_pds 165 TI_SCI_PD_EXCLUSIVE>;
665 clock-names = "gpio";
670 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
672 gpio-controller;
673 #gpio-cells = <2>;
674 interrupt-parent = <&main_gpio_intr>;
676 interrupt-controller;
677 #interrupt-cells = <2>;
679 ti,davinci-gpio-unbanked = <0>;
680 power-domains = <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
682 clock-names = "gpio";
687 bootph-all;
688 compatible = "ti,j721e-usb";
690 dma-coherent;
691 power-domains = <&k3_pds 398 TI_SCI_PD_EXCLUSIVE>;
693 clock-names = "ref", "lpm";
694 assigned-clocks = <&k3_clks 398 21>; /* USB2_REFCLK */
695 assigned-clock-parents = <&k3_clks 398 22>; /* HFOSC0 */
696 #address-cells = <2>;
697 #size-cells = <2>;
703 bootph-all;
708 reg-names = "otg", "xhci", "dev";
712 interrupt-names = "host",
719 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
722 #address-cells = <1>;
723 #size-cells = <0>;
725 clock-names = "fck";
726 power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>;
731 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
734 #address-cells = <1>;
735 #size-cells = <0>;
737 clock-names = "fck";
738 power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>;
743 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
746 #address-cells = <1>;
747 #size-cells = <0>;
749 clock-names = "fck";
750 power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>;
755 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
758 #address-cells = <1>;
759 #size-cells = <0>;
761 clock-names = "fck";
762 power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>;
767 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
770 #address-cells = <1>;
771 #size-cells = <0>;
773 clock-names = "fck";
774 power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
779 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
782 #address-cells = <1>;
783 #size-cells = <0>;
785 clock-names = "fck";
786 power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
791 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
794 #address-cells = <1>;
795 #size-cells = <0>;
797 clock-names = "fck";
798 power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
803 compatible = "ti,j721e-csi2rx-shim";
806 #address-cells = <2>;
807 #size-cells = <2>;
809 dma-names = "rx0";
810 power-domains = <&k3_pds 72 TI_SCI_PD_EXCLUSIVE>;
813 cdns_csi2rx0: csi-bridge@4504000 {
814 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
818 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
821 phy-names = "dphy";
824 #address-cells = <1>;
825 #size-cells = <0>;
856 compatible = "ti,j721e-csi2rx-shim";
859 #address-cells = <2>;
860 #size-cells = <2>;
862 dma-names = "rx0";
863 power-domains = <&k3_pds 73 TI_SCI_PD_EXCLUSIVE>;
866 cdns_csi2rx1: csi-bridge@4514000 {
867 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
871 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
874 phy-names = "dphy";
876 #address-cells = <1>;
877 #size-cells = <0>;
908 compatible = "ti,j721e-csi2rx-shim";
911 #address-cells = <2>;
912 #size-cells = <2>;
914 dma-names = "rx0";
915 power-domains = <&k3_pds 74 TI_SCI_PD_EXCLUSIVE>;
918 cdns_csi2rx2: csi-bridge@4524000 {
919 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
923 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
926 phy-names = "dphy";
929 #address-cells = <1>;
930 #size-cells = <0>;
961 compatible = "cdns,dphy-rx";
963 #phy-cells = <0>;
964 power-domains = <&k3_pds 212 TI_SCI_PD_EXCLUSIVE>;
969 compatible = "cdns,dphy-rx";
971 #phy-cells = <0>;
972 power-domains = <&k3_pds 213 TI_SCI_PD_EXCLUSIVE>;
977 compatible = "cdns,dphy-rx";
979 #phy-cells = <0>;
980 power-domains = <&k3_pds 214 TI_SCI_PD_EXCLUSIVE>;
984 vpu0: video-codec@4210000 {
985 compatible = "ti,j721s2-wave521c", "cnm,wave521c";
989 power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
992 vpu1: video-codec@4220000 {
993 compatible = "ti,j721s2-wave521c", "cnm,wave521c";
997 power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
1001 compatible = "ti,j721e-sdhci-8bit";
1005 power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
1007 clock-names = "clk_ahb", "clk_xin";
1008 assigned-clocks = <&k3_clks 140 2>;
1009 assigned-clock-parents = <&k3_clks 140 3>;
1010 bus-width = <8>;
1011 ti,otap-del-sel-legacy = <0x0>;
1012 ti,otap-del-sel-mmc-hs = <0x0>;
1013 ti,otap-del-sel-ddr52 = <0x6>;
1014 ti,otap-del-sel-hs200 = <0x8>;
1015 ti,otap-del-sel-hs400 = <0x5>;
1016 ti,itap-del-sel-legacy = <0x10>;
1017 ti,itap-del-sel-mmc-hs = <0xa>;
1018 ti,strobe-sel = <0x77>;
1019 ti,clkbuf-sel = <0x7>;
1020 ti,trm-icp = <0x8>;
1021 mmc-ddr-1_8v;
1022 mmc-hs200-1_8v;
1023 mmc-hs400-1_8v;
1024 dma-coherent;
1029 compatible = "ti,j721e-sdhci-4bit";
1033 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
1035 clock-names = "clk_ahb", "clk_xin";
1036 assigned-clocks = <&k3_clks 141 4>;
1037 assigned-clock-parents = <&k3_clks 141 5>;
1038 bus-width = <4>;
1039 ti,otap-del-sel-legacy = <0x0>;
1040 ti,otap-del-sel-sd-hs = <0x0>;
1041 ti,otap-del-sel-sdr12 = <0xf>;
1042 ti,otap-del-sel-sdr25 = <0xf>;
1043 ti,otap-del-sel-sdr50 = <0xc>;
1044 ti,otap-del-sel-sdr104 = <0x5>;
1045 ti,otap-del-sel-ddr50 = <0xc>;
1046 ti,itap-del-sel-legacy = <0x0>;
1047 ti,itap-del-sel-sd-hs = <0x0>;
1048 ti,itap-del-sel-sdr12 = <0x0>;
1049 ti,itap-del-sel-sdr25 = <0x0>;
1050 ti,itap-del-sel-ddr50 = <0x2>;
1051 ti,clkbuf-sel = <0x7>;
1052 ti,trm-icp = <0x8>;
1053 dma-coherent;
1058 compatible = "ti,j784s4-pcie-host";
1063 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
1064 interrupt-names = "link_state";
1067 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
1068 max-link-speed = <3>;
1069 num-lanes = <4>;
1070 power-domains = <&k3_pds 332 TI_SCI_PD_EXCLUSIVE>;
1072 clock-names = "fck";
1073 #address-cells = <3>;
1074 #size-cells = <2>;
1075 bus-range = <0x0 0xff>;
1076 vendor-id = <0x104c>;
1077 device-id = <0xb012>;
1078 msi-map = <0x0 &gic_its 0x0 0x10000>;
1079 dma-coherent;
1082 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
1087 compatible = "ti,j784s4-pcie-host";
1092 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
1093 interrupt-names = "link_state";
1096 ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
1097 max-link-speed = <3>;
1098 num-lanes = <4>;
1099 power-domains = <&k3_pds 333 TI_SCI_PD_EXCLUSIVE>;
1101 clock-names = "fck";
1102 #address-cells = <3>;
1103 #size-cells = <2>;
1104 bus-range = <0x0 0xff>;
1105 vendor-id = <0x104c>;
1106 device-id = <0xb012>;
1107 msi-map = <0x0 &gic_its 0x10000 0x10000>;
1108 dma-coherent;
1111 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
1116 compatible = "ti,j784s4-pcie-host";
1121 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
1122 interrupt-names = "link_state";
1125 ti,syscon-pcie-ctrl = <&pcie2_ctrl 0x0>;
1126 max-link-speed = <3>;
1127 num-lanes = <2>;
1128 power-domains = <&k3_pds 334 TI_SCI_PD_EXCLUSIVE>;
1130 clock-names = "fck";
1131 #address-cells = <3>;
1132 #size-cells = <2>;
1133 bus-range = <0x0 0xff>;
1134 vendor-id = <0x104c>;
1135 device-id = <0xb012>;
1136 msi-map = <0x0 &gic_its 0x20000 0x10000>;
1137 dma-coherent;
1140 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
1145 compatible = "ti,j784s4-pcie-host";
1150 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
1151 interrupt-names = "link_state";
1154 ti,syscon-pcie-ctrl = <&pcie3_ctrl 0x0>;
1155 max-link-speed = <3>;
1156 num-lanes = <2>;
1157 power-domains = <&k3_pds 335 TI_SCI_PD_EXCLUSIVE>;
1159 clock-names = "fck";
1160 #address-cells = <3>;
1161 #size-cells = <2>;
1162 bus-range = <0x0 0xff>;
1163 vendor-id = <0x104c>;
1164 device-id = <0xb012>;
1165 msi-map = <0x0 &gic_its 0x30000 0x10000>;
1166 dma-coherent;
1169 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
1174 compatible = "ti,j784s4-wiz-10g";
1175 #address-cells = <1>;
1176 #size-cells = <1>;
1177 power-domains = <&k3_pds 404 TI_SCI_PD_EXCLUSIVE>;
1179 clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";
1180 assigned-clocks = <&k3_clks 404 6>;
1181 assigned-clock-parents = <&k3_clks 404 10>;
1182 num-lanes = <4>;
1183 #reset-cells = <1>;
1184 #clock-cells = <1>;
1189 compatible = "ti,j721e-serdes-10g";
1191 reg-names = "torrent_phy";
1193 reset-names = "torrent_reset";
1196 clock-names = "refclk", "phy_en_refclk";
1197 assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
1200 assigned-clock-parents = <&k3_clks 404 6>,
1203 #address-cells = <1>;
1204 #size-cells = <0>;
1205 #clock-cells = <1>;
1211 compatible = "ti,j784s4-wiz-10g";
1212 #address-cells = <1>;
1213 #size-cells = <1>;
1214 power-domains = <&k3_pds 405 TI_SCI_PD_EXCLUSIVE>;
1216 clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";
1217 assigned-clocks = <&k3_clks 405 6>;
1218 assigned-clock-parents = <&k3_clks 405 10>;
1219 num-lanes = <4>;
1220 #reset-cells = <1>;
1221 #clock-cells = <1>;
1226 compatible = "ti,j721e-serdes-10g";
1228 reg-names = "torrent_phy";
1230 reset-names = "torrent_reset";
1233 clock-names = "refclk", "phy_en_refclk";
1234 assigned-clocks = <&serdes_wiz1 TI_WIZ_PLL0_REFCLK>,
1237 assigned-clock-parents = <&k3_clks 405 6>,
1240 #address-cells = <1>;
1241 #size-cells = <0>;
1242 #clock-cells = <1>;
1248 compatible = "ti,j784s4-wiz-10g";
1249 #address-cells = <1>;
1250 #size-cells = <1>;
1251 power-domains = <&k3_pds 406 TI_SCI_PD_EXCLUSIVE>;
1253 clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";
1254 assigned-clocks = <&k3_clks 406 6>;
1255 assigned-clock-parents = <&k3_clks 406 10>;
1256 num-lanes = <4>;
1257 #reset-cells = <1>;
1258 #clock-cells = <1>;
1263 compatible = "ti,j721e-serdes-10g";
1265 reg-names = "torrent_phy";
1267 reset-names = "torrent_reset";
1270 clock-names = "refclk", "phy_en_refclk";
1271 assigned-clocks = <&serdes_wiz2 TI_WIZ_PLL0_REFCLK>,
1274 assigned-clock-parents = <&k3_clks 406 6>,
1277 #address-cells = <1>;
1278 #size-cells = <0>;
1279 #clock-cells = <1>;
1285 compatible = "ti,j784s4-wiz-10g";
1286 #address-cells = <1>;
1287 #size-cells = <1>;
1288 power-domains = <&k3_pds 407 TI_SCI_PD_EXCLUSIVE>;
1290 clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";
1291 assigned-clocks = <&k3_clks 407 6>;
1292 assigned-clock-parents = <&k3_clks 407 10>;
1293 num-lanes = <4>;
1294 #reset-cells = <1>;
1295 #clock-cells = <1>;
1305 compatible = "ti,j721e-serdes-10g";
1308 reg-names = "torrent_phy";
1310 reset-names = "torrent_reset";
1313 clock-names = "refclk", "phy_en_refclk";
1314 assigned-clocks = <&serdes_wiz4 TI_WIZ_PLL0_REFCLK>,
1317 assigned-clock-parents = <&k3_clks 407 6>,
1320 #address-cells = <1>;
1321 #size-cells = <0>;
1322 #clock-cells = <1>;
1328 bootph-all;
1329 compatible = "simple-bus";
1330 #address-cells = <2>;
1331 #size-cells = <2>;
1333 ti,sci-dev-id = <280>;
1334 dma-coherent;
1335 dma-ranges;
1337 main_navss_intr: interrupt-controller@310e0000 {
1338 compatible = "ti,sci-intr";
1340 ti,intr-trigger-type = <4>;
1341 interrupt-controller;
1342 interrupt-parent = <&gic500>;
1343 #interrupt-cells = <1>;
1345 ti,sci-dev-id = <283>;
1346 ti,interrupt-ranges = <0 64 64>,
1351 main_udmass_inta: msi-controller@33d00000 {
1352 compatible = "ti,sci-inta";
1354 interrupt-controller;
1355 #interrupt-cells = <0>;
1356 interrupt-parent = <&main_navss_intr>;
1357 msi-controller;
1359 ti,sci-dev-id = <321>;
1360 ti,interrupt-ranges = <0 0 256>;
1361 ti,unmapped-event-sources = <&main_bcdma_csi>;
1365 bootph-all;
1366 compatible = "ti,am654-secure-proxy";
1367 #mbox-cells = <1>;
1368 reg-names = "target_data", "rt", "scfg";
1372 interrupt-names = "rx_011";
1377 compatible = "ti,am654-hwspinlock";
1379 #hwlock-cells = <1>;
1383 compatible = "ti,am654-mailbox";
1385 #mbox-cells = <1>;
1386 ti,mbox-num-users = <4>;
1387 ti,mbox-num-fifos = <16>;
1388 interrupt-parent = <&main_navss_intr>;
1393 compatible = "ti,am654-mailbox";
1395 #mbox-cells = <1>;
1396 ti,mbox-num-users = <4>;
1397 ti,mbox-num-fifos = <16>;
1398 interrupt-parent = <&main_navss_intr>;
1403 compatible = "ti,am654-mailbox";
1405 #mbox-cells = <1>;
1406 ti,mbox-num-users = <4>;
1407 ti,mbox-num-fifos = <16>;
1408 interrupt-parent = <&main_navss_intr>;
1413 compatible = "ti,am654-mailbox";
1415 #mbox-cells = <1>;
1416 ti,mbox-num-users = <4>;
1417 ti,mbox-num-fifos = <16>;
1418 interrupt-parent = <&main_navss_intr>;
1423 compatible = "ti,am654-mailbox";
1425 #mbox-cells = <1>;
1426 ti,mbox-num-users = <4>;
1427 ti,mbox-num-fifos = <16>;
1428 interrupt-parent = <&main_navss_intr>;
1433 compatible = "ti,am654-mailbox";
1435 #mbox-cells = <1>;
1436 ti,mbox-num-users = <4>;
1437 ti,mbox-num-fifos = <16>;
1438 interrupt-parent = <&main_navss_intr>;
1443 compatible = "ti,am654-mailbox";
1445 #mbox-cells = <1>;
1446 ti,mbox-num-users = <4>;
1447 ti,mbox-num-fifos = <16>;
1448 interrupt-parent = <&main_navss_intr>;
1453 compatible = "ti,am654-mailbox";
1455 #mbox-cells = <1>;
1456 ti,mbox-num-users = <4>;
1457 ti,mbox-num-fifos = <16>;
1458 interrupt-parent = <&main_navss_intr>;
1463 compatible = "ti,am654-mailbox";
1465 #mbox-cells = <1>;
1466 ti,mbox-num-users = <4>;
1467 ti,mbox-num-fifos = <16>;
1468 interrupt-parent = <&main_navss_intr>;
1473 compatible = "ti,am654-mailbox";
1475 #mbox-cells = <1>;
1476 ti,mbox-num-users = <4>;
1477 ti,mbox-num-fifos = <16>;
1478 interrupt-parent = <&main_navss_intr>;
1483 compatible = "ti,am654-mailbox";
1485 #mbox-cells = <1>;
1486 ti,mbox-num-users = <4>;
1487 ti,mbox-num-fifos = <16>;
1488 interrupt-parent = <&main_navss_intr>;
1493 compatible = "ti,am654-mailbox";
1495 #mbox-cells = <1>;
1496 ti,mbox-num-users = <4>;
1497 ti,mbox-num-fifos = <16>;
1498 interrupt-parent = <&main_navss_intr>;
1503 compatible = "ti,am654-mailbox";
1505 #mbox-cells = <1>;
1506 ti,mbox-num-users = <4>;
1507 ti,mbox-num-fifos = <16>;
1508 interrupt-parent = <&main_navss_intr>;
1513 compatible = "ti,am654-mailbox";
1515 #mbox-cells = <1>;
1516 ti,mbox-num-users = <4>;
1517 ti,mbox-num-fifos = <16>;
1518 interrupt-parent = <&main_navss_intr>;
1523 compatible = "ti,am654-mailbox";
1525 #mbox-cells = <1>;
1526 ti,mbox-num-users = <4>;
1527 ti,mbox-num-fifos = <16>;
1528 interrupt-parent = <&main_navss_intr>;
1533 compatible = "ti,am654-mailbox";
1535 #mbox-cells = <1>;
1536 ti,mbox-num-users = <4>;
1537 ti,mbox-num-fifos = <16>;
1538 interrupt-parent = <&main_navss_intr>;
1543 compatible = "ti,am654-mailbox";
1545 #mbox-cells = <1>;
1546 ti,mbox-num-users = <4>;
1547 ti,mbox-num-fifos = <16>;
1548 interrupt-parent = <&main_navss_intr>;
1553 compatible = "ti,am654-mailbox";
1555 #mbox-cells = <1>;
1556 ti,mbox-num-users = <4>;
1557 ti,mbox-num-fifos = <16>;
1558 interrupt-parent = <&main_navss_intr>;
1563 compatible = "ti,am654-mailbox";
1565 #mbox-cells = <1>;
1566 ti,mbox-num-users = <4>;
1567 ti,mbox-num-fifos = <16>;
1568 interrupt-parent = <&main_navss_intr>;
1573 compatible = "ti,am654-mailbox";
1575 #mbox-cells = <1>;
1576 ti,mbox-num-users = <4>;
1577 ti,mbox-num-fifos = <16>;
1578 interrupt-parent = <&main_navss_intr>;
1583 compatible = "ti,am654-mailbox";
1585 #mbox-cells = <1>;
1586 ti,mbox-num-users = <4>;
1587 ti,mbox-num-fifos = <16>;
1588 interrupt-parent = <&main_navss_intr>;
1593 compatible = "ti,am654-mailbox";
1595 #mbox-cells = <1>;
1596 ti,mbox-num-users = <4>;
1597 ti,mbox-num-fifos = <16>;
1598 interrupt-parent = <&main_navss_intr>;
1603 compatible = "ti,am654-mailbox";
1605 #mbox-cells = <1>;
1606 ti,mbox-num-users = <4>;
1607 ti,mbox-num-fifos = <16>;
1608 interrupt-parent = <&main_navss_intr>;
1613 compatible = "ti,am654-mailbox";
1615 #mbox-cells = <1>;
1616 ti,mbox-num-users = <4>;
1617 ti,mbox-num-fifos = <16>;
1618 interrupt-parent = <&main_navss_intr>;
1623 compatible = "ti,am654-navss-ringacc";
1629 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
1630 ti,num-rings = <1024>;
1631 ti,sci-rm-range-gp-rings = <0x1>;
1633 ti,sci-dev-id = <315>;
1634 msi-parent = <&main_udmass_inta>;
1637 main_udmap: dma-controller@31150000 {
1638 compatible = "ti,j721e-navss-main-udmap";
1645 reg-names = "gcfg", "rchanrt", "tchanrt",
1647 msi-parent = <&main_udmass_inta>;
1648 #dma-cells = <1>;
1651 ti,sci-dev-id = <319>;
1654 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
1657 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
1660 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
1663 main_bcdma_csi: dma-controller@311a0000 {
1664 compatible = "ti,j721s2-dmss-bcdma-csi";
1669 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
1670 msi-parent = <&main_udmass_inta>;
1671 #dma-cells = <3>;
1673 ti,sci-dev-id = <281>;
1674 ti,sci-rm-range-rchan = <0x21>;
1675 ti,sci-rm-range-tchan = <0x22>;
1679 compatible = "ti,j721e-cpts";
1681 reg-names = "cpts";
1683 clock-names = "cpts";
1684 assigned-clocks = <&k3_clks 62 3>; /* CPTS_RFT_CLK */
1685 assigned-clock-parents = <&k3_clks 62 5>; /* MAIN_0_HSDIV6_CLK */
1686 interrupts-extended = <&main_navss_intr 391>;
1687 interrupt-names = "cpts";
1688 ti,cpts-periodic-outputs = <6>;
1689 ti,cpts-ext-ts-inputs = <8>;
1694 compatible = "ti,j784s4-cpswxg-nuss";
1696 reg-names = "cpsw_nuss";
1698 #address-cells = <2>;
1699 #size-cells = <2>;
1700 dma-coherent;
1702 clock-names = "fck";
1703 power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
1714 dma-names = "tx0", "tx1", "tx2", "tx3",
1720 ethernet-ports {
1721 #address-cells = <1>;
1722 #size-cells = <0>;
1727 ti,mac-only;
1734 ti,mac-only;
1741 ti,mac-only;
1748 ti,mac-only;
1755 ti,mac-only;
1762 ti,mac-only;
1769 ti,mac-only;
1776 ti,mac-only;
1782 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
1784 #address-cells = <1>;
1785 #size-cells = <0>;
1787 clock-names = "fck";
1793 compatible = "ti,am65-cpts";
1796 clock-names = "cpts";
1797 interrupts-extended = <&gic500 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1798 interrupt-names = "cpts";
1799 ti,cpts-ext-ts-inputs = <4>;
1800 ti,cpts-periodic-outputs = <2>;
1805 compatible = "ti,j721e-cpsw-nuss";
1807 reg-names = "cpsw_nuss";
1809 #address-cells = <2>;
1810 #size-cells = <2>;
1811 dma-coherent;
1813 clock-names = "fck";
1814 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
1825 dma-names = "tx0", "tx1", "tx2", "tx3",
1831 ethernet-ports {
1832 #address-cells = <1>;
1833 #size-cells = <0>;
1839 ti,mac-only;
1845 compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
1847 #address-cells = <1>;
1848 #size-cells = <0>;
1850 clock-names = "fck";
1856 compatible = "ti,am65-cpts";
1859 clock-names = "cpts";
1860 interrupts-extended = <&gic500 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1861 interrupt-names = "cpts";
1862 ti,cpts-ext-ts-inputs = <4>;
1863 ti,cpts-periodic-outputs = <2>;
1871 reg-names = "m_can", "message_ram";
1872 power-domains = <&k3_pds 245 TI_SCI_PD_EXCLUSIVE>;
1874 clock-names = "hclk", "cclk";
1877 interrupt-names = "int0", "int1";
1878 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1886 reg-names = "m_can", "message_ram";
1887 power-domains = <&k3_pds 246 TI_SCI_PD_EXCLUSIVE>;
1889 clock-names = "hclk", "cclk";
1892 interrupt-names = "int0", "int1";
1893 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1901 reg-names = "m_can", "message_ram";
1902 power-domains = <&k3_pds 247 TI_SCI_PD_EXCLUSIVE>;
1904 clock-names = "hclk", "cclk";
1907 interrupt-names = "int0", "int1";
1908 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1916 reg-names = "m_can", "message_ram";
1917 power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
1919 clock-names = "hclk", "cclk";
1922 interrupt-names = "int0", "int1";
1923 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1931 reg-names = "m_can", "message_ram";
1932 power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
1934 clock-names = "hclk", "cclk";
1937 interrupt-names = "int0", "int1";
1938 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1946 reg-names = "m_can", "message_ram";
1947 power-domains = <&k3_pds 250 TI_SCI_PD_EXCLUSIVE>;
1949 clock-names = "hclk", "cclk";
1952 interrupt-names = "int0", "int1";
1953 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1961 reg-names = "m_can", "message_ram";
1962 power-domains = <&k3_pds 251 TI_SCI_PD_EXCLUSIVE>;
1964 clock-names = "hclk", "cclk";
1967 interrupt-names = "int0", "int1";
1968 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1976 reg-names = "m_can", "message_ram";
1977 power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
1979 clock-names = "hclk", "cclk";
1982 interrupt-names = "int0", "int1";
1983 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1991 reg-names = "m_can", "message_ram";
1992 power-domains = <&k3_pds 253 TI_SCI_PD_EXCLUSIVE>;
1994 clock-names = "hclk", "cclk";
1997 interrupt-names = "int0", "int1";
1998 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2006 reg-names = "m_can", "message_ram";
2007 power-domains = <&k3_pds 254 TI_SCI_PD_EXCLUSIVE>;
2009 clock-names = "hclk", "cclk";
2012 interrupt-names = "int0", "int1";
2013 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2021 reg-names = "m_can", "message_ram";
2022 power-domains = <&k3_pds 255 TI_SCI_PD_EXCLUSIVE>;
2024 clock-names = "hclk", "cclk";
2027 interrupt-names = "int0", "int1";
2028 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2036 reg-names = "m_can", "message_ram";
2037 power-domains = <&k3_pds 256 TI_SCI_PD_EXCLUSIVE>;
2039 clock-names = "hclk", "cclk";
2042 interrupt-names = "int0", "int1";
2043 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2051 reg-names = "m_can", "message_ram";
2052 power-domains = <&k3_pds 257 TI_SCI_PD_EXCLUSIVE>;
2054 clock-names = "hclk", "cclk";
2057 interrupt-names = "int0", "int1";
2058 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2066 reg-names = "m_can", "message_ram";
2067 power-domains = <&k3_pds 258 TI_SCI_PD_EXCLUSIVE>;
2069 clock-names = "hclk", "cclk";
2072 interrupt-names = "int0", "int1";
2073 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2081 reg-names = "m_can", "message_ram";
2082 power-domains = <&k3_pds 259 TI_SCI_PD_EXCLUSIVE>;
2084 clock-names = "hclk", "cclk";
2087 interrupt-names = "int0", "int1";
2088 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2096 reg-names = "m_can", "message_ram";
2097 power-domains = <&k3_pds 260 TI_SCI_PD_EXCLUSIVE>;
2099 clock-names = "hclk", "cclk";
2102 interrupt-names = "int0", "int1";
2103 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2111 reg-names = "m_can", "message_ram";
2112 power-domains = <&k3_pds 261 TI_SCI_PD_EXCLUSIVE>;
2114 clock-names = "hclk", "cclk";
2117 interrupt-names = "int0", "int1";
2118 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2126 reg-names = "m_can", "message_ram";
2127 power-domains = <&k3_pds 262 TI_SCI_PD_EXCLUSIVE>;
2129 clock-names = "hclk", "cclk";
2132 interrupt-names = "int0", "int1";
2133 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2138 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2141 #address-cells = <1>;
2142 #size-cells = <0>;
2143 power-domains = <&k3_pds 376 TI_SCI_PD_EXCLUSIVE>;
2149 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2152 #address-cells = <1>;
2153 #size-cells = <0>;
2154 power-domains = <&k3_pds 377 TI_SCI_PD_EXCLUSIVE>;
2160 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2163 #address-cells = <1>;
2164 #size-cells = <0>;
2165 power-domains = <&k3_pds 378 TI_SCI_PD_EXCLUSIVE>;
2171 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2174 #address-cells = <1>;
2175 #size-cells = <0>;
2176 power-domains = <&k3_pds 379 TI_SCI_PD_EXCLUSIVE>;
2182 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2185 #address-cells = <1>;
2186 #size-cells = <0>;
2187 power-domains = <&k3_pds 380 TI_SCI_PD_EXCLUSIVE>;
2193 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2196 #address-cells = <1>;
2197 #size-cells = <0>;
2198 power-domains = <&k3_pds 381 TI_SCI_PD_EXCLUSIVE>;
2204 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2207 #address-cells = <1>;
2208 #size-cells = <0>;
2209 power-domains = <&k3_pds 382 TI_SCI_PD_EXCLUSIVE>;
2215 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2218 #address-cells = <1>;
2219 #size-cells = <0>;
2220 power-domains = <&k3_pds 383 TI_SCI_PD_EXCLUSIVE>;
2225 ufs_wrapper: ufs-wrapper@4e80000 {
2226 compatible = "ti,j721e-ufs";
2228 power-domains = <&k3_pds 387 TI_SCI_PD_EXCLUSIVE>;
2230 assigned-clocks = <&k3_clks 387 3>;
2231 assigned-clock-parents = <&k3_clks 387 6>;
2233 #address-cells = <2>;
2234 #size-cells = <2>;
2238 compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
2241 freq-table-hz = <250000000 250000000>, <19200000 19200000>,
2244 clock-names = "core_clk", "phy_clk", "ref_clk";
2245 dma-coherent;
2250 compatible = "ti,j721s2-r5fss";
2251 ti,cluster-mode = <1>;
2252 #address-cells = <1>;
2253 #size-cells = <1>;
2256 power-domains = <&k3_pds 336 TI_SCI_PD_EXCLUSIVE>;
2259 compatible = "ti,j721s2-r5f";
2262 reg-names = "atcm", "btcm";
2264 ti,sci-dev-id = <339>;
2265 ti,sci-proc-ids = <0x06 0xff>;
2267 firmware-name = "j784s4-main-r5f0_0-fw";
2268 ti,atcm-enable = <1>;
2269 ti,btcm-enable = <1>;
2274 compatible = "ti,j721s2-r5f";
2277 reg-names = "atcm", "btcm";
2279 ti,sci-dev-id = <340>;
2280 ti,sci-proc-ids = <0x07 0xff>;
2282 firmware-name = "j784s4-main-r5f0_1-fw";
2283 ti,atcm-enable = <1>;
2284 ti,btcm-enable = <1>;
2290 compatible = "ti,j721s2-r5fss";
2291 ti,cluster-mode = <1>;
2292 #address-cells = <1>;
2293 #size-cells = <1>;
2296 power-domains = <&k3_pds 337 TI_SCI_PD_EXCLUSIVE>;
2299 compatible = "ti,j721s2-r5f";
2302 reg-names = "atcm", "btcm";
2304 ti,sci-dev-id = <341>;
2305 ti,sci-proc-ids = <0x08 0xff>;
2307 firmware-name = "j784s4-main-r5f1_0-fw";
2308 ti,atcm-enable = <1>;
2309 ti,btcm-enable = <1>;
2314 compatible = "ti,j721s2-r5f";
2317 reg-names = "atcm", "btcm";
2319 ti,sci-dev-id = <342>;
2320 ti,sci-proc-ids = <0x09 0xff>;
2322 firmware-name = "j784s4-main-r5f1_1-fw";
2323 ti,atcm-enable = <1>;
2324 ti,btcm-enable = <1>;
2330 compatible = "ti,j721s2-r5fss";
2331 ti,cluster-mode = <1>;
2332 #address-cells = <1>;
2333 #size-cells = <1>;
2336 power-domains = <&k3_pds 338 TI_SCI_PD_EXCLUSIVE>;
2339 compatible = "ti,j721s2-r5f";
2342 reg-names = "atcm", "btcm";
2344 ti,sci-dev-id = <343>;
2345 ti,sci-proc-ids = <0x0a 0xff>;
2347 firmware-name = "j784s4-main-r5f2_0-fw";
2348 ti,atcm-enable = <1>;
2349 ti,btcm-enable = <1>;
2354 compatible = "ti,j721s2-r5f";
2357 reg-names = "atcm", "btcm";
2359 ti,sci-dev-id = <344>;
2360 ti,sci-proc-ids = <0x0b 0xff>;
2362 firmware-name = "j784s4-main-r5f2_1-fw";
2363 ti,atcm-enable = <1>;
2364 ti,btcm-enable = <1>;
2370 compatible = "ti,j721s2-c71-dsp";
2373 reg-names = "l2sram", "l1dram";
2375 ti,sci-dev-id = <30>;
2376 ti,sci-proc-ids = <0x30 0xff>;
2378 firmware-name = "j784s4-c71_0-fw";
2383 compatible = "ti,j721s2-c71-dsp";
2386 reg-names = "l2sram", "l1dram";
2388 ti,sci-dev-id = <33>;
2389 ti,sci-proc-ids = <0x31 0xff>;
2391 firmware-name = "j784s4-c71_1-fw";
2396 compatible = "ti,j721s2-c71-dsp";
2399 reg-names = "l2sram", "l1dram";
2401 ti,sci-dev-id = <37>;
2402 ti,sci-proc-ids = <0x32 0xff>;
2404 firmware-name = "j784s4-c71_2-fw";
2409 compatible = "ti,j721s2-c71-dsp";
2412 reg-names = "l2sram", "l1dram";
2414 ti,sci-dev-id = <40>;
2415 ti,sci-proc-ids = <0x33 0xff>;
2417 firmware-name = "j784s4-c71_3-fw";
2422 compatible = "ti,j721e-esm";
2424 ti,esm-pins = <688>, <689>, <690>, <691>, <692>, <693>, <694>,
2426 bootph-pre-ram;
2430 compatible = "ti,j7-rti-wdt";
2433 power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
2434 assigned-clocks = <&k3_clks 348 0>;
2435 assigned-clock-parents = <&k3_clks 348 4>;
2439 compatible = "ti,j7-rti-wdt";
2442 power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
2443 assigned-clocks = <&k3_clks 349 0>;
2444 assigned-clock-parents = <&k3_clks 349 4>;
2448 compatible = "ti,j7-rti-wdt";
2451 power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
2452 assigned-clocks = <&k3_clks 350 0>;
2453 assigned-clock-parents = <&k3_clks 350 4>;
2457 compatible = "ti,j7-rti-wdt";
2460 power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
2461 assigned-clocks = <&k3_clks 351 0>;
2462 assigned-clock-parents = <&k3_clks 351 4>;
2466 compatible = "ti,j7-rti-wdt";
2469 power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
2470 assigned-clocks = <&k3_clks 352 0>;
2471 assigned-clock-parents = <&k3_clks 352 4>;
2475 compatible = "ti,j7-rti-wdt";
2478 power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
2479 assigned-clocks = <&k3_clks 353 0>;
2480 assigned-clock-parents = <&k3_clks 353 4>;
2484 compatible = "ti,j7-rti-wdt";
2487 power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
2488 assigned-clocks = <&k3_clks 354 0>;
2489 assigned-clock-parents = <&k3_clks 354 4>;
2493 compatible = "ti,j7-rti-wdt";
2496 power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
2497 assigned-clocks = <&k3_clks 355 0>;
2498 assigned-clock-parents = <&k3_clks 355 4>;
2507 compatible = "ti,j7-rti-wdt";
2510 power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
2511 assigned-clocks = <&k3_clks 360 0>;
2512 assigned-clock-parents = <&k3_clks 360 4>;
2518 compatible = "ti,j7-rti-wdt";
2521 power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
2522 assigned-clocks = <&k3_clks 356 0>;
2523 assigned-clock-parents = <&k3_clks 356 4>;
2529 compatible = "ti,j7-rti-wdt";
2532 power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
2533 assigned-clocks = <&k3_clks 357 0>;
2534 assigned-clock-parents = <&k3_clks 357 4>;
2540 compatible = "ti,j7-rti-wdt";
2543 power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
2544 assigned-clocks = <&k3_clks 358 0>;
2545 assigned-clock-parents = <&k3_clks 358 4>;
2551 compatible = "ti,j7-rti-wdt";
2554 power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
2555 assigned-clocks = <&k3_clks 359 0>;
2556 assigned-clock-parents = <&k3_clks 359 4>;
2562 compatible = "ti,j7-rti-wdt";
2565 power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
2566 assigned-clocks = <&k3_clks 361 0>;
2567 assigned-clock-parents = <&k3_clks 361 4>;
2573 compatible = "ti,j7-rti-wdt";
2576 power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
2577 assigned-clocks = <&k3_clks 362 0>;
2578 assigned-clock-parents = <&k3_clks 362 4>;
2584 compatible = "ti,j7-rti-wdt";
2587 power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
2588 assigned-clocks = <&k3_clks 363 0>;
2589 assigned-clock-parents = <&k3_clks 363 4>;
2595 compatible = "ti,j7-rti-wdt";
2598 power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
2599 assigned-clocks = <&k3_clks 364 0>;
2600 assigned-clock-parents = <&k3_clks 364 4>;
2606 compatible = "ti,j7-rti-wdt";
2609 power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
2610 assigned-clocks = <&k3_clks 365 0>;
2611 assigned-clock-parents = <&k3_clks 366 4>;
2617 compatible = "ti,j7-rti-wdt";
2620 power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
2621 assigned-clocks = <&k3_clks 366 0>;
2622 assigned-clock-parents = <&k3_clks 366 4>;
2628 compatible = "ti,j721e-mhdp8546";
2631 reg-names = "mhdptx", "j721e-intg";
2633 interrupt-parent = <&gic500>;
2635 power-domains = <&k3_pds 217 TI_SCI_PD_EXCLUSIVE>;
2639 #address-cells = <1>;
2640 #size-cells = <0>;
2641 /* Remote-endpoints are on the boards so
2648 compatible = "ti,j721e-dss";
2666 reg-names = "common_m", "common_s0",
2677 clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
2678 power-domains = <&k3_pds 218 TI_SCI_PD_EXCLUSIVE>;
2683 interrupt-names = "common_m",
2697 compatible = "ti,am33xx-mcasp-audio";
2700 reg-names = "mpu","dat";
2703 interrupt-names = "tx", "rx";
2705 dma-names = "tx", "rx";
2707 clock-names = "fck";
2708 assigned-clocks = <&k3_clks 265 0>;
2709 assigned-clock-parents = <&k3_clks 265 1>;
2710 power-domains = <&k3_pds 265 TI_SCI_PD_EXCLUSIVE>;
2715 compatible = "ti,am33xx-mcasp-audio";
2718 reg-names = "mpu","dat";
2721 interrupt-names = "tx", "rx";
2723 dma-names = "tx", "rx";
2725 clock-names = "fck";
2726 assigned-clocks = <&k3_clks 266 0>;
2727 assigned-clock-parents = <&k3_clks 266 1>;
2728 power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>;
2733 compatible = "ti,am33xx-mcasp-audio";
2736 reg-names = "mpu","dat";
2739 interrupt-names = "tx", "rx";
2741 dma-names = "tx", "rx";
2743 clock-names = "fck";
2744 assigned-clocks = <&k3_clks 267 0>;
2745 assigned-clock-parents = <&k3_clks 267 1>;
2746 power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>;
2751 compatible = "ti,am33xx-mcasp-audio";
2754 reg-names = "mpu","dat";
2757 interrupt-names = "tx", "rx";
2759 dma-names = "tx", "rx";
2761 clock-names = "fck";
2762 assigned-clocks = <&k3_clks 268 0>;
2763 assigned-clock-parents = <&k3_clks 268 1>;
2764 power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>;
2769 compatible = "ti,am33xx-mcasp-audio";
2772 reg-names = "mpu","dat";
2775 interrupt-names = "tx", "rx";
2777 dma-names = "tx", "rx";
2779 clock-names = "fck";
2780 assigned-clocks = <&k3_clks 269 0>;
2781 assigned-clock-parents = <&k3_clks 269 1>;
2782 power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;