Lines Matching +full:buck1 +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
10 #include "k3-j7200.dtsi"
15 bootph-all;
21 reserved_memory: reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
29 no-map;
32 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
33 compatible = "shared-dma-pool";
35 no-map;
38 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
39 compatible = "shared-dma-pool";
41 no-map;
44 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
45 compatible = "shared-dma-pool";
47 no-map;
50 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
51 compatible = "shared-dma-pool";
53 no-map;
56 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
57 compatible = "shared-dma-pool";
59 no-map;
62 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
63 compatible = "shared-dma-pool";
65 no-map;
68 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
69 compatible = "shared-dma-pool";
71 no-map;
74 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
75 compatible = "shared-dma-pool";
77 no-map;
80 rtos_ipc_memory_region: ipc-memories@a4000000 {
83 no-map;
87 mux0: mux-controller-0 {
88 compatible = "gpio-mux";
89 #mux-state-cells = <1>;
90 mux-gpios = <&exp_som 1 GPIO_ACTIVE_HIGH>;
93 mux1: mux-controller-1 {
94 compatible = "gpio-mux";
95 #mux-state-cells = <1>;
96 mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>;
99 transceiver0: can-phy0 {
102 #phy-cells = <0>;
103 max-bitrate = <5000000>;
108 mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins {
109 pinctrl-single,pins = <
124 bootph-all;
127 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
128 pinctrl-single,pins = <
141 bootph-all;
146 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
147 pinctrl-single,pins = <
151 bootph-all;
156 pmic_irq_pins_default: pmic-irq-default-pins {
157 pinctrl-single,pins = <
164 main_i2c0_pins_default: main-i2c0-default-pins {
165 pinctrl-single,pins = <
171 main_mcan0_pins_default: main-mcan0-default-pins {
172 pinctrl-single,pins = <
184 pinctrl-names = "default";
185 pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
190 compatible = "cypress,hyperflash", "cfi-flash";
192 bootph-all;
195 compatible = "fixed-partitions";
196 #address-cells = <1>;
197 #size-cells = <1>;
210 label = "hbmc.u-boot";
231 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
232 ti,mbox-rx = <0 0 0>;
233 ti,mbox-tx = <1 0 0>;
236 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
237 ti,mbox-rx = <2 0 0>;
238 ti,mbox-tx = <3 0 0>;
246 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
247 ti,mbox-rx = <0 0 0>;
248 ti,mbox-tx = <1 0 0>;
251 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
252 ti,mbox-rx = <2 0 0>;
253 ti,mbox-tx = <3 0 0>;
259 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
265 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
270 ti,cluster-mode = <0>;
288 memory-region = <&main_r5fss0_core0_dma_memory_region>,
294 memory-region = <&main_r5fss0_core1_dma_memory_region>,
299 pinctrl-names = "default";
300 pinctrl-0 = <&main_i2c0_pins_default>;
301 clock-frequency = <400000>;
306 gpio-controller;
307 #gpio-cells = <2>;
308 gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0",
317 pinctrl-names = "default";
318 pinctrl-0 = <&wkup_i2c0_pins_default>;
319 clock-frequency = <400000>;
327 compatible = "ti,tps6594-q1";
329 system-power-controller;
330 pinctrl-names = "default";
331 pinctrl-0 = <&pmic_irq_pins_default>;
332 interrupt-parent = <&wkup_gpio0>;
334 gpio-controller;
335 #gpio-cells = <2>;
336 ti,primary-pmic;
337 buck1-supply = <&vsys_3v3>;
338 buck2-supply = <&vsys_3v3>;
339 buck3-supply = <&vsys_3v3>;
340 buck4-supply = <&vsys_3v3>;
341 buck5-supply = <&vsys_3v3>;
342 ldo1-supply = <&vsys_3v3>;
343 ldo2-supply = <&vsys_3v3>;
344 ldo3-supply = <&vsys_3v3>;
345 ldo4-supply = <&vsys_3v3>;
348 bucka1: buck1 {
349 regulator-name = "vda_mcu_1v8";
350 regulator-min-microvolt = <1800000>;
351 regulator-max-microvolt = <1800000>;
352 regulator-boot-on;
353 regulator-always-on;
354 bootph-all;
358 regulator-name = "vdd_mcuio_1v8";
359 regulator-min-microvolt = <1800000>;
360 regulator-max-microvolt = <1800000>;
361 regulator-boot-on;
362 regulator-always-on;
366 regulator-name = "vdd_mcu_0v85";
367 regulator-min-microvolt = <850000>;
368 regulator-max-microvolt = <850000>;
369 regulator-boot-on;
370 regulator-always-on;
374 regulator-name = "vdd_ddr_1v1";
375 regulator-min-microvolt = <1100000>;
376 regulator-max-microvolt = <1100000>;
377 regulator-boot-on;
378 regulator-always-on;
382 regulator-name = "vdd_phyio_1v8";
383 regulator-min-microvolt = <1800000>;
384 regulator-max-microvolt = <1800000>;
385 regulator-boot-on;
386 regulator-always-on;
390 regulator-name = "vdd1_lpddr4_1v8";
391 regulator-min-microvolt = <1800000>;
392 regulator-max-microvolt = <1800000>;
393 regulator-boot-on;
394 regulator-always-on;
398 regulator-name = "vda_dll_0v8";
399 regulator-min-microvolt = <800000>;
400 regulator-max-microvolt = <800000>;
401 regulator-boot-on;
402 regulator-always-on;
406 regulator-name = "vdd_wk_0v8";
407 regulator-min-microvolt = <800000>;
408 regulator-max-microvolt = <800000>;
409 regulator-boot-on;
410 regulator-always-on;
414 regulator-name = "vda_pll_1v8";
415 regulator-min-microvolt = <1800000>;
416 regulator-max-microvolt = <1800000>;
417 regulator-boot-on;
418 regulator-always-on;
424 compatible = "ti,lp8764-q1";
426 system-power-controller;
427 interrupt-parent = <&wkup_gpio0>;
429 gpio-controller;
430 #gpio-cells = <2>;
431 buck1-supply = <&vsys_3v3>;
432 buck2-supply = <&vsys_3v3>;
433 buck3-supply = <&vsys_3v3>;
434 buck4-supply = <&vsys_3v3>;
437 buckb1: buck1 {
438 regulator-name = "vdd_cpu_avs";
439 regulator-min-microvolt = <600000>;
440 regulator-max-microvolt = <900000>;
441 regulator-always-on;
442 regulator-boot-on;
443 bootph-pre-ram;
447 regulator-name = "vdd_ram_0v85";
448 regulator-min-microvolt = <850000>;
449 regulator-max-microvolt = <850000>;
450 regulator-boot-on;
451 regulator-always-on;
455 regulator-name = "vdd_core_0v85";
456 regulator-min-microvolt = <850000>;
457 regulator-max-microvolt = <850000>;
458 regulator-boot-on;
459 regulator-always-on;
463 regulator-name = "vdd_io_1v8";
464 regulator-min-microvolt = <1800000>;
465 regulator-max-microvolt = <1800000>;
466 regulator-boot-on;
467 regulator-always-on;
475 pinctrl-names = "default";
476 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
479 compatible = "jedec,spi-nor";
481 spi-tx-bus-width = <8>;
482 spi-rx-bus-width = <8>;
483 spi-max-frequency = <25000000>;
484 cdns,tshsl-ns = <60>;
485 cdns,tsd2d-ns = <60>;
486 cdns,tchsh-ns = <60>;
487 cdns,tslch-ns = <60>;
488 cdns,read-delay = <4>;
491 compatible = "fixed-partitions";
492 #address-cells = <1>;
493 #size-cells = <1>;
506 label = "ospi.u-boot";
528 bootph-all;
536 pinctrl-0 = <&main_mcan0_pins_default>;
537 pinctrl-names = "default";