Lines Matching +full:dcb +full:- +full:algorithm
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
17 audio_extal_clk: audio-clk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
21 clock-frequency = <0>;
31 cluster0_opp: opp-table-0 {
32 compatible = "operating-points-v2";
34 opp-1700000000 {
35 opp-hz = /bits/ 64 <1700000000>;
36 opp-microvolt = <900000>;
37 clock-latency-ns = <300000>;
39 opp-850000000 {
40 opp-hz = /bits/ 64 <850000000>;
41 opp-microvolt = <800000>;
42 clock-latency-ns = <300000>;
44 opp-425000000 {
45 opp-hz = /bits/ 64 <425000000>;
46 opp-microvolt = <800000>;
47 clock-latency-ns = <300000>;
49 opp-212500000 {
50 opp-hz = /bits/ 64 <212500000>;
51 opp-microvolt = <800000>;
52 clock-latency-ns = <300000>;
53 opp-suspend;
58 #address-cells = <1>;
59 #size-cells = <0>;
62 compatible = "arm,cortex-a55";
65 next-level-cache = <&L3_CA55>;
66 enable-method = "psci";
68 #cooling-cells = <2>;
69 operating-points-v2 = <&cluster0_opp>;
73 compatible = "arm,cortex-a55";
76 next-level-cache = <&L3_CA55>;
77 enable-method = "psci";
79 #cooling-cells = <2>;
80 operating-points-v2 = <&cluster0_opp>;
84 compatible = "arm,cortex-a55";
87 next-level-cache = <&L3_CA55>;
88 enable-method = "psci";
90 #cooling-cells = <2>;
91 operating-points-v2 = <&cluster0_opp>;
95 compatible = "arm,cortex-a55";
98 next-level-cache = <&L3_CA55>;
99 enable-method = "psci";
101 #cooling-cells = <2>;
102 operating-points-v2 = <&cluster0_opp>;
105 L3_CA55: cache-controller-0 {
107 cache-unified;
108 cache-size = <0x100000>;
109 cache-level = <3>;
113 gpu_opp_table: opp-table-1 {
114 compatible = "operating-points-v2";
116 opp-630000000 {
117 opp-hz = /bits/ 64 <630000000>;
118 opp-microvolt = <800000>;
121 opp-315000000 {
122 opp-hz = /bits/ 64 <315000000>;
123 opp-microvolt = <800000>;
126 opp-157500000 {
127 opp-hz = /bits/ 64 <157500000>;
128 opp-microvolt = <800000>;
131 opp-78750000 {
132 opp-hz = /bits/ 64 <78750000>;
133 opp-microvolt = <800000>;
136 opp-19687500 {
137 opp-hz = /bits/ 64 <19687500>;
138 opp-microvolt = <800000>;
143 compatible = "arm,cortex-a55-pmu";
148 compatible = "arm,psci-1.0", "arm,psci-0.2";
152 qextal_clk: qextal-clk {
153 compatible = "fixed-clock";
154 #clock-cells = <0>;
156 clock-frequency = <0>;
159 rtxin_clk: rtxin-clk {
160 compatible = "fixed-clock";
161 #clock-cells = <0>;
163 clock-frequency = <0>;
167 compatible = "simple-bus";
168 #address-cells = <2>;
169 #size-cells = <2>;
172 icu: interrupt-controller@10400000 {
173 compatible = "renesas,r9a09g057-icu";
175 #interrupt-cells = <2>;
176 #address-cells = <0>;
177 interrupt-controller;
236 interrupt-names = "nmi",
251 "int-ca55-0", "int-ca55-1",
252 "int-ca55-2", "int-ca55-3",
253 "icu-error-ca55",
254 "gpt-u0-gtciada", "gpt-u0-gtciadb",
255 "gpt-u1-gtciada", "gpt-u1-gtciadb";
257 power-domains = <&cpg>;
262 compatible = "renesas,r9a09g057-pinctrl";
265 gpio-controller;
266 #gpio-cells = <2>;
267 gpio-ranges = <&pinctrl 0 0 96>;
268 #interrupt-cells = <2>;
269 interrupt-controller;
270 interrupt-parent = <&icu>;
271 power-domains = <&cpg>;
275 cpg: clock-controller@10420000 {
276 compatible = "renesas,r9a09g057-cpg";
279 clock-names = "audio_extal", "rtxin", "qextal";
280 #clock-cells = <2>;
281 #reset-cells = <1>;
282 #power-domain-cells = <0>;
285 sys: system-controller@10430000 {
286 compatible = "renesas,r9a09g057-sys";
293 compatible = "renesas,r9a09g057-tsu", "renesas,r9a09g047-tsu";
297 interrupt-names = "adi", "adcmpi";
300 power-domains = <&cpg>;
301 #thermal-sensor-cells = <0>;
302 renesas,tsu-trim = <&sys 0x320>;
306 compatible = "renesas,r9a09g057-tsu", "renesas,r9a09g047-tsu";
310 interrupt-names = "adi", "adcmpi";
313 power-domains = <&cpg>;
314 #thermal-sensor-cells = <0>;
315 renesas,tsu-trim = <&sys 0x330>;
319 compatible = "renesas,r9a09g057-xspi", "renesas,r9a09g047-xspi";
322 reg-names = "regs", "dirmap";
325 interrupt-names = "pulse", "err_pulse";
330 clock-names = "ahb", "axi", "spi", "spix2";
332 reset-names = "hresetn", "aresetn";
333 power-domains = <&cpg>;
334 #address-cells = <1>;
335 #size-cells = <0>;
339 dmac0: dma-controller@11400000 {
340 compatible = "renesas,r9a09g057-dmac";
359 interrupt-names = "error",
365 power-domains = <&cpg>;
367 #dma-cells = <1>;
368 dma-channels = <16>;
372 dmac1: dma-controller@14830000 {
373 compatible = "renesas,r9a09g057-dmac";
392 interrupt-names = "error",
398 power-domains = <&cpg>;
400 #dma-cells = <1>;
401 dma-channels = <16>;
405 dmac2: dma-controller@14840000 {
406 compatible = "renesas,r9a09g057-dmac";
425 interrupt-names = "error",
431 power-domains = <&cpg>;
433 #dma-cells = <1>;
434 dma-channels = <16>;
438 dmac3: dma-controller@12000000 {
439 compatible = "renesas,r9a09g057-dmac";
458 interrupt-names = "error",
464 power-domains = <&cpg>;
466 #dma-cells = <1>;
467 dma-channels = <16>;
471 dmac4: dma-controller@12010000 {
472 compatible = "renesas,r9a09g057-dmac";
491 interrupt-names = "error",
497 power-domains = <&cpg>;
499 #dma-cells = <1>;
500 dma-channels = <16>;
505 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
510 power-domains = <&cpg>;
515 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
520 power-domains = <&cpg>;
525 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
530 power-domains = <&cpg>;
535 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
540 power-domains = <&cpg>;
545 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
550 power-domains = <&cpg>;
555 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
560 power-domains = <&cpg>;
565 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
570 power-domains = <&cpg>;
575 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
580 power-domains = <&cpg>;
585 compatible = "renesas,r9a09g057-wdt";
588 clock-names = "pclk", "oscclk";
590 power-domains = <&cpg>;
595 compatible = "renesas,r9a09g057-wdt";
598 clock-names = "pclk", "oscclk";
600 power-domains = <&cpg>;
605 compatible = "renesas,r9a09g057-wdt";
608 clock-names = "pclk", "oscclk";
610 power-domains = <&cpg>;
615 compatible = "renesas,r9a09g057-wdt";
618 clock-names = "pclk", "oscclk";
620 power-domains = <&cpg>;
625 compatible = "renesas,r9a09g057-rtca3", "renesas,rz-rtca3";
630 interrupt-names = "alarm", "period", "carry";
632 clock-names = "bus", "counter";
633 power-domains = <&cpg>;
635 reset-names = "rtc", "rtest";
640 compatible = "renesas,scif-r9a09g057";
651 interrupt-names = "eri", "rxi", "txi", "bri", "dri",
652 "tei", "tei-dri", "rxi-edge", "txi-edge";
654 clock-names = "fck";
655 power-domains = <&cpg>;
661 compatible = "renesas,r9a09g057-i3c", "renesas,r9a09g047-i3c";
664 clock-names = "pclk", "tclk", "pclkrw";
681 interrupt-names = "ierr", "terr", "abort", "resp",
686 reset-names = "presetn", "tresetn";
687 power-domains = <&cpg>;
688 #address-cells = <3>;
689 #size-cells = <0>;
694 compatible = "renesas,r9a09g057-rspi";
701 interrupt-names = "idle", "error", "end", "rx", "tx";
705 clock-names = "pclk", "pclk_sfr", "tclk";
707 reset-names = "presetn", "tresetn";
708 power-domains = <&cpg>;
709 #address-cells = <1>;
710 #size-cells = <0>;
715 compatible = "renesas,r9a09g057-rspi";
722 interrupt-names = "idle", "error", "end", "rx", "tx";
726 clock-names = "pclk", "pclk_sfr", "tclk";
728 reset-names = "presetn", "tresetn";
729 power-domains = <&cpg>;
730 #address-cells = <1>;
731 #size-cells = <0>;
736 compatible = "renesas,r9a09g057-rspi";
743 interrupt-names = "idle", "error", "end", "rx", "tx";
747 clock-names = "pclk", "pclk_sfr", "tclk";
749 reset-names = "presetn", "tresetn";
750 power-domains = <&cpg>;
751 #address-cells = <1>;
752 #size-cells = <0>;
757 compatible = "renesas,riic-r9a09g057";
767 interrupt-names = "tei", "ri", "ti", "spi", "sti",
771 power-domains = <&cpg>;
772 #address-cells = <1>;
773 #size-cells = <0>;
778 compatible = "renesas,riic-r9a09g057";
788 interrupt-names = "tei", "ri", "ti", "spi", "sti",
792 power-domains = <&cpg>;
793 #address-cells = <1>;
794 #size-cells = <0>;
799 compatible = "renesas,riic-r9a09g057";
809 interrupt-names = "tei", "ri", "ti", "spi", "sti",
813 power-domains = <&cpg>;
814 #address-cells = <1>;
815 #size-cells = <0>;
820 compatible = "renesas,riic-r9a09g057";
830 interrupt-names = "tei", "ri", "ti", "spi", "sti",
834 power-domains = <&cpg>;
835 #address-cells = <1>;
836 #size-cells = <0>;
841 compatible = "renesas,riic-r9a09g057";
851 interrupt-names = "tei", "ri", "ti", "spi", "sti",
855 power-domains = <&cpg>;
856 #address-cells = <1>;
857 #size-cells = <0>;
862 compatible = "renesas,riic-r9a09g057";
872 interrupt-names = "tei", "ri", "ti", "spi", "sti",
876 power-domains = <&cpg>;
877 #address-cells = <1>;
878 #size-cells = <0>;
883 compatible = "renesas,riic-r9a09g057";
893 interrupt-names = "tei", "ri", "ti", "spi", "sti",
897 power-domains = <&cpg>;
898 #address-cells = <1>;
899 #size-cells = <0>;
904 compatible = "renesas,riic-r9a09g057";
914 interrupt-names = "tei", "ri", "ti", "spi", "sti",
918 power-domains = <&cpg>;
919 #address-cells = <1>;
920 #size-cells = <0>;
925 compatible = "renesas,riic-r9a09g057";
935 interrupt-names = "tei", "ri", "ti", "spi", "sti",
939 power-domains = <&cpg>;
940 #address-cells = <1>;
941 #size-cells = <0>;
946 compatible = "renesas,r9a09g057-mali",
947 "arm,mali-bifrost";
953 interrupt-names = "job", "mmu", "gpu", "event";
957 clock-names = "gpu", "bus", "bus_ace";
958 power-domains = <&cpg>;
962 reset-names = "rst", "axi_rst", "ace_rst";
963 operating-points-v2 = <&gpu_opp_table>;
967 gic: interrupt-controller@14900000 {
968 compatible = "arm,gic-v3";
971 #interrupt-cells = <3>;
972 #address-cells = <0>;
973 interrupt-controller;
978 compatible = "generic-ohci";
984 phy-names = "usb";
985 power-domains = <&cpg>;
990 compatible = "generic-ohci";
996 phy-names = "usb";
997 power-domains = <&cpg>;
1002 compatible = "generic-ehci";
1008 phy-names = "usb";
1010 power-domains = <&cpg>;
1015 compatible = "generic-ehci";
1021 phy-names = "usb";
1023 power-domains = <&cpg>;
1027 usb2_phy0: usb-phy@15800200 {
1028 compatible = "renesas,usb2-phy-r9a09g057";
1033 clock-names = "fck", "usb_x1";
1035 #phy-cells = <1>;
1036 power-domains = <&cpg>;
1040 usb2_phy1: usb-phy@15810200 {
1041 compatible = "renesas,usb2-phy-r9a09g057";
1046 clock-names = "fck", "usb_x1";
1048 #phy-cells = <1>;
1049 power-domains = <&cpg>;
1054 compatible = "renesas,usbhs-r9a09g057",
1055 "renesas,rzg2l-usbhs";
1065 phy-names = "usb";
1066 power-domains = <&cpg>;
1070 usb20phyrst: usb20phy-reset@15830000 {
1071 compatible = "renesas,r9a09g057-usb2phy-reset";
1075 power-domains = <&cpg>;
1076 #reset-cells = <0>;
1080 usb21phyrst: usb21phy-reset@15840000 {
1081 compatible = "renesas,r9a09g057-usb2phy-reset";
1085 power-domains = <&cpg>;
1086 #reset-cells = <0>;
1091 compatible = "renesas,sdhi-r9a09g057";
1097 clock-names = "core", "clkh", "cd", "aclk";
1099 power-domains = <&cpg>;
1102 sdhi0_vqmmc: vqmmc-regulator {
1103 regulator-name = "SDHI0-VQMMC";
1104 regulator-min-microvolt = <1800000>;
1105 regulator-max-microvolt = <3300000>;
1111 compatible = "renesas,sdhi-r9a09g057";
1117 clock-names = "core", "clkh", "cd", "aclk";
1119 power-domains = <&cpg>;
1122 sdhi1_vqmmc: vqmmc-regulator {
1123 regulator-name = "SDHI1-VQMMC";
1124 regulator-min-microvolt = <1800000>;
1125 regulator-max-microvolt = <3300000>;
1131 compatible = "renesas,sdhi-r9a09g057";
1137 clock-names = "core", "clkh", "cd", "aclk";
1139 power-domains = <&cpg>;
1142 sdhi2_vqmmc: vqmmc-regulator {
1143 regulator-name = "SDHI2-VQMMC";
1144 regulator-min-microvolt = <1800000>;
1145 regulator-max-microvolt = <3300000>;
1151 compatible = "renesas,r9a09g057-gbeth", "renesas,rzv2h-gbeth",
1152 "snps,dwmac-5.20";
1165 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
1166 "rx-queue-0", "rx-queue-1", "rx-queue-2",
1167 "rx-queue-3", "tx-queue-0", "tx-queue-1",
1168 "tx-queue-2", "tx-queue-3";
1173 clock-names = "stmmaceth", "pclk", "ptp_ref",
1174 "tx", "rx", "tx-180", "rx-180";
1176 power-domains = <&cpg>;
1177 snps,multicast-filter-bins = <256>;
1178 snps,perfect-filter-entries = <128>;
1179 rx-fifo-depth = <8192>;
1180 tx-fifo-depth = <8192>;
1181 snps,fixed-burst;
1182 snps,no-pbl-x8;
1184 snps,axi-config = <&stmmac_axi_setup>;
1185 snps,mtl-rx-config = <&mtl_rx_setup0>;
1186 snps,mtl-tx-config = <&mtl_tx_setup0>;
1192 compatible = "snps,dwmac-mdio";
1193 #address-cells = <1>;
1194 #size-cells = <0>;
1197 mtl_rx_setup0: rx-queues-config {
1198 snps,rx-queues-to-use = <4>;
1199 snps,rx-sched-sp;
1202 snps,dcb-algorithm;
1204 snps,map-to-dma-channel = <0>;
1208 snps,dcb-algorithm;
1210 snps,map-to-dma-channel = <1>;
1214 snps,dcb-algorithm;
1216 snps,map-to-dma-channel = <2>;
1220 snps,dcb-algorithm;
1222 snps,map-to-dma-channel = <3>;
1226 mtl_tx_setup0: tx-queues-config {
1227 snps,tx-queues-to-use = <4>;
1230 snps,dcb-algorithm;
1235 snps,dcb-algorithm;
1240 snps,dcb-algorithm;
1245 snps,dcb-algorithm;
1252 compatible = "renesas,r9a09g057-gbeth", "renesas,rzv2h-gbeth",
1253 "snps,dwmac-5.20";
1266 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
1267 "rx-queue-0", "rx-queue-1", "rx-queue-2",
1268 "rx-queue-3", "tx-queue-0", "tx-queue-1",
1269 "tx-queue-2", "tx-queue-3";
1274 clock-names = "stmmaceth", "pclk", "ptp_ref",
1275 "tx", "rx", "tx-180", "rx-180";
1277 power-domains = <&cpg>;
1278 snps,multicast-filter-bins = <256>;
1279 snps,perfect-filter-entries = <128>;
1280 rx-fifo-depth = <8192>;
1281 tx-fifo-depth = <8192>;
1282 snps,fixed-burst;
1283 snps,no-pbl-x8;
1285 snps,axi-config = <&stmmac_axi_setup>;
1286 snps,mtl-rx-config = <&mtl_rx_setup1>;
1287 snps,mtl-tx-config = <&mtl_tx_setup1>;
1293 compatible = "snps,dwmac-mdio";
1294 #address-cells = <1>;
1295 #size-cells = <0>;
1298 mtl_rx_setup1: rx-queues-config {
1299 snps,rx-queues-to-use = <4>;
1300 snps,rx-sched-sp;
1303 snps,dcb-algorithm;
1305 snps,map-to-dma-channel = <0>;
1309 snps,dcb-algorithm;
1311 snps,map-to-dma-channel = <1>;
1315 snps,dcb-algorithm;
1317 snps,map-to-dma-channel = <2>;
1321 snps,dcb-algorithm;
1323 snps,map-to-dma-channel = <3>;
1327 mtl_tx_setup1: tx-queues-config {
1328 snps,tx-queues-to-use = <4>;
1331 snps,dcb-algorithm;
1336 snps,dcb-algorithm;
1341 snps,dcb-algorithm;
1346 snps,dcb-algorithm;
1353 stmmac_axi_setup: stmmac-axi-config {
1360 thermal-zones {
1361 sensor1_thermal: sensor1-thermal {
1362 polling-delay = <1000>;
1363 polling-delay-passive = <250>;
1364 thermal-sensors = <&tsu0>;
1367 sensor1_crit: sensor1-crit {
1375 sensor2_thermal: sensor2-thermal {
1376 polling-delay = <1000>;
1377 polling-delay-passive = <250>;
1378 thermal-sensors = <&tsu1>;
1380 cooling-maps {
1383 cooling-device = <&cpu0 0 3>, <&cpu1 0 3>,
1390 sensor2_target: trip-point {
1396 sensor2_crit: sensor2-crit {
1406 compatible = "arm,armv8-timer";
1412 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";