Lines Matching +full:dcb +full:- +full:algorithm
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
17 audio_extal_clk: audio-clk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
21 clock-frequency = <0>;
31 cluster0_opp: opp-table-0 {
32 compatible = "operating-points-v2";
34 opp-1700000000 {
35 opp-hz = /bits/ 64 <1700000000>;
36 opp-microvolt = <900000>;
37 clock-latency-ns = <300000>;
39 opp-850000000 {
40 opp-hz = /bits/ 64 <850000000>;
41 opp-microvolt = <800000>;
42 clock-latency-ns = <300000>;
44 opp-425000000 {
45 opp-hz = /bits/ 64 <425000000>;
46 opp-microvolt = <800000>;
47 clock-latency-ns = <300000>;
49 opp-212500000 {
50 opp-hz = /bits/ 64 <212500000>;
51 opp-microvolt = <800000>;
52 clock-latency-ns = <300000>;
53 opp-suspend;
58 #address-cells = <1>;
59 #size-cells = <0>;
62 compatible = "arm,cortex-a55";
65 next-level-cache = <&L3_CA55>;
66 enable-method = "psci";
68 #cooling-cells = <2>;
69 operating-points-v2 = <&cluster0_opp>;
73 compatible = "arm,cortex-a55";
76 next-level-cache = <&L3_CA55>;
77 enable-method = "psci";
79 #cooling-cells = <2>;
80 operating-points-v2 = <&cluster0_opp>;
84 compatible = "arm,cortex-a55";
87 next-level-cache = <&L3_CA55>;
88 enable-method = "psci";
90 #cooling-cells = <2>;
91 operating-points-v2 = <&cluster0_opp>;
95 compatible = "arm,cortex-a55";
98 next-level-cache = <&L3_CA55>;
99 enable-method = "psci";
101 #cooling-cells = <2>;
102 operating-points-v2 = <&cluster0_opp>;
105 L3_CA55: cache-controller-0 {
107 cache-unified;
108 cache-size = <0x100000>;
109 cache-level = <3>;
113 gpu_opp_table: opp-table-1 {
114 compatible = "operating-points-v2";
116 opp-630000000 {
117 opp-hz = /bits/ 64 <630000000>;
118 opp-microvolt = <800000>;
121 opp-315000000 {
122 opp-hz = /bits/ 64 <315000000>;
123 opp-microvolt = <800000>;
126 opp-157500000 {
127 opp-hz = /bits/ 64 <157500000>;
128 opp-microvolt = <800000>;
131 opp-78750000 {
132 opp-hz = /bits/ 64 <78750000>;
133 opp-microvolt = <800000>;
136 opp-19687500 {
137 opp-hz = /bits/ 64 <19687500>;
138 opp-microvolt = <800000>;
143 compatible = "arm,psci-1.0", "arm,psci-0.2";
147 qextal_clk: qextal-clk {
148 compatible = "fixed-clock";
149 #clock-cells = <0>;
151 clock-frequency = <0>;
154 rtxin_clk: rtxin-clk {
155 compatible = "fixed-clock";
156 #clock-cells = <0>;
158 clock-frequency = <0>;
162 compatible = "simple-bus";
163 #address-cells = <2>;
164 #size-cells = <2>;
167 icu: interrupt-controller@10400000 {
168 compatible = "renesas,r9a09g047-icu";
170 #interrupt-cells = <2>;
171 #address-cells = <0>;
172 interrupt-controller;
231 interrupt-names = "nmi",
246 "int-ca55-0", "int-ca55-1",
247 "int-ca55-2", "int-ca55-3",
248 "icu-error-ca55",
249 "gpt-u0-gtciada", "gpt-u0-gtciadb",
250 "gpt-u1-gtciada", "gpt-u1-gtciadb";
252 power-domains = <&cpg>;
257 compatible = "renesas,r9a09g047-pinctrl";
260 gpio-controller;
261 #gpio-cells = <2>;
262 gpio-ranges = <&pinctrl 0 0 232>;
263 #interrupt-cells = <2>;
264 interrupt-controller;
265 interrupt-parent = <&icu>;
266 power-domains = <&cpg>;
270 cpg: clock-controller@10420000 {
271 compatible = "renesas,r9a09g047-cpg";
274 clock-names = "audio_extal", "rtxin", "qextal";
275 #clock-cells = <2>;
276 #reset-cells = <1>;
277 #power-domain-cells = <0>;
280 sys: system-controller@10430000 {
281 compatible = "renesas,r9a09g047-sys";
288 compatible = "renesas,r9a09g047-xspi";
291 reg-names = "regs", "dirmap";
294 interrupt-names = "pulse", "err_pulse";
299 clock-names = "ahb", "axi", "spi", "spix2";
301 reset-names = "hresetn", "aresetn";
302 power-domains = <&cpg>;
303 #address-cells = <1>;
304 #size-cells = <0>;
308 dmac0: dma-controller@11400000 {
309 compatible = "renesas,r9a09g047-dmac",
310 "renesas,r9a09g057-dmac";
329 interrupt-names = "error",
335 power-domains = <&cpg>;
337 #dma-cells = <1>;
338 dma-channels = <16>;
342 dmac1: dma-controller@14830000 {
343 compatible = "renesas,r9a09g047-dmac",
344 "renesas,r9a09g057-dmac";
363 interrupt-names = "error",
369 power-domains = <&cpg>;
371 #dma-cells = <1>;
372 dma-channels = <16>;
376 dmac2: dma-controller@14840000 {
377 compatible = "renesas,r9a09g047-dmac",
378 "renesas,r9a09g057-dmac";
397 interrupt-names = "error",
403 power-domains = <&cpg>;
405 #dma-cells = <1>;
406 dma-channels = <16>;
410 dmac3: dma-controller@12000000 {
411 compatible = "renesas,r9a09g047-dmac",
412 "renesas,r9a09g057-dmac";
431 interrupt-names = "error",
437 power-domains = <&cpg>;
439 #dma-cells = <1>;
440 dma-channels = <16>;
444 dmac4: dma-controller@12010000 {
445 compatible = "renesas,r9a09g047-dmac",
446 "renesas,r9a09g057-dmac";
465 interrupt-names = "error",
471 power-domains = <&cpg>;
473 #dma-cells = <1>;
474 dma-channels = <16>;
479 compatible = "renesas,scif-r9a09g047", "renesas,scif-r9a09g057";
490 interrupt-names = "eri", "rxi", "txi", "bri", "dri",
491 "tei", "tei-dri", "rxi-edge", "txi-edge";
493 clock-names = "fck";
494 power-domains = <&cpg>;
500 compatible = "renesas,r9a09g047-i3c";
505 clock-names = "pclk", "tclk", "pclkrw";
522 interrupt-names = "ierr", "terr", "abort", "resp",
527 reset-names = "presetn", "tresetn";
528 power-domains = <&cpg>;
529 #address-cells = <3>;
530 #size-cells = <0>;
535 compatible = "renesas,r9a09g047-canfd";
557 interrupt-names = "g_err", "g_recc",
566 clock-names = "fck", "ram_clk", "can_clk";
567 assigned-clocks = <&cpg CPG_MOD 0x9e>;
568 assigned-clock-rates = <80000000>;
570 reset-names = "rstp_n", "rstc_n";
571 power-domains = <&cpg>;
595 compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt";
598 clock-names = "pclk", "oscclk";
600 power-domains = <&cpg>;
605 compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt";
608 clock-names = "pclk", "oscclk";
610 power-domains = <&cpg>;
615 compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt";
618 clock-names = "pclk", "oscclk";
620 power-domains = <&cpg>;
625 compatible = "renesas,r9a09g047-tsu";
629 interrupt-names = "adi", "adcmpi";
632 power-domains = <&cpg>;
633 #thermal-sensor-cells = <0>;
634 renesas,tsu-trim = <&sys 0x330>;
638 compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
648 interrupt-names = "tei", "ri", "ti", "spi", "sti",
652 power-domains = <&cpg>;
653 #address-cells = <1>;
654 #size-cells = <0>;
659 compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
669 interrupt-names = "tei", "ri", "ti", "spi", "sti",
673 power-domains = <&cpg>;
674 #address-cells = <1>;
675 #size-cells = <0>;
680 compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
690 interrupt-names = "tei", "ri", "ti", "spi", "sti",
694 power-domains = <&cpg>;
695 #address-cells = <1>;
696 #size-cells = <0>;
701 compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
711 interrupt-names = "tei", "ri", "ti", "spi", "sti",
715 power-domains = <&cpg>;
716 #address-cells = <1>;
717 #size-cells = <0>;
722 compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
732 interrupt-names = "tei", "ri", "ti", "spi", "sti",
736 power-domains = <&cpg>;
737 #address-cells = <1>;
738 #size-cells = <0>;
743 compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
753 interrupt-names = "tei", "ri", "ti", "spi", "sti",
757 power-domains = <&cpg>;
758 #address-cells = <1>;
759 #size-cells = <0>;
764 compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
774 interrupt-names = "tei", "ri", "ti", "spi", "sti",
778 power-domains = <&cpg>;
779 #address-cells = <1>;
780 #size-cells = <0>;
785 compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
795 interrupt-names = "tei", "ri", "ti", "spi", "sti",
799 power-domains = <&cpg>;
800 #address-cells = <1>;
801 #size-cells = <0>;
806 compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";
816 interrupt-names = "tei", "ri", "ti", "spi", "sti",
820 power-domains = <&cpg>;
821 #address-cells = <1>;
822 #size-cells = <0>;
827 compatible = "renesas,r9a09g047-mali",
828 "arm,mali-bifrost";
834 interrupt-names = "job", "mmu", "gpu", "event";
838 clock-names = "gpu", "bus", "bus_ace";
839 power-domains = <&cpg>;
841 reset-names = "rst", "axi_rst", "ace_rst";
842 operating-points-v2 = <&gpu_opp_table>;
846 gic: interrupt-controller@14900000 {
847 compatible = "arm,gic-v3";
850 #interrupt-cells = <3>;
851 #address-cells = <0>;
852 interrupt-controller;
857 compatible = "renesas,sdhi-r9a09g047", "renesas,sdhi-r9a09g057";
863 clock-names = "core", "clkh", "cd", "aclk";
865 power-domains = <&cpg>;
868 sdhi0_vqmmc: vqmmc-regulator {
869 regulator-name = "SDHI0-VQMMC";
870 regulator-min-microvolt = <1800000>;
871 regulator-max-microvolt = <3300000>;
877 compatible = "renesas,sdhi-r9a09g047", "renesas,sdhi-r9a09g057";
883 clock-names = "core", "clkh", "cd", "aclk";
885 power-domains = <&cpg>;
888 sdhi1_vqmmc: vqmmc-regulator {
889 regulator-name = "SDHI1-VQMMC";
890 regulator-min-microvolt = <1800000>;
891 regulator-max-microvolt = <3300000>;
897 compatible = "renesas,sdhi-r9a09g047", "renesas,sdhi-r9a09g057";
903 clock-names = "core", "clkh", "cd", "aclk";
905 power-domains = <&cpg>;
908 sdhi2_vqmmc: vqmmc-regulator {
909 regulator-name = "SDHI2-VQMMC";
910 regulator-min-microvolt = <1800000>;
911 regulator-max-microvolt = <3300000>;
917 compatible = "renesas,r9a09g047-gbeth", "renesas,rzv2h-gbeth",
918 "snps,dwmac-5.20";
924 clock-names = "stmmaceth", "pclk", "ptp_ref",
925 "tx", "rx", "tx-180", "rx-180";
937 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
938 "rx-queue-0", "rx-queue-1", "rx-queue-2",
939 "rx-queue-3", "tx-queue-0", "tx-queue-1",
940 "tx-queue-2", "tx-queue-3";
942 power-domains = <&cpg>;
943 snps,multicast-filter-bins = <256>;
944 snps,perfect-filter-entries = <128>;
945 rx-fifo-depth = <8192>;
946 tx-fifo-depth = <8192>;
947 snps,mixed-burst;
949 snps,axi-config = <&stmmac_axi_setup>;
950 snps,mtl-rx-config = <&mtl_rx_setup0>;
951 snps,mtl-tx-config = <&mtl_tx_setup0>;
957 compatible = "snps,dwmac-mdio";
958 #address-cells = <1>;
959 #size-cells = <0>;
962 mtl_rx_setup0: rx-queues-config {
963 snps,rx-queues-to-use = <4>;
964 snps,rx-sched-sp;
967 snps,dcb-algorithm;
969 snps,map-to-dma-channel = <0>;
973 snps,dcb-algorithm;
975 snps,map-to-dma-channel = <1>;
979 snps,dcb-algorithm;
981 snps,map-to-dma-channel = <2>;
985 snps,dcb-algorithm;
987 snps,map-to-dma-channel = <3>;
991 mtl_tx_setup0: tx-queues-config {
992 snps,tx-queues-to-use = <4>;
995 snps,dcb-algorithm;
1000 snps,dcb-algorithm;
1005 snps,dcb-algorithm;
1010 snps,dcb-algorithm;
1017 compatible = "renesas,r9a09g047-gbeth", "renesas,rzv2h-gbeth",
1018 "snps,dwmac-5.20";
1024 clock-names = "stmmaceth", "pclk", "ptp_ref",
1025 "tx", "rx", "tx-180", "rx-180";
1037 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
1038 "rx-queue-0", "rx-queue-1", "rx-queue-2",
1039 "rx-queue-3", "tx-queue-0", "tx-queue-1",
1040 "tx-queue-2", "tx-queue-3";
1042 power-domains = <&cpg>;
1043 snps,multicast-filter-bins = <256>;
1044 snps,perfect-filter-entries = <128>;
1045 rx-fifo-depth = <8192>;
1046 tx-fifo-depth = <8192>;
1047 snps,mixed-burst;
1049 snps,axi-config = <&stmmac_axi_setup>;
1050 snps,mtl-rx-config = <&mtl_rx_setup1>;
1051 snps,mtl-tx-config = <&mtl_tx_setup1>;
1057 compatible = "snps,dwmac-mdio";
1058 #address-cells = <1>;
1059 #size-cells = <0>;
1062 mtl_rx_setup1: rx-queues-config {
1063 snps,rx-queues-to-use = <4>;
1064 snps,rx-sched-sp;
1067 snps,dcb-algorithm;
1069 snps,map-to-dma-channel = <0>;
1073 snps,dcb-algorithm;
1075 snps,map-to-dma-channel = <1>;
1079 snps,dcb-algorithm;
1081 snps,map-to-dma-channel = <2>;
1085 snps,dcb-algorithm;
1087 snps,map-to-dma-channel = <3>;
1091 mtl_tx_setup1: tx-queues-config {
1092 snps,tx-queues-to-use = <4>;
1095 snps,dcb-algorithm;
1100 snps,dcb-algorithm;
1105 snps,dcb-algorithm;
1110 snps,dcb-algorithm;
1117 compatible = "renesas,r9a09g047-cru";
1122 clock-names = "video", "apb", "axi";
1128 interrupt-names = "image_conv", "axi_mst_err",
1132 reset-names = "presetn", "aresetn";
1133 power-domains = <&cpg>;
1137 #address-cells = <1>;
1138 #size-cells = <0>;
1141 #address-cells = <1>;
1142 #size-cells = <0>;
1147 remote-endpoint = <&csi2cru>;
1154 compatible = "renesas,r9a09g047-csi2", "renesas,r9a09g057-csi2";
1158 clock-names = "video", "apb";
1160 reset-names = "presetn", "cmn-rstb";
1161 power-domains = <&cpg>;
1165 #address-cells = <1>;
1166 #size-cells = <0>;
1173 #address-cells = <1>;
1174 #size-cells = <0>;
1179 remote-endpoint = <&crucsi2>;
1186 stmmac_axi_setup: stmmac-axi-config {
1193 thermal-zones {
1194 cpu-thermal {
1195 polling-delay = <1000>;
1196 polling-delay-passive = <250>;
1197 thermal-sensors = <&tsu>;
1199 cooling-maps {
1202 cooling-device = <&cpu0 0 3>, <&cpu1 0 3>,
1209 target: trip-point {
1215 sensor_crit: sensor-crit {
1225 compatible = "arm,armv8-timer";
1231 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";