Lines Matching +full:simple +full:- +full:mfd

1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
5  * Copyright (c) 2016-2019 Andreas Färber
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/realtek,rtd1295.h>
16 	interrupt-parent = <&gic>;
17 	#address-cells = <1>;
18 	#size-cells = <1>;
20 	reserved-memory {
21 		#address-cells = <1>;
22 		#size-cells = <1>;
35 			no-map;
39 	arm_pmu: arm-pmu {
40 		compatible = "arm,cortex-a53-pmu";
45 		compatible = "fixed-clock";
46 		clock-frequency = <27000000>;
47 		#clock-cells = <0>;
48 		clock-output-names = "osc27M";
52 		compatible = "simple-bus";
53 		#address-cells = <1>;
54 		#size-cells = <1>;
60 			compatible = "simple-bus";
62 			#address-cells = <1>;
63 			#size-cells = <1>;
67 				compatible = "syscon", "simple-mfd";
69 				reg-io-width = <4>;
70 				#address-cells = <1>;
71 				#size-cells = <1>;
76 				compatible = "syscon", "simple-mfd";
78 				reg-io-width = <4>;
79 				#address-cells = <1>;
80 				#size-cells = <1>;
85 				compatible = "syscon", "simple-mfd";
87 				reg-io-width = <4>;
88 				#address-cells = <1>;
89 				#size-cells = <1>;
94 				compatible = "syscon", "simple-mfd";
96 				reg-io-width = <4>;
97 				#address-cells = <1>;
98 				#size-cells = <1>;
103 				compatible = "syscon", "simple-mfd";
105 				reg-io-width = <4>;
106 				#address-cells = <1>;
107 				#size-cells = <1>;
112 		gic: interrupt-controller@ff011000 {
113 			compatible = "arm,gic-400";
119 			interrupt-controller;
120 			#interrupt-cells = <3>;
126 	reset1: reset-controller@0 {
127 		compatible = "snps,dw-low-reset";
129 		#reset-cells = <1>;
132 	reset2: reset-controller@4 {
133 		compatible = "snps,dw-low-reset";
135 		#reset-cells = <1>;
138 	reset3: reset-controller@8 {
139 		compatible = "snps,dw-low-reset";
141 		#reset-cells = <1>;
144 	reset4: reset-controller@50 {
145 		compatible = "snps,dw-low-reset";
147 		#reset-cells = <1>;
152 	iso_reset: reset-controller@88 {
153 		compatible = "snps,dw-low-reset";
155 		#reset-cells = <1>;
159 		compatible = "realtek,rtd1295-watchdog";
165 		compatible = "snps,dw-apb-uart";
167 		reg-shift = <2>;
168 		reg-io-width = <4>;
169 		clock-frequency = <27000000>;
177 		compatible = "snps,dw-apb-uart";
179 		reg-shift = <2>;
180 		reg-io-width = <4>;
181 		clock-frequency = <432000000>;
187 		compatible = "snps,dw-apb-uart";
189 		reg-shift = <2>;
190 		reg-io-width = <4>;
191 		clock-frequency = <432000000>;