Lines Matching +full:assigned +full:- +full:clocks
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
48 #address-cells = <1>;
49 #size-cells = <0>;
51 idle-states {
52 entry-method = "psci";
54 cpu_pd_wait: cpu-pd-wait {
55 compatible = "arm,idle-state";
56 arm,psci-suspend-param = <0x0010033>;
57 local-timer-stop;
58 entry-latency-us = <10000>;
59 exit-latency-us = <7000>;
60 min-residency-us = <27000>;
61 wakeup-latency-us = <15000>;
67 compatible = "arm,cortex-a55";
69 enable-method = "psci";
70 #cooling-cells = <2>;
71 cpu-idle-states = <&cpu_pd_wait>;
72 i-cache-size = <32768>;
73 i-cache-line-size = <64>;
74 i-cache-sets = <128>;
75 d-cache-size = <32768>;
76 d-cache-line-size = <64>;
77 d-cache-sets = <128>;
78 next-level-cache = <&l2_cache_l0>;
83 compatible = "arm,cortex-a55";
85 enable-method = "psci";
86 #cooling-cells = <2>;
87 cpu-idle-states = <&cpu_pd_wait>;
88 i-cache-size = <32768>;
89 i-cache-line-size = <64>;
90 i-cache-sets = <128>;
91 d-cache-size = <32768>;
92 d-cache-line-size = <64>;
93 d-cache-sets = <128>;
94 next-level-cache = <&l2_cache_l1>;
97 l2_cache_l0: l2-cache-l0 {
99 cache-size = <65536>;
100 cache-line-size = <64>;
101 cache-sets = <256>;
102 cache-level = <2>;
103 cache-unified;
104 next-level-cache = <&l3_cache>;
107 l2_cache_l1: l2-cache-l1 {
109 cache-size = <65536>;
110 cache-line-size = <64>;
111 cache-sets = <256>;
112 cache-level = <2>;
113 cache-unified;
114 next-level-cache = <&l3_cache>;
117 l3_cache: l3-cache {
119 cache-size = <262144>;
120 cache-line-size = <64>;
121 cache-sets = <256>;
122 cache-level = <3>;
123 cache-unified;
127 osc_32k: clock-osc-32k {
128 compatible = "fixed-clock";
129 #clock-cells = <0>;
130 clock-frequency = <32768>;
131 clock-output-names = "osc_32k";
134 osc_24m: clock-osc-24m {
135 compatible = "fixed-clock";
136 #clock-cells = <0>;
137 clock-frequency = <24000000>;
138 clock-output-names = "osc_24m";
141 clk_ext1: clock-ext1 {
142 compatible = "fixed-clock";
143 #clock-cells = <0>;
144 clock-frequency = <133000000>;
145 clock-output-names = "clk_ext1";
149 compatible = "arm,cortex-a55-pmu";
154 compatible = "arm,psci-1.0";
159 compatible = "arm,armv8-timer";
164 clock-frequency = <24000000>;
165 arm,no-tick-in-suspend;
166 interrupt-parent = <&gic>;
169 gic: interrupt-controller@48000000 {
170 compatible = "arm,gic-v3";
173 #interrupt-cells = <3>;
174 interrupt-controller;
176 interrupt-parent = <&gic>;
179 thermal-zones {
180 cpu-thermal {
181 polling-delay-passive = <250>;
182 polling-delay = <2000>;
184 thermal-sensors = <&tmu 0>;
187 cpu_alert: cpu-alert {
193 cpu_crit: cpu-crit {
200 cooling-maps {
203 cooling-device =
211 cm33: remoteproc-cm33 {
212 compatible = "fsl,imx93-cm33";
213 clocks = <&clk IMX93_CLK_CM33_GATE>;
218 compatible = "fsl,imx93-mqs";
224 compatible = "fsl,imx93-mqs";
230 compatible = "usb-nop-xceiv";
231 #phy-cells = <0>;
232 clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
233 clock-names = "main_clk";
237 compatible = "usb-nop-xceiv";
238 #phy-cells = <0>;
239 clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
240 clock-names = "main_clk";
244 compatible = "simple-bus";
245 #address-cells = <1>;
246 #size-cells = <1>;
251 compatible = "fsl,aips-bus", "simple-bus";
253 #address-cells = <1>;
254 #size-cells = <1>;
257 edma1: dma-controller@44000000 {
258 compatible = "fsl,imx93-edma3";
260 #dma-cells = <3>;
261 dma-channels = <31>;
293 clocks = <&clk IMX93_CLK_EDMA1_GATE>;
294 clock-names = "dma";
298 compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
303 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
306 clocks = <&clk IMX93_CLK_MU1_B_GATE>;
307 #mbox-cells = <2>;
312 compatible = "nxp,sysctr-timer";
315 clocks = <&osc_24m>;
316 clock-names = "per";
317 nxp,no-divider;
321 compatible = "fsl,imx93-wdt";
324 clocks = <&clk IMX93_CLK_WDOG1_GATE>;
325 timeout-sec = <40>;
330 compatible = "fsl,imx93-wdt";
333 clocks = <&clk IMX93_CLK_WDOG2_GATE>;
334 timeout-sec = <40>;
339 compatible = "fsl,imx7ulp-pwm";
341 clocks = <&clk IMX93_CLK_TPM1_GATE>;
342 #pwm-cells = <3>;
347 compatible = "fsl,imx7ulp-pwm";
349 clocks = <&clk IMX93_CLK_TPM2_GATE>;
350 #pwm-cells = <3>;
355 compatible = "silvaco,i3c-master-v1";
358 #address-cells = <3>;
359 #size-cells = <0>;
360 clocks = <&clk IMX93_CLK_BUS_AON>,
363 clock-names = "pclk", "fast_clk", "slow_clk";
368 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
370 #address-cells = <1>;
371 #size-cells = <0>;
373 clocks = <&clk IMX93_CLK_LPI2C1_GATE>,
375 clock-names = "per", "ipg";
377 dma-names = "tx", "rx";
382 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
384 #address-cells = <1>;
385 #size-cells = <0>;
387 clocks = <&clk IMX93_CLK_LPI2C2_GATE>,
389 clock-names = "per", "ipg";
391 dma-names = "tx", "rx";
396 #address-cells = <1>;
397 #size-cells = <0>;
398 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
401 clocks = <&clk IMX93_CLK_LPSPI1_GATE>,
403 clock-names = "per", "ipg";
405 dma-names = "tx", "rx";
410 #address-cells = <1>;
411 #size-cells = <0>;
412 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
415 clocks = <&clk IMX93_CLK_LPSPI2_GATE>,
417 clock-names = "per", "ipg";
419 dma-names = "tx", "rx";
424 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
427 clocks = <&clk IMX93_CLK_LPUART1_GATE>;
428 clock-names = "ipg";
430 dma-names = "rx", "tx";
435 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
438 clocks = <&clk IMX93_CLK_LPUART2_GATE>;
439 clock-names = "ipg";
441 dma-names = "rx", "tx";
446 compatible = "fsl,imx93-flexcan";
449 clocks = <&clk IMX93_CLK_BUS_AON>,
451 clock-names = "ipg", "per";
452 assigned-clocks = <&clk IMX93_CLK_CAN1>;
453 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
454 assigned-clock-rates = <40000000>;
455 fsl,clk-source = /bits/ 8 <0>;
456 fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>;
461 compatible = "fsl,imx93-sai";
464 clocks = <&clk IMX93_CLK_SAI1_IPG>, <&clk IMX93_CLK_DUMMY>,
467 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
469 dma-names = "rx", "tx";
470 #sound-dai-cells = <0>;
475 compatible = "fsl,imx93-iomuxc";
481 compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";
485 compatible = "nxp,imx93-bbnsm-rtc";
490 compatible = "nxp,imx93-bbnsm-pwrkey";
496 clk: clock-controller@44450000 {
497 compatible = "fsl,imx93-ccm";
499 #clock-cells = <1>;
500 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>;
501 clock-names = "osc_32k", "osc_24m", "clk_ext1";
502 assigned-clocks = <&clk IMX93_CLK_AUDIO_PLL>;
503 assigned-clock-rates = <393216000>;
507 src: system-controller@44460000 {
508 compatible = "fsl,imx93-src", "syscon";
510 #address-cells = <1>;
511 #size-cells = <1>;
514 mlmix: power-domain@44461800 {
515 compatible = "fsl,imx93-src-slice";
517 #power-domain-cells = <0>;
518 clocks = <&clk IMX93_CLK_ML_APB>,
522 mediamix: power-domain@44462400 {
523 compatible = "fsl,imx93-src-slice";
525 #power-domain-cells = <0>;
526 clocks = <&clk IMX93_CLK_NIC_MEDIA_GATE>,
531 clock-controller@44480000 {
532 compatible = "fsl,imx93-anatop";
534 #clock-cells = <1>;
538 compatible = "fsl,qoriq-tmu";
541 clocks = <&clk IMX93_CLK_TMC_GATE>;
542 little-endian;
543 fsl,tmu-range = <0x800000da 0x800000e9
547 fsl,tmu-calibration = <0x00000000 0x0000000e
554 #thermal-sensor-cells = <1>;
558 compatible = "fsl,imx93-micfil";
564 clocks = <&clk IMX93_CLK_PDM_IPG>,
567 clock-names = "ipg_clk", "ipg_clk_app", "pll8k";
569 dma-names = "rx";
570 #sound-dai-cells = <0>;
575 compatible = "nxp,imx93-adc";
580 clocks = <&clk IMX93_CLK_ADC1_GATE>;
581 clock-names = "ipg";
582 #io-channel-cells = <1>;
588 compatible = "fsl,aips-bus", "simple-bus";
590 #address-cells = <1>;
591 #size-cells = <1>;
594 edma2: dma-controller@42000000 {
595 compatible = "fsl,imx93-edma4";
597 #dma-cells = <3>;
598 dma-channels = <64>;
663 clocks = <&clk IMX93_CLK_EDMA2_GATE>;
664 clock-names = "dma";
668 compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";
673 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
676 clocks = <&clk IMX93_CLK_MU2_B_GATE>;
677 #mbox-cells = <2>;
682 compatible = "fsl,imx93-wdt";
685 clocks = <&clk IMX93_CLK_WDOG3_GATE>;
686 timeout-sec = <40>;
691 compatible = "fsl,imx93-wdt";
694 clocks = <&clk IMX93_CLK_WDOG4_GATE>;
695 timeout-sec = <40>;
700 compatible = "fsl,imx93-wdt";
703 clocks = <&clk IMX93_CLK_WDOG5_GATE>;
704 timeout-sec = <40>;
709 compatible = "fsl,imx7ulp-pwm";
711 clocks = <&clk IMX93_CLK_TPM3_GATE>;
712 #pwm-cells = <3>;
717 compatible = "fsl,imx7ulp-pwm";
719 clocks = <&clk IMX93_CLK_TPM4_GATE>;
720 #pwm-cells = <3>;
725 compatible = "fsl,imx7ulp-pwm";
727 clocks = <&clk IMX93_CLK_TPM5_GATE>;
728 #pwm-cells = <3>;
733 compatible = "fsl,imx7ulp-pwm";
735 clocks = <&clk IMX93_CLK_TPM6_GATE>;
736 #pwm-cells = <3>;
741 compatible = "silvaco,i3c-master-v1";
744 #address-cells = <3>;
745 #size-cells = <0>;
746 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
749 clock-names = "pclk", "fast_clk", "slow_clk";
754 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
756 #address-cells = <1>;
757 #size-cells = <0>;
759 clocks = <&clk IMX93_CLK_LPI2C3_GATE>,
761 clock-names = "per", "ipg";
763 dma-names = "tx", "rx";
768 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
770 #address-cells = <1>;
771 #size-cells = <0>;
773 clocks = <&clk IMX93_CLK_LPI2C4_GATE>,
775 clock-names = "per", "ipg";
777 dma-names = "tx", "rx";
782 #address-cells = <1>;
783 #size-cells = <0>;
784 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
787 clocks = <&clk IMX93_CLK_LPSPI3_GATE>,
789 clock-names = "per", "ipg";
791 dma-names = "tx", "rx";
796 #address-cells = <1>;
797 #size-cells = <0>;
798 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
801 clocks = <&clk IMX93_CLK_LPSPI4_GATE>,
803 clock-names = "per", "ipg";
805 dma-names = "tx", "rx";
810 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
813 clocks = <&clk IMX93_CLK_LPUART3_GATE>;
814 clock-names = "ipg";
816 dma-names = "rx", "tx";
821 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
824 clocks = <&clk IMX93_CLK_LPUART4_GATE>;
825 clock-names = "ipg";
827 dma-names = "rx", "tx";
832 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
835 clocks = <&clk IMX93_CLK_LPUART5_GATE>;
836 clock-names = "ipg";
838 dma-names = "rx", "tx";
843 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
846 clocks = <&clk IMX93_CLK_LPUART6_GATE>;
847 clock-names = "ipg";
849 dma-names = "rx", "tx";
854 compatible = "fsl,imx93-flexcan";
857 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
859 clock-names = "ipg", "per";
860 assigned-clocks = <&clk IMX93_CLK_CAN2>;
861 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
862 assigned-clock-rates = <40000000>;
863 fsl,clk-source = /bits/ 8 <0>;
864 fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>;
869 compatible = "nxp,imx8mm-fspi";
871 reg-names = "fspi_base", "fspi_mmap";
872 #address-cells = <1>;
873 #size-cells = <0>;
875 clocks = <&clk IMX93_CLK_FLEXSPI1_GATE>,
877 clock-names = "fspi_en", "fspi";
878 assigned-clocks = <&clk IMX93_CLK_FLEXSPI1>;
879 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
884 compatible = "fsl,imx93-sai";
887 clocks = <&clk IMX93_CLK_SAI2_IPG>, <&clk IMX93_CLK_DUMMY>,
890 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
892 dma-names = "rx", "tx";
893 #sound-dai-cells = <0>;
898 compatible = "fsl,imx93-sai";
901 clocks = <&clk IMX93_CLK_SAI3_IPG>, <&clk IMX93_CLK_DUMMY>,
904 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
906 dma-names = "rx", "tx";
907 #sound-dai-cells = <0>;
912 compatible = "fsl,imx93-xcvr";
917 reg-names = "ram", "regs", "rxfifo", "txfifo";
920 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
924 clock-names = "ipg", "phy", "spba", "pll_ipg";
926 dma-names = "rx", "tx";
927 #sound-dai-cells = <0>;
932 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
935 clocks = <&clk IMX93_CLK_LPUART7_GATE>;
936 clock-names = "ipg";
938 dma-names = "rx", "tx";
943 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
946 clocks = <&clk IMX93_CLK_LPUART8_GATE>;
947 clock-names = "ipg";
949 dma-names = "rx", "tx";
954 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
956 #address-cells = <1>;
957 #size-cells = <0>;
959 clocks = <&clk IMX93_CLK_LPI2C5_GATE>,
961 clock-names = "per", "ipg";
963 dma-names = "tx", "rx";
968 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
970 #address-cells = <1>;
971 #size-cells = <0>;
973 clocks = <&clk IMX93_CLK_LPI2C6_GATE>,
975 clock-names = "per", "ipg";
977 dma-names = "tx", "rx";
982 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
984 #address-cells = <1>;
985 #size-cells = <0>;
987 clocks = <&clk IMX93_CLK_LPI2C7_GATE>,
989 clock-names = "per", "ipg";
991 dma-names = "tx", "rx";
996 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
998 #address-cells = <1>;
999 #size-cells = <0>;
1001 clocks = <&clk IMX93_CLK_LPI2C8_GATE>,
1003 clock-names = "per", "ipg";
1005 dma-names = "tx", "rx";
1010 #address-cells = <1>;
1011 #size-cells = <0>;
1012 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1015 clocks = <&clk IMX93_CLK_LPSPI5_GATE>,
1017 clock-names = "per", "ipg";
1019 dma-names = "tx", "rx";
1024 #address-cells = <1>;
1025 #size-cells = <0>;
1026 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1029 clocks = <&clk IMX93_CLK_LPSPI6_GATE>,
1031 clock-names = "per", "ipg";
1033 dma-names = "tx", "rx";
1038 #address-cells = <1>;
1039 #size-cells = <0>;
1040 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1043 clocks = <&clk IMX93_CLK_LPSPI7_GATE>,
1045 clock-names = "per", "ipg";
1047 dma-names = "tx", "rx";
1052 #address-cells = <1>;
1053 #size-cells = <0>;
1054 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1057 clocks = <&clk IMX93_CLK_LPSPI8_GATE>,
1059 clock-names = "per", "ipg";
1061 dma-names = "tx", "rx";
1068 compatible = "fsl,aips-bus", "simple-bus";
1070 #address-cells = <1>;
1071 #size-cells = <1>;
1075 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1078 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
1081 clock-names = "ipg", "ahb", "per";
1082 assigned-clocks = <&clk IMX93_CLK_USDHC1>;
1083 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
1084 assigned-clock-rates = <400000000>;
1085 bus-width = <8>;
1086 fsl,tuning-start-tap = <1>;
1087 fsl,tuning-step = <2>;
1092 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1095 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
1098 clock-names = "ipg", "ahb", "per";
1099 assigned-clocks = <&clk IMX93_CLK_USDHC2>;
1100 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
1101 assigned-clock-rates = <400000000>;
1102 bus-width = <4>;
1103 fsl,tuning-start-tap = <1>;
1104 fsl,tuning-step = <2>;
1109 compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
1115 clocks = <&clk IMX93_CLK_ENET1_GATE>,
1120 clock-names = "ipg", "ahb", "ptp",
1122 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
1125 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
1128 assigned-clock-rates = <100000000>, <250000000>, <50000000>;
1129 fsl,num-tx-queues = <3>;
1130 fsl,num-rx-queues = <3>;
1131 fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>;
1132 nvmem-cells = <ð_mac1>;
1133 nvmem-cell-names = "mac-address";
1138 compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
1142 interrupt-names = "macirq", "eth_wake_irq";
1143 clocks = <&clk IMX93_CLK_ENET_QOS_GATE>,
1148 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
1149 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
1151 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
1153 assigned-clock-rates = <100000000>, <250000000>;
1155 snps,clk-csr = <6>;
1156 nvmem-cells = <ð_mac2>;
1157 nvmem-cell-names = "mac-address";
1162 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1165 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
1168 clock-names = "ipg", "ahb", "per";
1169 assigned-clocks = <&clk IMX93_CLK_USDHC3>;
1170 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
1171 assigned-clock-rates = <400000000>;
1172 bus-width = <4>;
1173 fsl,tuning-start-tap = <1>;
1174 fsl,tuning-step = <2>;
1180 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1182 gpio-controller;
1183 #gpio-cells = <2>;
1186 interrupt-controller;
1187 #interrupt-cells = <2>;
1188 clocks = <&clk IMX93_CLK_GPIO2_GATE>,
1190 clock-names = "gpio", "port";
1191 gpio-ranges = <&iomuxc 0 4 30>;
1195 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1197 gpio-controller;
1198 #gpio-cells = <2>;
1201 interrupt-controller;
1202 #interrupt-cells = <2>;
1203 clocks = <&clk IMX93_CLK_GPIO3_GATE>,
1205 clock-names = "gpio", "port";
1206 gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
1211 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1213 gpio-controller;
1214 #gpio-cells = <2>;
1217 interrupt-controller;
1218 #interrupt-cells = <2>;
1219 clocks = <&clk IMX93_CLK_GPIO4_GATE>,
1221 clock-names = "gpio", "port";
1222 gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
1226 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1228 gpio-controller;
1229 #gpio-cells = <2>;
1232 interrupt-controller;
1233 #interrupt-cells = <2>;
1234 clocks = <&clk IMX93_CLK_GPIO1_GATE>,
1236 clock-names = "gpio", "port";
1237 gpio-ranges = <&iomuxc 0 92 16>;
1241 compatible = "fsl,imx93-ocotp", "syscon";
1243 #address-cells = <1>;
1244 #size-cells = <1>;
1246 eth_mac1: mac-address@4ec {
1250 eth_mac2: mac-address@4f2 {
1257 compatible = "fsl,imx93-mu-s4";
1261 interrupt-names = "tx", "rx";
1262 #mbox-cells = <2>;
1265 media_blk_ctrl: system-controller@4ac10000 {
1266 compatible = "fsl,imx93-media-blk-ctrl", "syscon";
1268 power-domains = <&mediamix>;
1269 clocks = <&clk IMX93_CLK_MEDIA_APB>,
1279 clock-names = "apb", "axi", "nic", "disp", "cam",
1281 #power-domain-cells = <1>;
1286 compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
1289 clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
1291 clock-names = "usb_ctrl_root", "usb_wakeup";
1292 assigned-clocks = <&clk IMX93_CLK_HSIO>;
1293 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
1294 assigned-clock-rates = <133000000>;
1301 compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
1302 "fsl,imx6q-usbmisc";
1304 #index-cells = <1>;
1308 compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
1311 clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
1313 clock-names = "usb_ctrl_root", "usb_wakeup";
1314 assigned-clocks = <&clk IMX93_CLK_HSIO>;
1315 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
1316 assigned-clock-rates = <133000000>;
1323 compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
1324 "fsl,imx6q-usbmisc";
1326 #index-cells = <1>;
1329 ddr-pmu@4e300dc0 {
1330 compatible = "fsl,imx93-ddr-pmu";