Lines Matching +full:25 +full:- +full:mhz
1 /* SPDX-License-Identifier: GPL-2.0-only */
19 /* Assume 25 MHz speed for the cycle conversions since PLLs are bypassed */
20 #define PLL_BYPASS_CYCLES (PLL_BYPASS_TIME * 25)
21 #define PLL_RESET_CYCLES (PLL_RESET_TIME * 25)
22 #define PLL_LOCK_CYCLES (PLL_LOCK_TIME * 25)
41 stmfd sp!, {r0-r12, lr} @ save registers on stack
46 ldmia r0, {r0-r4}
49 * Switch DDR to self-refresh mode.
127 /* Wait for PLL to lock (assume prediv = 1, 25MHz OSCIN) */
163 ldmfd sp!, {r0-r12, pc}
215 .word . - davinci_cpu_suspend